Added experimental NVidia Riva TNT2 emulation (patch from MoochMcGee); ASUS P/I-P54TP4XE, ASUS P/I-P55T2P4, and ASUS P/I-P55TVP4 are back; National Semiconductor PC87306 Super I/O chip now correctly reenables devices after a chip power cycle; Several FDC improvements and the behavior is now a bit closer to real hardware (based on actual tests); Added MR Intel Advanced/ATX with Microid Research BIOS with support for 4 floppy drives and up to 4 IDE controllers; Added floppy drives 3 and 4, bringing the maximum to 4; You can now connect hard disks to the tertiary IDE controller; Correct undocumented behavior of the LEA instruction with register is back on 286 and later CPU's; Pentium-rea models with Intel chipsets now have port 92 (with alternate reset and alternate A20 toggle); Overhauled DMA channel read and write routines and fixed cascading; Improved IMG detection of a bad BPB (or complete lack of a BPB); Added preliminary emulation of PS/2 1.44 MB and PC-98 1.25 MB 3-mode drives (both have an inverted DENSEL pin); Removed the incorrect Amstrad mouse patch from TheCollector1995; Fixed ATAPI CD-ROM disk change detection; Windows IOCTL CD-ROM handler now tries to use direct SCSI passthrough for more things, including obtaining CD-ROM capacity; The Diamond Stealth32 (ET4000/W32p) now also works correctly on the two Award SiS 496/497 boxes; The (S)VGA handler now converts 6-bit RAMDAC RGB channels to standard 8-bit RGB using a lookup table generated at emulator start, calculated using the correct intensity conversion method and treating intensity 64 as equivalent to 63; Moved a few options from the Configuration dialog box to the menu; SIO, PIIX, and PIIX3 now have the reset control register on port CF9 as they should; Several bugfixes.
355 lines
11 KiB
C
355 lines
11 KiB
C
#define cond_O ( VF_SET())
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#define cond_NO (!VF_SET())
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#define cond_B ( CF_SET())
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#define cond_NB (!CF_SET())
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#define cond_E ( ZF_SET())
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#define cond_NE (!ZF_SET())
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#define cond_BE ( CF_SET() || ZF_SET())
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#define cond_NBE (!CF_SET() && !ZF_SET())
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#define cond_S ( NF_SET())
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#define cond_NS (!NF_SET())
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#define cond_P ( PF_SET())
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#define cond_NP (!PF_SET())
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#define cond_L (((NF_SET()) ? 1 : 0) != ((VF_SET()) ? 1 : 0))
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#define cond_NL (((NF_SET()) ? 1 : 0) == ((VF_SET()) ? 1 : 0))
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#define cond_LE (((NF_SET()) ? 1 : 0) != ((VF_SET()) ? 1 : 0) || (ZF_SET()))
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#define cond_NLE (((NF_SET()) ? 1 : 0) == ((VF_SET()) ? 1 : 0) && (!ZF_SET()))
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#define opJ(condition) \
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static int opJ ## condition(uint32_t fetchdat) \
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{ \
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int8_t offset = (int8_t)getbytef(); \
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CLOCK_CYCLES(timing_bnt); \
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if (cond_ ## condition) \
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{ \
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cpu_state.pc += offset; \
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CLOCK_CYCLES_ALWAYS(timing_bt); \
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CPU_BLOCK_END(); \
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PREFETCH_RUN(timing_bt+timing_bnt, 2, -1, 0,0,0,0, 0); \
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PREFETCH_FLUSH(); \
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return 1; \
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} \
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PREFETCH_RUN(timing_bnt, 2, -1, 0,0,0,0, 0); \
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return 0; \
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} \
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\
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static int opJ ## condition ## _w(uint32_t fetchdat) \
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{ \
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int16_t offset = (int16_t)getwordf(); \
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CLOCK_CYCLES(timing_bnt); \
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if (cond_ ## condition) \
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{ \
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cpu_state.pc += offset; \
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CLOCK_CYCLES_ALWAYS(timing_bt); \
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CPU_BLOCK_END(); \
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PREFETCH_RUN(timing_bt+timing_bnt, 3, -1, 0,0,0,0, 0); \
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PREFETCH_FLUSH(); \
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return 1; \
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} \
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PREFETCH_RUN(timing_bnt, 3, -1, 0,0,0,0, 0); \
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return 0; \
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} \
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\
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static int opJ ## condition ## _l(uint32_t fetchdat) \
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{ \
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uint32_t offset = getlong(); if (cpu_state.abrt) return 1; \
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CLOCK_CYCLES(timing_bnt); \
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if (cond_ ## condition) \
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{ \
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cpu_state.pc += offset; \
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CLOCK_CYCLES_ALWAYS(timing_bt); \
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CPU_BLOCK_END(); \
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PREFETCH_RUN(timing_bt+timing_bnt, 5, -1, 0,0,0,0, 0); \
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PREFETCH_FLUSH(); \
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return 1; \
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} \
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PREFETCH_RUN(timing_bnt, 5, -1, 0,0,0,0, 0); \
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return 0; \
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} \
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opJ(O)
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opJ(NO)
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opJ(B)
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opJ(NB)
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opJ(E)
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opJ(NE)
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opJ(BE)
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opJ(NBE)
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opJ(S)
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opJ(NS)
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opJ(P)
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opJ(NP)
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opJ(L)
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opJ(NL)
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opJ(LE)
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opJ(NLE)
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static int opLOOPNE_w(uint32_t fetchdat)
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{
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int8_t offset = (int8_t)getbytef();
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CX--;
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CLOCK_CYCLES((is486) ? 7 : 11);
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PREFETCH_RUN(11, 2, -1, 0,0,0,0, 0);
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if (CX && !ZF_SET())
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{
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cpu_state.pc += offset;
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CPU_BLOCK_END();
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PREFETCH_FLUSH();
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return 1;
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}
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return 0;
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}
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static int opLOOPNE_l(uint32_t fetchdat)
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{
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int8_t offset = (int8_t)getbytef();
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ECX--;
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CLOCK_CYCLES((is486) ? 7 : 11);
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PREFETCH_RUN(11, 2, -1, 0,0,0,0, 0);
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if (ECX && !ZF_SET())
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{
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cpu_state.pc += offset;
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CPU_BLOCK_END();
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PREFETCH_FLUSH();
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return 1;
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}
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return 0;
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}
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static int opLOOPE_w(uint32_t fetchdat)
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{
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int8_t offset = (int8_t)getbytef();
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CX--;
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CLOCK_CYCLES((is486) ? 7 : 11);
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PREFETCH_RUN(11, 2, -1, 0,0,0,0, 0);
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if (CX && ZF_SET())
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{
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cpu_state.pc += offset;
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CPU_BLOCK_END();
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PREFETCH_FLUSH();
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return 1;
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}
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return 0;
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}
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static int opLOOPE_l(uint32_t fetchdat)
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{
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int8_t offset = (int8_t)getbytef();
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ECX--;
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CLOCK_CYCLES((is486) ? 7 : 11);
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PREFETCH_RUN(11, 2, -1, 0,0,0,0, 0);
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if (ECX && ZF_SET())
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{
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cpu_state.pc += offset;
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CPU_BLOCK_END();
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PREFETCH_FLUSH();
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return 1;
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}
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return 0;
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}
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static int opLOOP_w(uint32_t fetchdat)
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{
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int8_t offset = (int8_t)getbytef();
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CX--;
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CLOCK_CYCLES((is486) ? 7 : 11);
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PREFETCH_RUN(11, 2, -1, 0,0,0,0, 0);
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if (CX)
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{
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cpu_state.pc += offset;
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CPU_BLOCK_END();
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PREFETCH_FLUSH();
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return 1;
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}
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return 0;
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}
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static int opLOOP_l(uint32_t fetchdat)
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{
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int8_t offset = (int8_t)getbytef();
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ECX--;
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CLOCK_CYCLES((is486) ? 7 : 11);
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PREFETCH_RUN(11, 2, -1, 0,0,0,0, 0);
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if (ECX)
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{
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cpu_state.pc += offset;
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CPU_BLOCK_END();
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PREFETCH_FLUSH();
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return 1;
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}
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return 0;
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}
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static int opJCXZ(uint32_t fetchdat)
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{
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int8_t offset = (int8_t)getbytef();
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CLOCK_CYCLES(5);
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if (!CX)
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{
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cpu_state.pc += offset;
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CLOCK_CYCLES(4);
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CPU_BLOCK_END();
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PREFETCH_RUN(9, 2, -1, 0,0,0,0, 0);
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PREFETCH_FLUSH();
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return 1;
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}
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PREFETCH_RUN(5, 2, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opJECXZ(uint32_t fetchdat)
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{
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int8_t offset = (int8_t)getbytef();
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CLOCK_CYCLES(5);
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if (!ECX)
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{
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cpu_state.pc += offset;
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CLOCK_CYCLES(4);
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CPU_BLOCK_END();
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PREFETCH_RUN(9, 2, -1, 0,0,0,0, 0);
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PREFETCH_FLUSH();
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return 1;
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}
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PREFETCH_RUN(5, 2, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opJMP_r8(uint32_t fetchdat)
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{
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int8_t offset = (int8_t)getbytef();
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cpu_state.pc += offset;
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CPU_BLOCK_END();
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CLOCK_CYCLES((is486) ? 3 : 7);
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PREFETCH_RUN(7, 2, -1, 0,0,0,0, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opJMP_r16(uint32_t fetchdat)
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{
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int16_t offset = (int16_t)getwordf();
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cpu_state.pc += offset;
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CPU_BLOCK_END();
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CLOCK_CYCLES((is486) ? 3 : 7);
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PREFETCH_RUN(7, 3, -1, 0,0,0,0, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opJMP_r32(uint32_t fetchdat)
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{
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int32_t offset = (int32_t)getlong(); if (cpu_state.abrt) return 1;
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cpu_state.pc += offset;
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CPU_BLOCK_END();
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CLOCK_CYCLES((is486) ? 3 : 7);
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PREFETCH_RUN(7, 5, -1, 0,0,0,0, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opJMP_far_a16(uint32_t fetchdat)
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{
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uint16_t addr = getwordf();
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uint16_t seg = getword(); if (cpu_state.abrt) return 1;
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uint32_t oxpc = cpu_state.pc;
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cpu_state.pc = addr;
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loadcsjmp(seg, oxpc);
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CPU_BLOCK_END();
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PREFETCH_RUN(11, 5, -1, 0,0,0,0, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opJMP_far_a32(uint32_t fetchdat)
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{
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uint32_t addr = getlong();
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uint16_t seg = getword(); if (cpu_state.abrt) return 1;
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uint32_t oxpc = cpu_state.pc;
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cpu_state.pc = addr;
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loadcsjmp(seg, oxpc);
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CPU_BLOCK_END();
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PREFETCH_RUN(11, 7, -1, 0,0,0,0, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opCALL_r16(uint32_t fetchdat)
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{
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int16_t addr = (int16_t)getwordf();
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PUSH_W(cpu_state.pc);
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cpu_state.pc += addr;
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CPU_BLOCK_END();
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CLOCK_CYCLES((is486) ? 3 : 7);
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PREFETCH_RUN(7, 3, -1, 0,0,1,0, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opCALL_r32(uint32_t fetchdat)
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{
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int32_t addr = getlong(); if (cpu_state.abrt) return 1;
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PUSH_L(cpu_state.pc);
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cpu_state.pc += addr;
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CPU_BLOCK_END();
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CLOCK_CYCLES((is486) ? 3 : 7);
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PREFETCH_RUN(7, 5, -1, 0,0,0,1, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opRET_w(uint32_t fetchdat)
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{
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uint16_t ret;
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ret = POP_W(); if (cpu_state.abrt) return 1;
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cpu_state.pc = ret;
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CPU_BLOCK_END();
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CLOCK_CYCLES((is486) ? 5 : 10);
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PREFETCH_RUN(10, 1, -1, 1,0,0,0, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opRET_l(uint32_t fetchdat)
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{
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uint32_t ret;
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ret = POP_L(); if (cpu_state.abrt) return 1;
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cpu_state.pc = ret;
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CPU_BLOCK_END();
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CLOCK_CYCLES((is486) ? 5 : 10);
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PREFETCH_RUN(10, 1, -1, 0,1,0,0, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opRET_w_imm(uint32_t fetchdat)
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{
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uint16_t offset = getwordf();
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uint16_t ret;
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ret = POP_W(); if (cpu_state.abrt) return 1;
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if (stack32) ESP += offset;
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else SP += offset;
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cpu_state.pc = ret;
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CPU_BLOCK_END();
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CLOCK_CYCLES((is486) ? 5 : 10);
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PREFETCH_RUN(10, 5, -1, 1,0,0,0, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opRET_l_imm(uint32_t fetchdat)
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{
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uint16_t offset = getwordf();
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uint32_t ret;
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ret = POP_L(); if (cpu_state.abrt) return 1;
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if (stack32) ESP += offset;
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else SP += offset;
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cpu_state.pc = ret;
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CPU_BLOCK_END();
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CLOCK_CYCLES((is486) ? 5 : 10);
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PREFETCH_RUN(10, 5, -1, 0,1,0,0, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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