5318bc08d8
Merged floppy.c and fdd.c and renamed floppy_*.c (the floppy image format handlers) to fdd_*.c; Reading the AT or PS/2 keyboard controller status no longer clears the transmit timeout bit, fixes error 8601 (mouse error) on the IBM PS/2 Model 80; MMU translate and DMA physical reads and writes now go through _mem_exec instead of directly to ram[], should fix the last remaining problems with remapped mappings; Implemented the Sound gain dialog; Added the resource for the "New floppy image" dialog and the needed functions for the functionality of exporting the currently mounted floppy image as 86F, both of which should be finished in the next commit; Applied the CD-ROM fixes from the PCem commit; Added the "Keep ratio" option for full screen stretch.
789 lines
18 KiB
C
789 lines
18 KiB
C
#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <stdarg.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include "86box.h"
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#include "machine/machine.h"
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#include "cpu/cpu.h"
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#include "io.h"
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#include "pic.h"
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#include "mem.h"
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#include "device.h"
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#include "pci.h"
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#include "keyboard.h"
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#include "cdrom/cdrom.h"
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#include "disk/hdc.h"
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#include "disk/hdc_ide.h"
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static uint64_t pci_irq_hold[16];
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typedef struct
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{
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uint8_t id, type;
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uint8_t irq_routing[4];
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void (*write) (int func, int addr, uint8_t val, void *priv);
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uint8_t (*read) (int func, int addr, void *priv);
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void * priv;
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} pci_card_t;
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static pci_card_t pci_cards[32];
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static uint8_t last_pci_card = 0;
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static uint8_t pci_card_to_slot_mapping[32];
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static uint8_t elcr[2] = { 0, 0 };
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static uint8_t pci_irqs[4];
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typedef struct
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{
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uint8_t enabled;
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uint8_t irq_line;
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} pci_mirq_t;
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static pci_mirq_t pci_mirqs[2];
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static int pci_index, pci_func, pci_card, pci_bus, pci_enable, pci_key;
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int pci_burst_time, pci_nonburst_time;
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static int trc_reg = 0;
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PCI_RESET pci_reset_handler;
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#ifdef ENABLE_PCI_LOG
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int pci_do_log = ENABLE_PCI_LOG;
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#endif
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static void
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pcilog(const char *fmt, ...)
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{
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#ifdef ENABLE_PCI_LOG
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va_list ap;
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if (pci_do_log)
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{
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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#endif
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}
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static void pci_cf8_write(uint16_t port, uint32_t val, void *p)
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{
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pci_index = val & 0xff;
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pci_func = (val >> 8) & 7;
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pci_card = (val >> 11) & 31;
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pci_bus = (val >> 16) & 0xff;
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pci_enable = (val >> 31) & 1;
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}
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static uint32_t pci_cf8_read(uint16_t port, void *p)
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{
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return pci_index | (pci_func << 8) | (pci_card << 11) | (pci_bus << 16) | (pci_enable << 31);
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}
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static void pci_write(uint16_t port, uint8_t val, void *priv)
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{
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uint8_t slot = 0;
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switch (port)
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{
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case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff:
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if (!pci_enable)
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return;
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if (!pci_bus)
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{
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slot = pci_card_to_slot_mapping[pci_card];
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if (slot != 0xFF)
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{
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if (pci_cards[slot].write)
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{
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/* pcilog("Reading PCI card on slot %02X (pci_cards[%i])...\n", pci_card, slot); */
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pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv);
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}
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}
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}
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break;
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}
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}
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static uint8_t pci_read(uint16_t port, void *priv)
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{
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uint8_t slot = 0;
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switch (port)
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{
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case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff:
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if (!pci_enable)
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return 0xff;
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if (!pci_bus)
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{
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slot = pci_card_to_slot_mapping[pci_card];
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if (slot != 0xFF)
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{
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if (pci_cards[slot].read)
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{
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return pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv);
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}
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}
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}
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return 0xff;
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}
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return 0xff;
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}
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static void elcr_write(uint16_t port, uint8_t val, void *priv)
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{
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/* pcilog("ELCR%i: WRITE %02X\n", port & 1, val); */
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if (port & 1)
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{
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val &= 0xDE;
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}
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else
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{
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val &= 0xF8;
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}
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elcr[port & 1] = val;
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pcilog("ELCR %i: %c %c %c %c %c %c %c %c\n", port & 1, (val & 1) ? 'L' : 'E', (val & 2) ? 'L' : 'E', (val & 4) ? 'L' : 'E', (val & 8) ? 'L' : 'E', (val & 0x10) ? 'L' : 'E', (val & 0x20) ? 'L' : 'E', (val & 0x40) ? 'L' : 'E', (val & 0x80) ? 'L' : 'E');
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}
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static uint8_t elcr_read(uint16_t port, void *priv)
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{
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/* pcilog("ELCR%i: READ %02X\n", port & 1, elcr[port & 1]); */
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return elcr[port & 1];
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}
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static void elcr_reset(void)
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{
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pic_reset();
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/* elcr[0] = elcr[1] = 0; */
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elcr[0] = 0x98;
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elcr[1] = 0x00;
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}
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static void pci_type2_write(uint16_t port, uint8_t val, void *priv);
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static uint8_t pci_type2_read(uint16_t port, void *priv);
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static void pci_type2_write(uint16_t port, uint8_t val, void *priv)
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{
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uint8_t slot = 0;
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if (port == 0xcf8)
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{
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pci_func = (val >> 1) & 7;
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if (!pci_key && (val & 0xf0))
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io_sethandler(0xc000, 0x1000, pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL);
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else
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io_removehandler(0xc000, 0x1000, pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL);
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pci_key = val & 0xf0;
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}
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else if (port == 0xcfa)
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{
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pci_bus = val;
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}
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else
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{
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pci_card = (port >> 8) & 0xf;
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pci_index = port & 0xff;
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if (!pci_bus)
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{
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slot = pci_card_to_slot_mapping[pci_card];
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if (slot != 0xFF)
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{
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if (pci_cards[slot].write)
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{
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pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv);
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}
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}
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}
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}
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}
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static uint8_t pci_type2_read(uint16_t port, void *priv)
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{
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uint8_t slot = 0;
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if (port == 0xcf8)
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{
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return pci_key | (pci_func << 1);
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}
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else if (port == 0xcfa)
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{
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return pci_bus;
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}
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else
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{
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pci_card = (port >> 8) & 0xf;
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pci_index = port & 0xff;
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if (!pci_bus)
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{
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slot = pci_card_to_slot_mapping[pci_card];
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if (slot != 0xFF)
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{
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if (pci_cards[slot].read)
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{
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return pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv);
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}
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}
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}
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}
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return 0xff;
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}
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void pci_set_irq_routing(int pci_int, int irq)
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{
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pci_irqs[pci_int - 1] = irq;
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}
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void pci_enable_mirq(int mirq)
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{
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pci_mirqs[mirq].enabled = 1;
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}
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void pci_set_mirq_routing(int mirq, int irq)
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{
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pci_mirqs[mirq].irq_line = irq;
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}
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int pci_irq_is_level(int irq)
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{
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int real_irq = irq & 7;
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if ((irq <= 2) || (irq == 8) || (irq == 13))
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{
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return 0;
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}
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if (irq > 7)
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{
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return !!(elcr[1] & (1 << real_irq));
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}
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else
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{
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return !!(elcr[0] & (1 << real_irq));
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}
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}
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uint8_t pci_use_mirq(uint8_t mirq)
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{
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if (!PCI || !pci_mirqs[0].enabled)
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{
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return 0;
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}
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if (pci_mirqs[mirq].irq_line & 0x80)
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{
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return 0;
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}
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return 1;
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}
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#define pci_mirq_log pcilog
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void pci_set_mirq(uint8_t mirq)
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{
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uint8_t irq_line = 0;
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uint8_t level = 0;
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if (!pci_mirqs[mirq].enabled)
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{
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pci_mirq_log("pci_set_mirq(%02X): MIRQ0 disabled\n", mirq);
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return;
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}
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if (pci_mirqs[mirq].irq_line > 0x0F)
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{
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pci_mirq_log("pci_set_mirq(%02X): IRQ line is disabled\n", mirq);
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return;
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}
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else
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{
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irq_line = pci_mirqs[mirq].irq_line;
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pci_mirq_log("pci_set_mirq(%02X): Using IRQ %i\n", mirq, irq_line);
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}
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if (pci_irq_is_level(irq_line) && (pci_irq_hold[irq_line] & (1 << (0x1E + mirq))))
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{
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/* IRQ already held, do nothing. */
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pci_mirq_log("pci_set_mirq(%02X): MIRQ is already holding the IRQ\n", mirq);
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return;
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}
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else
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{
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pci_mirq_log("pci_set_mirq(%02X): MIRQ not yet holding the IRQ\n", mirq);
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}
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level = pci_irq_is_level(irq_line);
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if (!level || !pci_irq_hold[irq_line])
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{
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pci_mirq_log("pci_set_mirq(%02X): Issuing %s-triggered IRQ (%sheld)\n", mirq, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not ");
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/* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */
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picintlevel(1 << irq_line);
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}
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else if (level && pci_irq_hold[irq_line])
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{
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pci_mirq_log("pci_set_mirq(%02X): IRQ line already being held\n", mirq);
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}
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/* If the IRQ is level-triggered, mark that this MIRQ is holding it. */
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if (level)
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{
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pci_mirq_log("pci_set_mirq(%02X): Marking that this card is holding the IRQ\n", mirq);
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pci_irq_hold[irq_line] |= (1 << (0x1E + mirq));
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}
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else
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{
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pci_mirq_log("pci_set_mirq(%02X): Edge-triggered interrupt, not marking\n", mirq);
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}
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}
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void pci_set_irq(uint8_t card, uint8_t pci_int)
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{
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uint8_t slot = 0;
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uint8_t irq_routing = 0;
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uint8_t pci_int_index = pci_int - PCI_INTA;
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uint8_t irq_line = 0;
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uint8_t level = 0;
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if (!last_pci_card)
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{
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pcilog("pci_set_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int);
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return;
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}
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else
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{
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pcilog("pci_set_irq(%02X, %02X): %i PCI slots\n", card, pci_int, last_pci_card);
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}
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slot = pci_card_to_slot_mapping[card];
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if (slot == 0xFF)
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{
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pcilog("pci_set_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int);
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return;
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}
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else
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{
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pcilog("pci_set_irq(%02X, %02X): Card is on PCI slot %02X\n", card, pci_int, slot);
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}
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if (!pci_cards[slot].irq_routing[pci_int_index])
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{
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pcilog("pci_set_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int);
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return;
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}
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else
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{
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irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3;
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pcilog("pci_set_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing);
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}
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if (pci_irqs[irq_routing] > 0x0F)
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{
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pcilog("pci_set_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int);
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return;
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}
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else
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{
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irq_line = pci_irqs[irq_routing];
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pcilog("pci_set_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line);
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}
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if (pci_irq_is_level(irq_line) && (pci_irq_hold[irq_line] & (1 << card)))
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{
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/* IRQ already held, do nothing. */
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pcilog("pci_set_irq(%02X, %02X): Card is already holding the IRQ\n", card, pci_int);
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return;
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}
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else
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{
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pcilog("pci_set_irq(%02X, %02X): Card not yet holding the IRQ\n", card, pci_int);
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}
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level = pci_irq_is_level(irq_line);
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if (!level || !pci_irq_hold[irq_line])
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{
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pcilog("pci_set_irq(%02X, %02X): Issuing %s-triggered IRQ (%sheld)\n", card, pci_int, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not ");
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/* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */
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picintlevel(1 << irq_line);
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}
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else if (level && pci_irq_hold[irq_line])
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{
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pcilog("pci_set_irq(%02X, %02X): IRQ line already being held\n", card, pci_int);
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}
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/* If the IRQ is level-triggered, mark that this card is holding it. */
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if (pci_irq_is_level(irq_line))
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{
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pcilog("pci_set_irq(%02X, %02X): Marking that this card is holding the IRQ\n", card, pci_int);
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pci_irq_hold[irq_line] |= (1 << card);
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}
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else
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{
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pcilog("pci_set_irq(%02X, %02X): Edge-triggered interrupt, not marking\n", card, pci_int);
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}
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}
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void pci_clear_mirq(uint8_t mirq)
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{
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uint8_t irq_line = 0;
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uint8_t level = 0;
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mirq = 0;
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if (mirq > 1)
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{
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pci_mirq_log("pci_clear_mirq(%02X): Invalid MIRQ\n", mirq);
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return;
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}
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if (!pci_mirqs[mirq].enabled)
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{
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pci_mirq_log("pci_clear_mirq(%02X): MIRQ0 disabled\n", mirq);
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return;
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}
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if (pci_mirqs[mirq].irq_line > 0x0F)
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{
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pci_mirq_log("pci_clear_mirq(%02X): IRQ line is disabled\n", mirq);
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return;
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}
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else
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{
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irq_line = pci_mirqs[mirq].irq_line;
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pci_mirq_log("pci_clear_mirq(%02X): Using IRQ %i\n", mirq, irq_line);
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}
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if (pci_irq_is_level(irq_line) && !(pci_irq_hold[irq_line] & (1 << (0x1E + mirq))))
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{
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/* IRQ not held, do nothing. */
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pci_mirq_log("pci_clear_mirq(%02X): MIRQ is not holding the IRQ\n", mirq);
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return;
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}
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level = pci_irq_is_level(irq_line);
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if (level)
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{
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pci_mirq_log("pci_clear_mirq(%02X): Releasing this MIRQ's hold on the IRQ\n", mirq);
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pci_irq_hold[irq_line] &= ~(1 << (0x1E + mirq));
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if (!pci_irq_hold[irq_line])
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{
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pci_mirq_log("pci_clear_mirq(%02X): IRQ no longer held by any card, clearing it\n", mirq);
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picintc(1 << irq_line);
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}
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else
|
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{
|
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pci_mirq_log("pci_clear_mirq(%02X): IRQ is still being held\n", mirq);
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}
|
|
}
|
|
else
|
|
{
|
|
pci_mirq_log("pci_clear_mirq(%02X): Clearing edge-triggered interrupt\n", mirq);
|
|
picintc(1 << irq_line);
|
|
}
|
|
}
|
|
|
|
void pci_clear_irq(uint8_t card, uint8_t pci_int)
|
|
{
|
|
uint8_t slot = 0;
|
|
uint8_t irq_routing = 0;
|
|
uint8_t pci_int_index = pci_int - PCI_INTA;
|
|
uint8_t irq_line = 0;
|
|
uint8_t level = 0;
|
|
|
|
if (!last_pci_card)
|
|
{
|
|
pcilog("pci_clear_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int);
|
|
return;
|
|
}
|
|
else
|
|
{
|
|
pcilog("pci_clear_irq(%02X, %02X): %i PCI slots\n", card, pci_int, last_pci_card);
|
|
}
|
|
|
|
slot = pci_card_to_slot_mapping[card];
|
|
|
|
if (slot == 0xFF)
|
|
{
|
|
pcilog("pci_clear_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int);
|
|
return;
|
|
}
|
|
else
|
|
{
|
|
pcilog("pci_clear_irq(%02X, %02X): Card is on PCI slot %02X\n", card, pci_int, slot);
|
|
}
|
|
|
|
if (!pci_cards[slot].irq_routing[pci_int_index])
|
|
{
|
|
pcilog("pci_clear_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int);
|
|
return;
|
|
}
|
|
else
|
|
{
|
|
irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3;
|
|
pcilog("pci_clear_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing);
|
|
}
|
|
|
|
if (pci_irqs[irq_routing] > 0x0F)
|
|
{
|
|
pcilog("pci_clear_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int);
|
|
return;
|
|
}
|
|
else
|
|
{
|
|
irq_line = pci_irqs[irq_routing];
|
|
pcilog("pci_clear_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line);
|
|
}
|
|
|
|
if (pci_irq_is_level(irq_line) && !(pci_irq_hold[irq_line] & (1 << card)))
|
|
{
|
|
/* IRQ not held, do nothing. */
|
|
pcilog("pci_clear_irq(%02X, %02X): Card is not holding the IRQ\n", card, pci_int);
|
|
return;
|
|
}
|
|
|
|
level = pci_irq_is_level(irq_line);
|
|
|
|
if (level)
|
|
{
|
|
pcilog("pci_clear_irq(%02X, %02X): Releasing this card's hold on the IRQ\n", card, pci_int);
|
|
pci_irq_hold[irq_line] &= ~(1 << card);
|
|
|
|
if (!pci_irq_hold[irq_line])
|
|
{
|
|
pcilog("pci_clear_irq(%02X, %02X): IRQ no longer held by any card, clearing it\n", card, pci_int);
|
|
picintc(1 << irq_line);
|
|
}
|
|
else
|
|
{
|
|
pcilog("pci_clear_irq(%02X, %02X): IRQ is still being held\n", card, pci_int);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
pcilog("pci_clear_irq(%02X, %02X): Clearing edge-triggered interrupt\n", card, pci_int);
|
|
picintc(1 << irq_line);
|
|
}
|
|
}
|
|
|
|
void pci_reset(void)
|
|
{
|
|
int i = 0;
|
|
|
|
for (i = 0; i < 16; i++)
|
|
{
|
|
if (pci_irq_hold[i])
|
|
{
|
|
pci_irq_hold[i] = 0;
|
|
|
|
picintc(1 << i);
|
|
}
|
|
}
|
|
|
|
elcr_reset();
|
|
}
|
|
|
|
static void pci_slots_clear(void)
|
|
{
|
|
uint8_t i = 0;
|
|
uint8_t j = 0;
|
|
|
|
last_pci_card = 0;
|
|
|
|
for (i = 0; i < 32; i++)
|
|
{
|
|
pci_cards[i].id = 0xFF;
|
|
pci_cards[i].type = 0xFF;
|
|
|
|
for (j = 0; j < 4; j++)
|
|
{
|
|
pci_cards[i].irq_routing[j] = 0;
|
|
}
|
|
|
|
pci_cards[i].read = NULL;
|
|
pci_cards[i].write = NULL;
|
|
pci_cards[i].priv = NULL;
|
|
|
|
pci_card_to_slot_mapping[i] = 0xFF;
|
|
}
|
|
}
|
|
|
|
static uint8_t trc_read(uint16_t port, void *priv)
|
|
{
|
|
return trc_reg & 0xfb;
|
|
}
|
|
|
|
static void trc_reset(uint8_t val)
|
|
{
|
|
int i = 0;
|
|
|
|
if (val & 2)
|
|
{
|
|
if (pci_reset_handler.pci_master_reset)
|
|
{
|
|
pci_reset_handler.pci_master_reset();
|
|
}
|
|
|
|
if (pci_reset_handler.pci_set_reset)
|
|
{
|
|
pci_reset_handler.pci_set_reset();
|
|
}
|
|
|
|
if (pci_reset_handler.super_io_reset)
|
|
{
|
|
pci_reset_handler.super_io_reset();
|
|
}
|
|
|
|
ide_reset();
|
|
for (i = 0; i < CDROM_NUM; i++)
|
|
{
|
|
if (!cdrom_drives[i].bus_type)
|
|
{
|
|
cdrom_reset(i);
|
|
}
|
|
}
|
|
|
|
port_92_reset();
|
|
keyboard_at_reset();
|
|
|
|
pci_reset();
|
|
}
|
|
resetx86();
|
|
}
|
|
|
|
static void trc_write(uint16_t port, uint8_t val, void *priv)
|
|
{
|
|
/* pcilog("TRC Write: %02X\n", val); */
|
|
if (!(trc_reg & 4) && (val & 4))
|
|
{
|
|
trc_reset(val);
|
|
}
|
|
trc_reg = val & 0xfd;
|
|
}
|
|
|
|
void trc_init(void)
|
|
{
|
|
trc_reg = 0;
|
|
|
|
io_sethandler(0x0cf9, 0x0001, trc_read, NULL, NULL, trc_write, NULL, NULL, NULL);
|
|
}
|
|
|
|
void pci_init(int type)
|
|
{
|
|
int c;
|
|
|
|
PCI = 1;
|
|
|
|
pci_slots_clear();
|
|
|
|
pci_reset();
|
|
|
|
trc_init();
|
|
|
|
io_sethandler(0x04d0, 0x0002, elcr_read, NULL, NULL, elcr_write, NULL, NULL, NULL);
|
|
|
|
if (type == PCI_CONFIG_TYPE_1)
|
|
{
|
|
io_sethandler(0x0cf8, 0x0001, NULL, NULL, pci_cf8_read, NULL, NULL, pci_cf8_write, NULL);
|
|
io_sethandler(0x0cfc, 0x0004, pci_read, NULL, NULL, pci_write, NULL, NULL, NULL);
|
|
}
|
|
else
|
|
{
|
|
io_sethandler(0x0cf8, 0x0001, pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL);
|
|
io_sethandler(0x0cfa, 0x0001, pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL);
|
|
}
|
|
|
|
for (c = 0; c < 4; c++)
|
|
{
|
|
pci_irqs[c] = PCI_IRQ_DISABLED;
|
|
}
|
|
|
|
for (c = 0; c < 2; c++)
|
|
{
|
|
pci_mirqs[c].enabled = 0;
|
|
pci_mirqs[c].irq_line = PCI_IRQ_DISABLED;
|
|
}
|
|
|
|
pci_reset_handler.pci_master_reset = NULL;
|
|
pci_reset_handler.pci_set_reset = NULL;
|
|
pci_reset_handler.super_io_reset = NULL;
|
|
}
|
|
|
|
void pci_register_slot(int card, int type, int inta, int intb, int intc, int intd)
|
|
{
|
|
pci_cards[last_pci_card].id = card;
|
|
pci_cards[last_pci_card].type = type;
|
|
pci_cards[last_pci_card].irq_routing[0] = inta;
|
|
pci_cards[last_pci_card].irq_routing[1] = intb;
|
|
pci_cards[last_pci_card].irq_routing[2] = intc;
|
|
pci_cards[last_pci_card].irq_routing[3] = intd;
|
|
pci_cards[last_pci_card].read = NULL;
|
|
pci_cards[last_pci_card].write = NULL;
|
|
pci_cards[last_pci_card].priv = NULL;
|
|
pci_card_to_slot_mapping[card] = last_pci_card;
|
|
pcilog("pci_register_slot(): pci_cards[%i].id = %02X\n", last_pci_card, card);
|
|
last_pci_card++;
|
|
}
|
|
|
|
uint8_t pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void *priv), void (*write)(int func, int addr, uint8_t val, void *priv), void *priv)
|
|
{
|
|
uint8_t i = 0;
|
|
|
|
if (add_type < PCI_ADD_NORMAL)
|
|
{
|
|
pcilog("pci_add_card(): Adding PCI CARD at specific slot %02X [SPECIFIC]\n", add_type);
|
|
}
|
|
|
|
if (!PCI)
|
|
{
|
|
pcilog("pci_add_card(): Adding PCI CARD failed (non-PCI machine) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
|
|
return 0xFF;
|
|
}
|
|
|
|
if (!last_pci_card)
|
|
{
|
|
pcilog("pci_add_card(): Adding PCI CARD failed (no PCI slots) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
|
|
return 0xFF;
|
|
}
|
|
|
|
for (i = 0; i < last_pci_card; i++)
|
|
{
|
|
if (!pci_cards[i].read && !pci_cards[i].write)
|
|
{
|
|
if (((pci_cards[i].type == PCI_CARD_NORMAL) && (add_type >= PCI_ADD_NORMAL)) ||
|
|
((pci_cards[i].type == PCI_CARD_ONBOARD) && (add_type == PCI_ADD_VIDEO)) ||
|
|
((pci_cards[i].id == add_type) && (add_type < PCI_ADD_NORMAL)))
|
|
{
|
|
pci_cards[i].read = read;
|
|
pci_cards[i].write = write;
|
|
pci_cards[i].priv = priv;
|
|
pcilog("pci_add_card(): Adding PCI CARD to pci_cards[%i] (slot %02X) [%s]\n", i, pci_cards[i].id, (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
|
|
return pci_cards[i].id;
|
|
}
|
|
}
|
|
}
|
|
|
|
pcilog("pci_add_card(): Adding PCI CARD failed (unable to find a suitable PCI slot) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
|
|
return 0xFF;
|
|
}
|