212 lines
7.6 KiB
C
212 lines
7.6 KiB
C
#ifdef IS_DYNAREC
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#define BS_common(start, end, dir, dest, time) \
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flags_rebuild(); \
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if (temp) \
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{ \
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int c; \
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cpu_state.flags &= ~Z_FLAG; \
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for (c = start; c != end; c += dir) \
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{ \
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CLOCK_CYCLES(time); \
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if (temp & (1 << c)) \
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{ \
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dest = c; \
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break; \
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} \
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} \
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} \
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else \
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cpu_state.flags |= Z_FLAG;
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#else
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#define BS_common(start, end, dir, dest, time) \
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flags_rebuild(); \
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instr_cycles = 0; \
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if (temp) \
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{ \
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int c; \
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cpu_state.flags &= ~Z_FLAG; \
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for (c = start; c != end; c += dir) \
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{ \
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CLOCK_CYCLES(time); \
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instr_cycles += time; \
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if (temp & (1 << c)) \
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{ \
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dest = c; \
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break; \
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} \
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} \
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} \
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else \
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cpu_state.flags |= Z_FLAG;
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#endif
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static int opBSF_w_a16(uint32_t fetchdat)
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{
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uint16_t temp;
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#ifndef IS_DYNAREC
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int instr_cycles = 0;
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#endif
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteaw(); if (cpu_state.abrt) return 1;
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BS_common(0, 16, 1, cpu_state.regs[cpu_reg].w, (is486) ? 1 : 3);
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CLOCK_CYCLES((is486) ? 6 : 10);
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#ifndef IS_DYNAREC
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instr_cycles += ((is486) ? 6 : 10);
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PREFETCH_RUN(instr_cycles, 2, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 0);
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#endif
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return 0;
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}
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static int opBSF_w_a32(uint32_t fetchdat)
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{
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uint16_t temp;
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#ifndef IS_DYNAREC
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int instr_cycles = 0;
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#endif
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteaw(); if (cpu_state.abrt) return 1;
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BS_common(0, 16, 1, cpu_state.regs[cpu_reg].w, (is486) ? 1 : 3);
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CLOCK_CYCLES((is486) ? 6 : 10);
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#ifndef IS_DYNAREC
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instr_cycles += ((is486) ? 6 : 10);
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PREFETCH_RUN(instr_cycles, 2, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 1);
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#endif
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return 0;
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}
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static int opBSF_l_a16(uint32_t fetchdat)
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{
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uint32_t temp;
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#ifndef IS_DYNAREC
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int instr_cycles = 0;
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#endif
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteal(); if (cpu_state.abrt) return 1;
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BS_common(0, 32, 1, cpu_state.regs[cpu_reg].l, (is486) ? 1 : 3);
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CLOCK_CYCLES((is486) ? 6 : 10);
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#ifndef IS_DYNAREC
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instr_cycles += ((is486) ? 6 : 10);
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PREFETCH_RUN(instr_cycles, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,0, 0);
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#endif
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return 0;
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}
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static int opBSF_l_a32(uint32_t fetchdat)
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{
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uint32_t temp;
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#ifndef IS_DYNAREC
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int instr_cycles = 0;
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#endif
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteal(); if (cpu_state.abrt) return 1;
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BS_common(0, 32, 1, cpu_state.regs[cpu_reg].l, (is486) ? 1 : 3);
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CLOCK_CYCLES((is486) ? 6 : 10);
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#ifndef IS_DYNAREC
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instr_cycles += ((is486) ? 6 : 10);
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PREFETCH_RUN(instr_cycles, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,0, 1);
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#endif
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return 0;
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}
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static int opBSR_w_a16(uint32_t fetchdat)
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{
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uint16_t temp;
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#ifndef IS_DYNAREC
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int instr_cycles = 0;
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#endif
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteaw(); if (cpu_state.abrt) return 1;
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BS_common(15, -1, -1, cpu_state.regs[cpu_reg].w, 3);
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CLOCK_CYCLES((is486) ? 6 : 10);
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#ifndef IS_DYNAREC
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instr_cycles += ((is486) ? 6 : 10);
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PREFETCH_RUN(instr_cycles, 2, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 0);
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#endif
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return 0;
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}
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static int opBSR_w_a32(uint32_t fetchdat)
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{
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uint16_t temp;
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#ifndef IS_DYNAREC
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int instr_cycles = 0;
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#endif
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteaw(); if (cpu_state.abrt) return 1;
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BS_common(15, -1, -1, cpu_state.regs[cpu_reg].w, 3);
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CLOCK_CYCLES((is486) ? 6 : 10);
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#ifndef IS_DYNAREC
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instr_cycles += ((is486) ? 6 : 10);
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PREFETCH_RUN(instr_cycles, 2, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 1);
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#endif
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return 0;
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}
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static int opBSR_l_a16(uint32_t fetchdat)
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{
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uint32_t temp;
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#ifndef IS_DYNAREC
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int instr_cycles = 0;
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#endif
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteal(); if (cpu_state.abrt) return 1;
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BS_common(31, -1, -1, cpu_state.regs[cpu_reg].l, 3);
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CLOCK_CYCLES((is486) ? 6 : 10);
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#ifndef IS_DYNAREC
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instr_cycles += ((is486) ? 6 : 10);
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PREFETCH_RUN(instr_cycles, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,0, 0);
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#endif
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return 0;
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}
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static int opBSR_l_a32(uint32_t fetchdat)
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{
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uint32_t temp;
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#ifndef IS_DYNAREC
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int instr_cycles = 0;
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#endif
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteal(); if (cpu_state.abrt) return 1;
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BS_common(31, -1, -1, cpu_state.regs[cpu_reg].l, 3);
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CLOCK_CYCLES((is486) ? 6 : 10);
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#ifndef IS_DYNAREC
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instr_cycles += ((is486) ? 6 : 10);
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PREFETCH_RUN(instr_cycles, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,0, 1);
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#endif
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return 0;
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}
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