358 lines
7.3 KiB
C
358 lines
7.3 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the ALi M1429 chipset.
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*
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* Note: This chipset has no datasheet, everything were done via
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* reverse engineering the BIOS of various machines using it.
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*
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* Authors: Tiseno100,
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* Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2020,2021 Tiseno100.
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* Copyright 2021,2021 Miran Grca.
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*/
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/*
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ALi M1429/M1429G Configuration Registers
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Notes: Incorporated sometimes with a M1435 PCI-to-VLB Bridge
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M1429G is just a 1429 with Green Functionality
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SMM in it's entirety needs more research
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Warning: Register documentation may be inaccurate!
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Register 03h: Write C5h to unlock the configuration registers
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Register 10h & 11h: DRAM Bank Configuration
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Register 12h:
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Bit 2: Memory Remapping Enable (128KB)
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Register 13h:
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Bit 7: Shadow RAM Enable for F8000-FFFFF
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Bit 6: Shadow RAM Enable for F0000-F7FFF
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Bit 5: Shadow RAM Enable for E8000-FFFFF
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Bit 4: Shadow RAM Enable for E0000-F7FFF
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Bit 3: Shadow RAM Enable for D8000-FFFFF
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Bit 2: Shadow RAM Enable for D0000-F7FFF
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Bit 1: Shadow RAM Enable for C8000-FFFFF
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Bit 0: Shadow RAM Enable for C0000-F7FFF
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Register 14h:
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Bit 1: Shadow RAM Write for Enabled Segments
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Bit 0: Shadow RAM Read for Enabled Segments
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Register 18h:
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Bit 6-5-4 (Cache Size)
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0 0 0 32KB
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0 0 1 128KB
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0 1 0 256KB
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0 1 1 512KB
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1 0 0 64KB
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1 0 1 256KB
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1 1 0 512KB
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1 1 1 1MB
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Bit 1: L2 Cache Enable
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Register 20h:
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Bits 2-1-0: Bus Clock Speed
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0 0 0: 7.1519Mhz (ATCLK2)
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0 0 1: CLK2IN/4
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0 1 0: CLK2IN/5
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0 1 1: CLK2IN/6
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1 0 0: CLK2IN/8
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1 0 1: CLK2IN/10
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1 1 0: CLK2IN/12
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/io.h>
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#include <86box/device.h>
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#include <86box/apm.h>
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#include <86box/mem.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/port_92.h>
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#include <86box/smram.h>
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#include <86box/chipset.h>
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#define GREEN dev->is_g /* Is G Variant */
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#ifdef ENABLE_ALI1429_LOG
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int ali1429_do_log = ENABLE_ALI1429_LOG;
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static void
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ali1429_log(const char *fmt, ...)
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{
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va_list ap;
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if (ali1429_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define ali1429_log(fmt, ...)
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#endif
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typedef struct
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{
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uint8_t is_g, index, cfg_locked, reg_57h,
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regs[90];
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} ali1429_t;
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static void
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ali1429_shadow_recalc(ali1429_t *dev)
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{
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uint32_t base, i, can_write, can_read;
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shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01);
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shadowbios_write = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x02);
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can_write = (dev->regs[0x14] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
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can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
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for (i = 0; i < 8; i++) {
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base = 0xc0000 + (i << 15);
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if (dev->regs[0x13] & (1 << i))
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mem_set_mem_state_both(base, 0x8000, can_read | can_write);
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else
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mem_set_mem_state_both(base, 0x8000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
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}
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flushmmucache_nopc();
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}
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static void
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ali1429_write(uint16_t addr, uint8_t val, void *priv)
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{
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ali1429_t *dev = (ali1429_t *)priv;
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switch (addr) {
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case 0x22:
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dev->index = val;
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break;
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case 0x23:
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#ifdef ENABLE_ALI1429_LOG
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if (dev->index != 0x03)
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ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val);
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#endif
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if (dev->index == 0x03)
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dev->cfg_locked = !(val == 0xc5);
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if (!dev->cfg_locked) {
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/* Common M1429 Registers */
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switch (dev->index) {
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case 0x10: case 0x11:
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dev->regs[dev->index] = val;
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break;
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case 0x12:
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dev->regs[dev->index] = val;
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if(val & 4)
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mem_remap_top(128);
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else
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mem_remap_top(0);
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break;
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case 0x13: case 0x14:
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dev->regs[dev->index] = val;
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ali1429_shadow_recalc(dev);
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break;
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case 0x15: case 0x16:
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case 0x17:
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dev->regs[dev->index] = val;
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break;
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case 0x18:
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dev->regs[dev->index] = (val & 0x8f) | 0x20;
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cpu_cache_ext_enabled = !!(val & 2);
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cpu_update_waitstates();
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break;
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case 0x19: case 0x1a:
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case 0x1e:
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dev->regs[dev->index] = val;
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break;
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case 0x20:
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dev->regs[dev->index] = val;
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switch(val & 7) {
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case 0: case 7: /* Illegal */
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cpu_set_isa_speed(7159091);
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break;
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case 1:
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cpu_set_isa_speed(cpu_busspeed / 4);
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break;
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case 2:
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cpu_set_isa_speed(cpu_busspeed / 5);
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break;
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case 3:
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cpu_set_isa_speed(cpu_busspeed / 6);
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break;
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case 4:
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cpu_set_isa_speed(cpu_busspeed / 8);
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break;
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case 5:
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cpu_set_isa_speed(cpu_busspeed / 10);
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break;
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case 6:
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cpu_set_isa_speed(cpu_busspeed / 12);
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break;
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}
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break;
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case 0x21 ... 0x27:
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dev->regs[dev->index] = val;
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break;
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}
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/* M1429G Only Registers */
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if (GREEN) {
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switch (dev->index) {
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case 0x30 ... 0x41:
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case 0x43: case 0x45:
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case 0x4a:
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dev->regs[dev->index] = val;
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break;
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case 0x57:
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dev->reg_57h = val;
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break;
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}
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}
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}
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break;
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}
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}
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static uint8_t
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ali1429_read(uint16_t addr, void *priv)
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{
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ali1429_t *dev = (ali1429_t *)priv;
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uint8_t ret = 0xff;
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if ((addr == 0x23) && (dev->index >= 0x10) && (dev->index <= 0x4a))
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ret = dev->regs[dev->index];
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else if ((addr == 0x23) && (dev->index == 0x57))
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ret = dev->reg_57h;
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else if (addr == 0x22)
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ret = dev->index;
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return ret;
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}
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static void
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ali1429_close(void *priv)
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{
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ali1429_t *dev = (ali1429_t *)priv;
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free(dev);
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}
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static void
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ali1429_defaults(ali1429_t *dev)
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{
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/* M1429 Defaults */
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dev->regs[0x10] = 0xf0;
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dev->regs[0x11] = 0xff;
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dev->regs[0x12] = 0x10;
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dev->regs[0x14] = 0x48;
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dev->regs[0x15] = 0x40;
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dev->regs[0x17] = 0x7a;
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dev->regs[0x1a] = 0x80;
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dev->regs[0x22] = 0x80;
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dev->regs[0x23] = 0x57;
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dev->regs[0x25] = 0xc0;
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dev->regs[0x27] = 0x30;
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/* M1429G Default Registers */
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if (GREEN) {
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dev->regs[0x31] = 0x88;
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dev->regs[0x32] = 0xc0;
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dev->regs[0x38] = 0xe5;
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dev->regs[0x40] = 0xe3;
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dev->regs[0x41] = 2;
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dev->regs[0x45] = 0x80;
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}
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}
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static void *
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ali1429_init(const device_t *info)
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{
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ali1429_t *dev = (ali1429_t *)malloc(sizeof(ali1429_t));
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memset(dev, 0, sizeof(ali1429_t));
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dev->cfg_locked = 1;
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GREEN = info->local;
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/* M1429 Ports:
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22h Index Port
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23h Data Port
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*/
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io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev);
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device_add(&port_92_device);
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ali1429_defaults(dev);
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return dev;
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}
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const device_t ali1429_device = {
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"ALi M1429",
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0,
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0,
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ali1429_init, ali1429_close, NULL,
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{ NULL }, NULL, NULL,
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NULL
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};
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const device_t ali1429g_device = {
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"ALi M1429G",
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0,
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1,
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ali1429_init, ali1429_close, NULL,
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{ NULL }, NULL, NULL,
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NULL
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};
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