512 lines
16 KiB
C
512 lines
16 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Trident TVGA (8900D) emulation.
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*
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*
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*
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* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
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* Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2008-2018 Sarah Walker.
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* Copyright 2016-2018 Miran Grca.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <stdlib.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include <86box/io.h>
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#include <86box/timer.h>
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#include <86box/mem.h>
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#include <86box/rom.h>
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#include <86box/device.h>
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#include <86box/video.h>
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#include <86box/vid_svga.h>
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#include <86box/vid_svga_render.h>
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#define TVGA8900B_ID 0x03
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#define TVGA9000B_ID 0x23
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#define TVGA8900CLD_ID 0x33
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#define ROM_TVGA_8900B "roms/video/tvga/tvga8900b.vbi"
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#define ROM_TVGA_8900CLD "roms/video/tvga/trident.bin"
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#define ROM_TVGA_9000B "roms/video/tvga/tvga9000b.bin"
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typedef struct tvga_t
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{
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mem_mapping_t linear_mapping;
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mem_mapping_t accel_mapping;
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svga_t svga;
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rom_t bios_rom;
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uint8_t card_id;
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uint8_t tvga_3d8, tvga_3d9;
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int oldmode;
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uint8_t oldctrl1;
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uint8_t oldctrl2, newctrl2;
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int vram_size;
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uint32_t vram_mask;
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} tvga_t;
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video_timings_t timing_tvga8900 = {VIDEO_ISA, 3, 3, 6, 8, 8, 12};
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video_timings_t timing_tvga9000 = {VIDEO_ISA, 7, 7, 12, 7, 7, 12};
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static uint8_t crtc_mask[0x40] =
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{
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0x7f, 0xff, 0x3f, 0x7f, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xef,
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0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff,
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0x7f, 0x00, 0x00, 0x2f, 0x00, 0x00, 0x00, 0x03,
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0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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static void tvga_recalcbanking(tvga_t *tvga);
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void tvga_out(uint16_t addr, uint8_t val, void *p)
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{
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tvga_t *tvga = (tvga_t *)p;
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svga_t *svga = &tvga->svga;
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uint8_t old;
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if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1)) addr ^= 0x60;
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switch (addr)
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{
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case 0x3C5:
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switch (svga->seqaddr & 0xf)
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{
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case 0xB:
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tvga->oldmode=1;
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break;
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case 0xC:
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if (svga->seqregs[0xe] & 0x80)
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svga->seqregs[0xc] = val;
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break;
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case 0xd:
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if (tvga->oldmode)
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tvga->oldctrl2 = val;
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else
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{
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tvga->newctrl2 = val;
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svga_recalctimings(svga);
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}
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break;
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case 0xE:
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if (tvga->oldmode)
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tvga->oldctrl1 = val;
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else
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{
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svga->seqregs[0xe] = val ^ 2;
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tvga->tvga_3d8 = svga->seqregs[0xe] & 0xf;
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tvga_recalcbanking(tvga);
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}
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return;
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}
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break;
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case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9:
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if (tvga->card_id != TVGA9000B_ID) {
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tkd8001_ramdac_out(addr, val, svga->ramdac, svga);
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return;
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}
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break;
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case 0x3CF:
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switch (svga->gdcaddr & 15)
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{
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case 0x6:
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old = svga->gdcreg[6];
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svga_out(addr, val, svga);
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if ((old & 0xc) != 0 && (val & 0xc) == 0)
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{
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/*override mask - TVGA supports linear 128k at A0000*/
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svga->banked_mask = 0x1ffff;
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}
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return;
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case 0xE:
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svga->gdcreg[0xe] = val ^ 2;
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tvga->tvga_3d9 = svga->gdcreg[0xe] & 0xf;
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tvga_recalcbanking(tvga);
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break;
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case 0xF:
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svga->gdcreg[0xf] = val;
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tvga_recalcbanking(tvga);
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break;
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}
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break;
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case 0x3D4:
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svga->crtcreg = val & 0x3f;
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return;
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case 0x3D5:
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if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80))
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return;
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if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80))
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val = (svga->crtc[7] & ~0x10) | (val & 0x10);
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old = svga->crtc[svga->crtcreg];
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val &= crtc_mask[svga->crtcreg];
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svga->crtc[svga->crtcreg] = val;
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if (old != val) {
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if (svga->crtcreg < 0xe || svga->crtcreg > 0x10)
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{
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if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) {
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svga->fullchange = 3;
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svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5);
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} else {
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svga->fullchange = changeframecount;
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svga_recalctimings(svga);
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}
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}
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}
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switch (svga->crtcreg) {
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case 0x1e:
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svga->vram_display_mask = (val & 0x80) ? tvga->vram_mask : 0x3ffff;
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break;
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}
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return;
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case 0x3D8:
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if (svga->gdcreg[0xf] & 4) {
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tvga->tvga_3d8 = val;
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tvga_recalcbanking(tvga);
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}
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return;
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case 0x3D9:
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if (svga->gdcreg[0xf] & 4) {
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tvga->tvga_3d9 = val;
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tvga_recalcbanking(tvga);
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}
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return;
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case 0x3DB:
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if (tvga->card_id != TVGA9000B_ID) {
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/*3db appears to be a 4 bit clock select register on 8900D*/
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svga->miscout = (svga->miscout & ~0x0c) | ((val & 3) << 2);
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tvga->newctrl2 = (tvga->newctrl2 & ~0x01) | ((val & 4) >> 2);
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tvga->oldctrl1 = (tvga->oldctrl1 & ~0x10) | ((val & 8) << 1);
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svga_recalctimings(svga);
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}
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break;
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}
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svga_out(addr, val, svga);
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}
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uint8_t tvga_in(uint16_t addr, void *p)
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{
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tvga_t *tvga = (tvga_t *)p;
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svga_t *svga = &tvga->svga;
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if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1)) addr ^= 0x60;
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switch (addr)
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{
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case 0x3C5:
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if ((svga->seqaddr & 0xf) == 0xb)
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{
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tvga->oldmode = 0;
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return tvga->card_id; /*Must be at least a TVGA8900*/
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}
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if ((svga->seqaddr & 0xf) == 0xd)
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{
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if (tvga->oldmode) return tvga->oldctrl2;
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return tvga->newctrl2;
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}
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if ((svga->seqaddr & 0xf) == 0xe)
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{
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if (tvga->oldmode)
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return tvga->oldctrl1;
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}
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break;
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case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9:
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if (tvga->card_id != TVGA9000B_ID) {
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return tkd8001_ramdac_in(addr, svga->ramdac, svga);
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}
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break;
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case 0x3D4:
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return svga->crtcreg;
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case 0x3D5:
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if (svga->crtcreg > 0x18 && svga->crtcreg < 0x1e)
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return 0xff;
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return svga->crtc[svga->crtcreg];
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case 0x3d8:
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return tvga->tvga_3d8;
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case 0x3d9:
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return tvga->tvga_3d9;
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}
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return svga_in(addr, svga);
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}
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static void tvga_recalcbanking(tvga_t *tvga)
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{
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svga_t *svga = &tvga->svga;
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svga->write_bank = (tvga->tvga_3d8 & 0x1f) * 65536;
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if (svga->gdcreg[0xf] & 1)
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svga->read_bank = (tvga->tvga_3d9 & 0x1f) * 65536;
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else
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svga->read_bank = svga->write_bank;
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}
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void tvga_recalctimings(svga_t *svga)
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{
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tvga_t *tvga = (tvga_t *)svga->p;
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int clksel;
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int high_res_256 = 0;
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if (!svga->rowoffset) svga->rowoffset = 0x100; /*This is the only sensible way I can see this being handled,
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given that TVGA8900D has no overflow bits.
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Some sort of overflow is required for 320x200x24 and 1024x768x16*/
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if (svga->crtc[0x29] & 0x10)
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svga->rowoffset += 0x100;
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if (svga->bpp == 24)
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svga->hdisp = (svga->crtc[1] + 1) * 8;
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if ((svga->crtc[0x1e] & 0xA0) == 0xA0) svga->ma_latch |= 0x10000;
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if ((svga->crtc[0x27] & 0x01) == 0x01) svga->ma_latch |= 0x20000;
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if ((svga->crtc[0x27] & 0x02) == 0x02) svga->ma_latch |= 0x40000;
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if (tvga->oldctrl2 & 0x10)
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{
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svga->rowoffset <<= 1;
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svga->ma_latch <<= 1;
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}
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if (svga->gdcreg[0xf] & 0x08)
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{
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svga->htotal *= 2;
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svga->hdisp *= 2;
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svga->hdisp_time *= 2;
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}
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svga->interlace = (svga->crtc[0x1e] & 4);
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if (svga->interlace)
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svga->rowoffset >>= 1;
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if (tvga->card_id == TVGA8900CLD_ID)
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clksel = ((svga->miscout >> 2) & 3) | ((tvga->newctrl2 & 0x01) << 2) | ((tvga->oldctrl1 & 0x10) >> 1);
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else
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clksel = ((svga->miscout >> 2) & 3) | ((tvga->newctrl2 & 0x01) << 2) | ((tvga->newctrl2 & 0x40) >> 3);
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switch (clksel) {
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case 0x2: svga->clock = (cpuclock * (double)(1ull << 32)) / 44900000.0; break;
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case 0x3: svga->clock = (cpuclock * (double)(1ull << 32)) / 36000000.0; break;
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case 0x4: svga->clock = (cpuclock * (double)(1ull << 32)) / 57272000.0; break;
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case 0x5: svga->clock = (cpuclock * (double)(1ull << 32)) / 65000000.0; break;
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case 0x6: svga->clock = (cpuclock * (double)(1ull << 32)) / 50350000.0; break;
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case 0x7: svga->clock = (cpuclock * (double)(1ull << 32)) / 40000000.0; break;
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case 0x8: svga->clock = (cpuclock * (double)(1ull << 32)) / 88000000.0; break;
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case 0x9: svga->clock = (cpuclock * (double)(1ull << 32)) / 98000000.0; break;
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case 0xa: svga->clock = (cpuclock * (double)(1ull << 32)) / 118800000.0; break;
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case 0xb: svga->clock = (cpuclock * (double)(1ull << 32)) / 108000000.0; break;
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case 0xc: svga->clock = (cpuclock * (double)(1ull << 32)) / 72000000.0; break;
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case 0xd: svga->clock = (cpuclock * (double)(1ull << 32)) / 77000000.0; break;
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case 0xe: svga->clock = (cpuclock * (double)(1ull << 32)) / 80000000.0; break;
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case 0xf: svga->clock = (cpuclock * (double)(1ull << 32)) / 75000000.0; break;
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}
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if (tvga->card_id != TVGA8900CLD_ID) {
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/*TVGA9000 doesn't seem to have support for a 'high res' 256 colour mode
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(without the VGA pixel doubling). Instead it implements these modes by
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doubling the horizontal pixel count and pixel clock. Hence we use a
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basic heuristic to detect this*/
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if (svga->interlace)
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high_res_256 = (svga->htotal * 8) > (svga->vtotal * 4);
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else
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high_res_256 = (svga->htotal * 8) > (svga->vtotal * 2);
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}
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if ((tvga->oldctrl2 & 0x10) || high_res_256)
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{
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if (high_res_256)
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svga->hdisp /= 2;
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switch (svga->bpp)
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{
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case 8:
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svga->render = svga_render_8bpp_highres;
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break;
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case 15:
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svga->render = svga_render_15bpp_highres;
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svga->hdisp /= 2;
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break;
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case 16:
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svga->render = svga_render_16bpp_highres;
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svga->hdisp /= 2;
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break;
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case 24:
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svga->render = svga_render_24bpp_highres;
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svga->hdisp /= 3;
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break;
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}
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svga->lowres = 0;
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}
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}
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static void *tvga_init(const device_t *info)
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{
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const char *bios_fn;
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tvga_t *tvga = malloc(sizeof(tvga_t));
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memset(tvga, 0, sizeof(tvga_t));
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if (info->local == TVGA9000B_ID) {
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video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tvga9000);
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tvga->vram_size = 512 << 10;
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} else {
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video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tvga8900);
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tvga->vram_size = device_get_config_int("memory") << 10;
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}
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tvga->vram_mask = tvga->vram_size - 1;
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tvga->card_id = info->local;
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switch (info->local)
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{
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case TVGA8900B_ID:
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bios_fn = ROM_TVGA_8900B;
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break;
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case TVGA8900CLD_ID:
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bios_fn = ROM_TVGA_8900CLD;
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break;
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case TVGA9000B_ID:
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bios_fn = ROM_TVGA_9000B;
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break;
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default:
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free(tvga);
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return NULL;
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}
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rom_init(&tvga->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
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svga_init(info, &tvga->svga, tvga, tvga->vram_size,
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tvga_recalctimings,
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tvga_in, tvga_out,
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NULL,
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NULL);
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if (info->local != TVGA9000B_ID)
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tvga->svga.ramdac = device_add(&tkd8001_ramdac_device);
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io_sethandler(0x03c0, 0x0020, tvga_in, NULL, NULL, tvga_out, NULL, NULL, tvga);
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return tvga;
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}
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static int tvga8900b_available(void)
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{
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return rom_present(ROM_TVGA_8900B);
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}
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static int tvga8900d_available(void)
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{
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return rom_present(ROM_TVGA_8900CLD);
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}
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static int tvga9000b_available(void)
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{
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return rom_present(ROM_TVGA_9000B);
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}
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void tvga_close(void *p)
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{
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tvga_t *tvga = (tvga_t *)p;
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svga_close(&tvga->svga);
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free(tvga);
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}
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void tvga_speed_changed(void *p)
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{
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tvga_t *tvga = (tvga_t *)p;
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svga_recalctimings(&tvga->svga);
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}
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void tvga_force_redraw(void *p)
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{
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tvga_t *tvga = (tvga_t *)p;
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tvga->svga.fullchange = changeframecount;
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}
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static const device_config_t tvga_config[] =
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{
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{
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"memory", "Memory size", CONFIG_SELECTION, "", 1024, "", { 0 },
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{
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{
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"256 kB", 256
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},
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{
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"512 kB", 512
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},
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{
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"1 MB", 1024
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},
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/*Chip supports 2mb, but drivers are buggy*/
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{
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""
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}
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}
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},
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{
|
|
"", "", -1
|
|
}
|
|
};
|
|
|
|
const device_t tvga8900b_device =
|
|
{
|
|
"Trident TVGA 8900B",
|
|
DEVICE_ISA,
|
|
TVGA8900B_ID,
|
|
tvga_init,
|
|
tvga_close,
|
|
NULL,
|
|
{ tvga8900b_available },
|
|
tvga_speed_changed,
|
|
tvga_force_redraw,
|
|
tvga_config
|
|
};
|
|
|
|
const device_t tvga8900d_device =
|
|
{
|
|
"Trident TVGA 8900D",
|
|
DEVICE_ISA,
|
|
TVGA8900CLD_ID,
|
|
tvga_init,
|
|
tvga_close,
|
|
NULL,
|
|
{ tvga8900d_available },
|
|
tvga_speed_changed,
|
|
tvga_force_redraw,
|
|
tvga_config
|
|
};
|
|
|
|
const device_t tvga9000b_device =
|
|
{
|
|
"Trident TVGA 9000B",
|
|
DEVICE_ISA,
|
|
TVGA9000B_ID,
|
|
tvga_init,
|
|
tvga_close,
|
|
NULL,
|
|
{ tvga9000b_available },
|
|
tvga_speed_changed,
|
|
tvga_force_redraw,
|
|
NULL
|
|
};
|