186 lines
4.9 KiB
C
186 lines
4.9 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Emulation of C&T CS8230 ("386/AT") chipset.
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*
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*
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*
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* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
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*
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* Copyright 2020 Sarah Walker.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/io.h>
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#include <86box/device.h>
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#include <86box/mem.h>
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#include <86box/plat_unused.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/chipset.h>
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typedef struct cs8230_t {
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int idx;
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uint8_t regs[256];
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} cs8230_t;
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static void
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shadow_control(uint32_t addr, uint32_t size, int state)
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{
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switch (state) {
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case 0x00:
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mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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break;
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case 0x01:
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mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
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break;
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case 0x10:
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mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY);
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break;
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case 0x11:
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mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
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break;
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default:
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break;
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}
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flushmmucache_nopc();
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}
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static void
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rethink_shadow_mappings(cs8230_t *cs8230)
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{
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for (uint8_t c = 0; c < 32; c++) {
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/* Addresses 40000-bffff in 16k blocks */
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if (cs8230->regs[0xa + (c >> 3)] & (1 << (c & 7)))
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mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); /* I/O channel */
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else
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mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); /* System board */
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}
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for (uint8_t c = 0; c < 16; c++) {
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/* Addresses c0000-fffff in 16k blocks. System board ROM can be mapped here */
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if (cs8230->regs[0xe + (c >> 3)] & (1 << (c & 7)))
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mem_set_mem_state(0xc0000 + (c << 14), 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); /* I/O channel */
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else
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shadow_control(0xc0000 + (c << 14), 0x4000, (cs8230->regs[9] >> (3 - (c >> 2))) & 0x11);
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}
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}
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static uint8_t
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cs8230_read(uint16_t port, void *priv)
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{
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const cs8230_t *cs8230 = (cs8230_t *) priv;
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uint8_t ret = 0xff;
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if (port & 1) {
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switch (cs8230->idx) {
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case 0x04: /* 82C301 ID/version */
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ret = cs8230->regs[cs8230->idx] & ~0xe3;
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break;
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case 0x08: /* 82C302 ID/Version */
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ret = cs8230->regs[cs8230->idx] & ~0xe0;
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break;
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case 0x05:
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case 0x06: /* 82C301 registers */
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case 0x09:
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case 0x0a:
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case 0x0b:
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case 0x0c: /* 82C302 registers */
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case 0x0d:
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case 0x0e:
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case 0x0f:
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case 0x10:
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case 0x11:
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case 0x12:
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case 0x13:
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case 0x28:
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case 0x29:
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case 0x2a:
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ret = cs8230->regs[cs8230->idx];
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break;
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default:
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break;
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}
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}
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return ret;
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}
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static void
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cs8230_write(uint16_t port, uint8_t val, void *priv)
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{
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cs8230_t *cs8230 = (cs8230_t *) priv;
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if (!(port & 1))
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cs8230->idx = val;
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else {
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cs8230->regs[cs8230->idx] = val;
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switch (cs8230->idx) {
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case 0x09: /* RAM/ROM Configuration in boot area */
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case 0x0a:
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case 0x0b:
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case 0x0c:
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case 0x0d:
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case 0x0e:
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case 0x0f: /* Address maps */
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rethink_shadow_mappings(cs8230);
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break;
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default:
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break;
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}
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}
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}
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static void
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cs8230_close(void *priv)
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{
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cs8230_t *cs8230 = (cs8230_t *) priv;
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free(cs8230);
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}
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static void *
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cs8230_init(UNUSED(const device_t *info))
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{
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cs8230_t *cs8230 = (cs8230_t *) malloc(sizeof(cs8230_t));
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memset(cs8230, 0, sizeof(cs8230_t));
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io_sethandler(0x0022, 0x0002, cs8230_read, NULL, NULL, cs8230_write, NULL, NULL, cs8230);
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if (mem_size > 768) {
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mem_mapping_set_addr(&ram_mid_mapping, 0xa0000, mem_size > 1024 ? 0x60000 : 0x20000 + (mem_size - 768) * 1024);
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mem_mapping_set_exec(&ram_mid_mapping, ram + 0xa0000);
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}
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return cs8230;
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}
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const device_t cs8230_device = {
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.name = "C&T CS8230 (386/AT)",
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.internal_name = "cs8230",
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.flags = 0,
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.local = 0,
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.init = cs8230_init,
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.close = cs8230_close,
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.reset = NULL,
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{ .available = NULL },
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.speed_changed = NULL,
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.force_redraw = NULL,
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.config = NULL
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};
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