211 lines
6.1 KiB
C
211 lines
6.1 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of 486 Miscellaneous machines.
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2016-2025 Miran Grca.
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/io.h>
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#include <86box/device.h>
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#include <86box/chipset.h>
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#include <86box/keyboard.h>
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#include <86box/mem.h>
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#include <86box/nvr.h>
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#include <86box/pci.h>
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#include <86box/dma.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/fdc_ext.h>
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#include <86box/gameport.h>
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#include <86box/pic.h>
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#include <86box/pit.h>
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#include <86box/rom.h>
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#include <86box/sio.h>
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#include <86box/hdc.h>
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#include <86box/port_6x.h>
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#include <86box/port_92.h>
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#include <86box/video.h>
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#include <86box/flash.h>
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#include <86box/scsi_ncr53c8xx.h>
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#include <86box/hwm.h>
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#include <86box/machine.h>
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#include <86box/plat_unused.h>
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#include <86box/sound.h>
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/* STPC Client */
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int
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machine_at_itoxstar_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/itoxstar/STARA.ROM",
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0x000c0000, 262144, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init_ex(model, 2);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x1F, PCI_CARD_NORMAL, 1, 2, 3, 4);
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device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI));
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device_add(&stpc_client_device);
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device_add(&sst_flash_29ee020_device);
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device_add(&w83781d_device); /* fans: Chassis, CPU, unused; temperatures: Chassis, CPU, unused */
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hwm_values.fans[2] = 0; /* unused */
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hwm_values.temperatures[2] = 0; /* unused */
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hwm_values.voltages[0] = 0; /* Vcore unused */
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return ret;
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}
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/* STPC Consumer-II */
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int
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machine_at_arb1423c_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/arb1423c/A1423C.v12",
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0x000c0000, 262144, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init_ex(model, 2);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x1F, PCI_CARD_NORMAL, 1, 0, 0, 0);
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pci_register_slot(0x1E, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x1D, PCI_CARD_NORMAL, 3, 4, 1, 2);
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device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI));
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device_add(&stpc_consumer2_device);
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device_add(&winbond_flash_w29c020_device);
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return ret;
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}
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int
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machine_at_arb1479_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/arb1479/1479A.rom",
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0x000c0000, 262144, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init_ex(model, 2);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x1F, PCI_CARD_NORMAL, 1, 0, 0, 0);
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pci_register_slot(0x1E, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x1D, PCI_CARD_NORMAL, 3, 4, 1, 2);
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device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI));
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device_add(&stpc_consumer2_device);
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device_add(&winbond_flash_w29c020_device);
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return ret;
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}
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int
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machine_at_iach488_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/iach488/FH48800B.980",
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0x000c0000, 262144, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init_ex(model, 2);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI));
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device_add(&stpc_consumer2_device);
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device_add(&sst_flash_29ee020_device);
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return ret;
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}
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/* STPC Elite */
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int
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machine_at_pcm9340_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/pcm9340/9340v110.bin",
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0x000c0000, 262144, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init_ex(model, 2);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x1D, PCI_CARD_NORMAL, 4, 1, 2, 3);
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pci_register_slot(0x1E, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x1F, PCI_CARD_NORMAL, 2, 3, 4, 1);
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device_add_inst_params(&w83977_device, 1, (void *) (W83977F | W83977_AMI));
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device_add_inst_params(&w83977_device, 2, (void *) W83977F);
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device_add(&stpc_elite_device);
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device_add(&sst_flash_29ee020_device);
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return ret;
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}
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/* STPC Atlas */
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int
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machine_at_pcm5330_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/pcm5330/5330_13b.bin",
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0x000c0000, 262144, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init_ex(model, 2);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0D, PCI_CARD_SOUTHBRIDGE_IDE, 0, 0, 0, 0);
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pci_register_slot(0x0E, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4);
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pci_register_slot(0x13, PCI_CARD_NORMAL, 1, 2, 3, 4);
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device_add(&stpc_serial_device);
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device_add_params(&w83977_device, (void *) (W83977F | W83977_370 | W83977_AMI));
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device_add(&stpc_atlas_device);
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device_add(&sst_flash_29ee020_device);
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return ret;
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}
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