814 lines
24 KiB
C
814 lines
24 KiB
C
/*
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* VARCem Virtual ARchaeological Computer EMulator.
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* An emulator of (mostly) x86-based PC systems and devices,
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* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
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* spanning the era between 1981 and 1995.
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*
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* Implementation of a Clock/RTC Card for the ISA PC/XT.
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*
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* Systems starting with the PC/XT had, by default, a realtime
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* clock and NVR chip on the mainboard. The BIOS stored config
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* data in the NVR, and the system could maintain time and date
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* using the RTC.
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*
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* Originally, PC systems did not have this, and they first did
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* show up in non-IBM clone systems. Shortly after, expansion
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* cards with this function became available for the PC's (ISA)
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* bus, and they came in many forms and designs.
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*
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* This implementation offers some of those boards:
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*
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* Everex EV-170 (using NatSemi MM58167 chip)
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* DTK PII-147 Hexa I/O Plus (using UMC 82C8167 chip)
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*
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* and more will follow as time permits.
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*
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* NOTE: The IRQ functionalities have been implemented, but not yet
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* tested, as I need to write test software for them first :)
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*
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*
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*
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* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
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*
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* Copyright 2018 Fred N. van Kempen.
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*
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* Redistribution and use in source and binary forms, with
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* or without modification, are permitted provided that the
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* following conditions are met:
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*
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* 1. Redistributions of source code must retain the entire
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* above notice, this list of conditions and the following
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* disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the
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* following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names
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* of its contributors may be used to endorse or promote
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* products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdarg.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <stdlib.h>
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#include <time.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/machine.h>
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#include <86box/io.h>
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#include <86box/device.h>
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#include <86box/nvr.h>
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#include <86box/ui.h>
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#include <86box/plat.h>
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#include <86box/pic.h>
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#include <86box/isartc.h>
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#define ISARTC_EV170 0
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#define ISARTC_DTK 1
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#define ISARTC_P5PAK 2
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#define ISARTC_A6PAK 3
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#define ISARTC_VENDEX 4
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#define ISARTC_DEBUG 0
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typedef struct rtcdev_t {
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const char *name; /* board name */
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uint8_t board; /* board type */
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uint8_t flags; /* various flags */
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#define FLAG_YEAR80 0x01 /* YEAR byte is base-80 */
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#define FLAG_YEARBCD 0x02 /* YEAR byte is in BCD */
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int8_t irq; /* configured IRQ channel */
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int8_t base_addrsz;
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uint32_t base_addr; /* configured I/O address */
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/* Fields for the specific driver. */
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void (*f_wr)(uint16_t, uint8_t, void *);
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uint8_t (*f_rd)(uint16_t, void *);
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int8_t year; /* register for YEAR value */
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char pad[3];
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nvr_t nvr; /* RTC/NVR */
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} rtcdev_t;
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/************************************************************************
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* *
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* Driver for the NatSemi MM58167 chip. *
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* *
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************************************************************************/
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#define MM67_REGS 32
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/* Define the RTC chip registers - see datasheet, pg4. */
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#define MM67_MSEC 0 /* milliseconds */
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#define MM67_HUNTEN 1 /* hundredths/tenths of seconds */
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#define MM67_SEC 2 /* seconds */
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#define MM67_MIN 3 /* minutes */
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#define MM67_HOUR 4 /* hours */
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#define MM67_DOW 5 /* day of the week */
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#define MM67_DOM 6 /* day of the month */
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#define MM67_MON 7 /* month */
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#define MM67_AL_MSEC 8 /* milliseconds */
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#define MM67_AL_HUNTEN 9 /* hundredths/tenths of seconds */
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#define MM67_AL_SEC 10 /* seconds */
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#define MM67_AL_MIN 11 /* minutes */
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#define MM67_AL_HOUR 12 /* hours */
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#define MM67_AL_DOW 13 /* day of the week */
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#define MM67_AL_DOM 14 /* day of the month */
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#define MM67_AL_MON 15 /* month */
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#define MM67_AL_DONTCARE 0xc0 /* always match in compare */
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#define MM67_ISTAT 16 /* IRQ status */
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#define MM67_ICTRL 17 /* IRQ control */
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#define MM67INT_COMPARE 0x01 /* Compare */
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#define MM67INT_TENTH 0x02 /* Tenth */
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#define MM67INT_SEC 0x04 /* Second */
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#define MM67INT_MIN 0x08 /* Minute */
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#define MM67INT_HOUR 0x10 /* Hour */
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#define MM67INT_DAY 0x20 /* Day */
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#define MM67INT_WEEK 0x40 /* Week */
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#define MM67INT_MON 0x80 /* Month */
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#define MM67_RSTCTR 18 /* reset counters */
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#define MM67_RSTRAM 19 /* reset RAM */
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#define MM67_STATUS 20 /* status bit */
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#define MM67_GOCMD 21 /* GO Command */
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#define MM67_STBYIRQ 22 /* standby IRQ */
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#define MM67_TEST 31 /* test mode */
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#ifdef ENABLE_ISARTC_LOG
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int isartc_do_log = ENABLE_ISARTC_LOG;
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static void
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isartc_log(const char *fmt, ...)
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{
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va_list ap;
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if (isartc_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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# define isartc_log(fmt, ...)
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#endif
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/* Check if the current time matches a set alarm time. */
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static int8_t
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mm67_chkalrm(nvr_t *nvr, int8_t addr)
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{
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return ((nvr->regs[addr - MM67_AL_SEC + MM67_SEC] == nvr->regs[addr]) || ((nvr->regs[addr] & MM67_AL_DONTCARE) == MM67_AL_DONTCARE));
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}
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/*
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* This is called every second through the NVR/RTC hook.
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*
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* We fake a 'running' RTC by updating its registers on
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* each passing second. Not exactly accurate, but good
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* enough.
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*
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* Note that this code looks nasty because of all the
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* BCD to decimal vv going on.
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*/
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static void
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mm67_tick(nvr_t *nvr)
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{
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const rtcdev_t *dev = (rtcdev_t *) nvr->data;
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uint8_t *regs = nvr->regs;
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int mon;
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int year;
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int f = 0;
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/* Update and set interrupt if needed. */
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regs[MM67_SEC] = RTC_BCDINC(nvr->regs[MM67_SEC], 1);
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if (regs[MM67_ICTRL] & MM67INT_SEC)
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f = MM67INT_SEC;
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/* Roll over? */
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if (regs[MM67_SEC] >= RTC_BCD(60)) {
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/* Update and set interrupt if needed. */
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regs[MM67_SEC] = RTC_BCD(0);
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regs[MM67_MIN] = RTC_BCDINC(regs[MM67_MIN], 1);
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if (regs[MM67_ICTRL] & MM67INT_MIN)
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f = MM67INT_MIN;
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/* Roll over? */
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if (regs[MM67_MIN] >= RTC_BCD(60)) {
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/* Update and set interrupt if needed. */
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regs[MM67_MIN] = RTC_BCD(0);
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regs[MM67_HOUR] = RTC_BCDINC(regs[MM67_HOUR], 1);
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if (regs[MM67_ICTRL] & MM67INT_HOUR)
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f = MM67INT_HOUR;
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/* Roll over? */
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if (regs[MM67_HOUR] >= RTC_BCD(24)) {
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/* Update and set interrupt if needed. */
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regs[MM67_HOUR] = RTC_BCD(0);
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regs[MM67_DOW] = RTC_BCDINC(regs[MM67_DOW], 1);
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if (regs[MM67_ICTRL] & MM67INT_DAY)
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f = MM67INT_DAY;
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/* Roll over? */
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if (regs[MM67_DOW] > RTC_BCD(7)) {
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/* Update and set interrupt if needed. */
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regs[MM67_DOW] = RTC_BCD(1);
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if (regs[MM67_ICTRL] & MM67INT_WEEK)
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f = MM67INT_WEEK;
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}
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/* Roll over? */
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regs[MM67_DOM] = RTC_BCDINC(regs[MM67_DOM], 1);
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mon = RTC_DCB(regs[MM67_MON]);
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if (dev->year != -1) {
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if (dev->flags & FLAG_YEARBCD)
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year = RTC_DCB(regs[dev->year]);
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else
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year = regs[dev->year];
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if (dev->flags & FLAG_YEAR80)
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year += 80;
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} else
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year = 80;
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year += 1900;
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if (RTC_DCB(regs[MM67_DOM]) > nvr_get_days(mon, year)) {
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/* Update and set interrupt if needed. */
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regs[MM67_DOM] = RTC_BCD(1);
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regs[MM67_MON] = RTC_BCDINC(regs[MM67_MON], 1);
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if (regs[MM67_ICTRL] & MM67INT_MON)
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f = MM67INT_MON;
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/* Roll over? */
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if (regs[MM67_MON] > RTC_BCD(12)) {
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/* Update. */
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regs[MM67_MON] = RTC_BCD(1);
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if (dev->year != -1) {
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year++;
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if (dev->flags & FLAG_YEAR80)
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year -= 80;
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if (dev->flags & FLAG_YEARBCD)
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regs[dev->year] = RTC_BCD(year % 100);
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else
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regs[dev->year] = year % 100;
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}
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}
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}
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}
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}
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}
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/* Check for programmed alarm interrupt. */
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if (regs[MM67_ICTRL] & MM67INT_COMPARE) {
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year = 1;
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for (mon = MM67_AL_SEC; mon <= MM67_AL_MON; mon++)
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if (mon != dev->year)
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year &= mm67_chkalrm(nvr, mon);
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f = year ? MM67INT_COMPARE : 0x00;
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}
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/* Raise the IRQ if needed (and if we have one..) */
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if (f != 0) {
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regs[MM67_ISTAT] = f;
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if (nvr->irq != -1)
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picint(1 << nvr->irq);
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}
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}
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/* Get the current NVR time. */
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static void
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mm67_time_get(nvr_t *nvr, struct tm *tm)
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{
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const rtcdev_t *dev = (rtcdev_t *) nvr->data;
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const uint8_t *regs = nvr->regs;
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/* NVR is in BCD data mode. */
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tm->tm_sec = RTC_DCB(regs[MM67_SEC]);
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tm->tm_min = RTC_DCB(regs[MM67_MIN]);
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tm->tm_hour = RTC_DCB(regs[MM67_HOUR]);
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tm->tm_wday = (RTC_DCB(regs[MM67_DOW]) - 1);
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tm->tm_mday = RTC_DCB(regs[MM67_DOM]);
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tm->tm_mon = (RTC_DCB(regs[MM67_MON]) - 1);
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if (dev->year != -1) {
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if (dev->flags & FLAG_YEARBCD)
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tm->tm_year = RTC_DCB(regs[dev->year]);
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else
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tm->tm_year = regs[dev->year];
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if (dev->flags & FLAG_YEAR80)
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tm->tm_year += 80;
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#ifdef MM67_CENTURY
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tm->tm_year += (regs[MM67_CENTURY] * 100) - 1900;
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#endif
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#if ISARTC_DEBUG > 1
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isartc_log("ISARTC: get_time: year=%i [%02x]\n", tm->tm_year, regs[dev->year]);
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#endif
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}
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}
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/* Set the current NVR time. */
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static void
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mm67_time_set(nvr_t *nvr, struct tm *tm)
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{
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const rtcdev_t *dev = (rtcdev_t *) nvr->data;
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uint8_t *regs = nvr->regs;
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int year;
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/* NVR is in BCD data mode. */
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regs[MM67_SEC] = RTC_BCD(tm->tm_sec);
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regs[MM67_MIN] = RTC_BCD(tm->tm_min);
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regs[MM67_HOUR] = RTC_BCD(tm->tm_hour);
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regs[MM67_DOW] = RTC_BCD(tm->tm_wday + 1);
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regs[MM67_DOM] = RTC_BCD(tm->tm_mday);
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regs[MM67_MON] = RTC_BCD(tm->tm_mon + 1);
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if (dev->year != -1) {
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year = tm->tm_year;
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if (dev->flags & FLAG_YEAR80)
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year -= 80;
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if (dev->flags & FLAG_YEARBCD)
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regs[dev->year] = RTC_BCD(year % 100);
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else
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regs[dev->year] = year % 100;
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#ifdef MM67_CENTURY
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regs[MM67_CENTURY] = (year + 1900) / 100;
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#endif
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#if ISARTC_DEBUG > 1
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isartc_log("ISARTC: set_time: [%02x] year=%i (%i)\n", regs[dev->year], year, tm->tm_year);
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#endif
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}
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}
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static void
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mm67_start(nvr_t *nvr)
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{
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struct tm tm;
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/* Initialize the internal and chip times. */
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if (time_sync) {
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/* Use the internal clock's time. */
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nvr_time_get(&tm);
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mm67_time_set(nvr, &tm);
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} else {
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/* Set the internal clock from the chip time. */
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mm67_time_get(nvr, &tm);
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nvr_time_set(&tm);
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}
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}
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/* Reset the RTC counters to a sane state. */
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static void
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mm67_reset(nvr_t *nvr)
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{
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/* Initialize the RTC to a known state. */
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for (uint8_t i = MM67_MSEC; i <= MM67_MON; i++)
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nvr->regs[i] = RTC_BCD(0);
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nvr->regs[MM67_DOW] = RTC_BCD(1);
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nvr->regs[MM67_DOM] = RTC_BCD(1);
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nvr->regs[MM67_MON] = RTC_BCD(1);
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}
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/* Handle a READ operation from one of our registers. */
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static uint8_t
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mm67_read(uint16_t port, void *priv)
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{
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rtcdev_t *dev = (rtcdev_t *) priv;
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int reg = port - dev->base_addr;
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uint8_t ret = 0xff;
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/* This chip is directly mapped on I/O. */
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cycles -= ISA_CYCLES(4);
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switch (reg) {
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case MM67_ISTAT: /* IRQ status (RO) */
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ret = dev->nvr.regs[reg];
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dev->nvr.regs[reg] = 0x00;
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if (dev->irq != -1)
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picintc(1 << dev->irq);
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break;
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case MM67_AL_MSEC:
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ret = dev->nvr.regs[reg] & 0xf0;
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break;
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case MM67_AL_DOW:
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ret = dev->nvr.regs[reg] & 0x0f;
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break;
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default:
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ret = dev->nvr.regs[reg];
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break;
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}
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#if ISARTC_DEBUG
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isartc_log("ISARTC: read(%04x) = %02x\n", port - dev->base_addr, ret);
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#endif
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return ret;
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}
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/* Handle a WRITE operation to one of our registers. */
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static void
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mm67_write(uint16_t port, uint8_t val, void *priv)
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{
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rtcdev_t *dev = (rtcdev_t *) priv;
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int reg = port - dev->base_addr;
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#if ISARTC_DEBUG
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isartc_log("ISARTC: write(%04x, %02x)\n", port - dev->base_addr, val);
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#endif
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/* This chip is directly mapped on I/O. */
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cycles -= ISA_CYCLES(4);
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switch (reg) {
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case MM67_ISTAT: /* intr status (RO) */
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break;
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case MM67_ICTRL: /* intr control */
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dev->nvr.regs[MM67_ISTAT] = 0x00;
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dev->nvr.regs[reg] = val;
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break;
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case MM67_RSTCTR:
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if (val == 0xff)
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mm67_reset(&dev->nvr);
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break;
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case MM67_RSTRAM:
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if (val == 0xff) {
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for (uint8_t i = MM67_AL_MSEC; i <= MM67_AL_MON; i++)
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dev->nvr.regs[i] = RTC_BCD(0);
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dev->nvr.regs[MM67_DOW] = RTC_BCD(1);
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dev->nvr.regs[MM67_DOM] = RTC_BCD(1);
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dev->nvr.regs[MM67_MON] = RTC_BCD(1);
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if (dev->year != -1) {
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val = (dev->flags & FLAG_YEAR80) ? 0 : 80;
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if (dev->flags & FLAG_YEARBCD)
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dev->nvr.regs[dev->year] = RTC_BCD(val);
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else
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dev->nvr.regs[dev->year] = val;
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#ifdef MM67_CENTURY
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dev->nvr.regs[MM67_CENTURY] = 19;
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#endif
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}
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}
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break;
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case MM67_STATUS: /* STATUS (RO) */
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break;
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case MM67_GOCMD:
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isartc_log("RTC: write gocmd=%02x\n", val);
|
|
break;
|
|
|
|
case MM67_STBYIRQ:
|
|
isartc_log("RTC: write stby=%02x\n", val);
|
|
break;
|
|
|
|
case MM67_TEST:
|
|
isartc_log("RTC: write test=%02x\n", val);
|
|
break;
|
|
|
|
case MM67_AL_MSEC:
|
|
dev->nvr.regs[reg] = val & 0xf0;
|
|
break;
|
|
|
|
case MM67_AL_DOW:
|
|
dev->nvr.regs[reg] = val & 0x0f;
|
|
break;
|
|
|
|
default:
|
|
dev->nvr.regs[reg] = val;
|
|
break;
|
|
}
|
|
}
|
|
|
|
/************************************************************************
|
|
* *
|
|
* Generic code for all supported chips. *
|
|
* *
|
|
************************************************************************/
|
|
|
|
/* Initialize the device for use. */
|
|
static void *
|
|
isartc_init(const device_t *info)
|
|
{
|
|
rtcdev_t *dev;
|
|
int is_at = IS_AT(machine);
|
|
is_at = is_at || !strcmp(machine_get_internal_name(), "xi8088");
|
|
|
|
/* Create a device instance. */
|
|
dev = (rtcdev_t *) malloc(sizeof(rtcdev_t));
|
|
memset(dev, 0x00, sizeof(rtcdev_t));
|
|
dev->name = info->name;
|
|
dev->board = info->local;
|
|
dev->irq = -1;
|
|
dev->year = -1;
|
|
dev->nvr.data = dev;
|
|
dev->nvr.size = 16;
|
|
|
|
/* Do per-board initialization. */
|
|
switch (dev->board) {
|
|
case ISARTC_EV170: /* Everex EV-170 Magic I/O */
|
|
dev->flags |= FLAG_YEAR80;
|
|
dev->base_addr = device_get_config_hex16("base");
|
|
dev->base_addrsz = 32;
|
|
dev->irq = device_get_config_int("irq");
|
|
dev->f_rd = mm67_read;
|
|
dev->f_wr = mm67_write;
|
|
dev->nvr.reset = mm67_reset;
|
|
dev->nvr.start = mm67_start;
|
|
dev->nvr.tick = mm67_tick;
|
|
dev->year = MM67_AL_DOM; /* year, NON STANDARD */
|
|
break;
|
|
|
|
case ISARTC_DTK: /* DTK PII-147 Hexa I/O Plus */
|
|
dev->flags |= FLAG_YEARBCD;
|
|
dev->base_addr = device_get_config_hex16("base");
|
|
dev->base_addrsz = 32;
|
|
dev->f_rd = mm67_read;
|
|
dev->f_wr = mm67_write;
|
|
dev->nvr.reset = mm67_reset;
|
|
dev->nvr.start = mm67_start;
|
|
dev->nvr.tick = mm67_tick;
|
|
dev->year = MM67_AL_HUNTEN; /* year, NON STANDARD */
|
|
break;
|
|
|
|
case ISARTC_P5PAK: /* Paradise Systems 5PAK */
|
|
case ISARTC_A6PAK: /* AST SixPakPlus */
|
|
dev->flags |= FLAG_YEAR80;
|
|
dev->base_addr = 0x02c0;
|
|
dev->base_addrsz = 32;
|
|
dev->irq = device_get_config_int("irq");
|
|
dev->f_rd = mm67_read;
|
|
dev->f_wr = mm67_write;
|
|
dev->nvr.reset = mm67_reset;
|
|
dev->nvr.start = mm67_start;
|
|
dev->nvr.tick = mm67_tick;
|
|
dev->year = MM67_AL_DOM; /* year, NON STANDARD */
|
|
break;
|
|
|
|
case ISARTC_VENDEX: /* Vendex HeadStart Turbo 888-XT RTC */
|
|
dev->flags |= FLAG_YEAR80 | FLAG_YEARBCD;
|
|
dev->base_addr = 0x0300;
|
|
dev->base_addrsz = 32;
|
|
dev->f_rd = mm67_read;
|
|
dev->f_wr = mm67_write;
|
|
dev->nvr.reset = mm67_reset;
|
|
dev->nvr.start = mm67_start;
|
|
dev->nvr.tick = mm67_tick;
|
|
dev->year = MM67_AL_DOM; /* year, NON STANDARD */
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
/* Say hello! */
|
|
isartc_log("ISARTC: %s (I/O=%04XH", info->name, dev->base_addr);
|
|
if (dev->irq != -1)
|
|
isartc_log(", IRQ%i", dev->irq);
|
|
isartc_log(")\n");
|
|
|
|
/* Set up an I/O port handler. */
|
|
io_sethandler(dev->base_addr, dev->base_addrsz,
|
|
dev->f_rd, NULL, NULL, dev->f_wr, NULL, NULL, dev);
|
|
|
|
/* Hook into the NVR backend. */
|
|
dev->nvr.fn = (char *) info->internal_name;
|
|
dev->nvr.irq = dev->irq;
|
|
if (!is_at)
|
|
nvr_init(&dev->nvr);
|
|
|
|
/* Let them know our device instance. */
|
|
return ((void *) dev);
|
|
}
|
|
|
|
/* Remove the device from the system. */
|
|
static void
|
|
isartc_close(void *priv)
|
|
{
|
|
rtcdev_t *dev = (rtcdev_t *) priv;
|
|
|
|
io_removehandler(dev->base_addr, dev->base_addrsz,
|
|
dev->f_rd, NULL, NULL, dev->f_wr, NULL, NULL, dev);
|
|
|
|
free(dev);
|
|
}
|
|
|
|
static const device_config_t ev170_config[] = {
|
|
// clang-format off
|
|
{
|
|
"base", "Address", CONFIG_HEX16, "", 0x02C0, "", { 0 },
|
|
{
|
|
{ "240H", 0x0240 },
|
|
{ "2C0H", 0x02c0 },
|
|
{ "" }
|
|
},
|
|
},
|
|
{
|
|
"irq", "IRQ", CONFIG_SELECTION, "", -1, "", { 0 },
|
|
{
|
|
{ "Disabled", -1 },
|
|
{ "IRQ2", 2 },
|
|
{ "IRQ5", 5 },
|
|
{ "IRQ7", 7 },
|
|
{ "" }
|
|
},
|
|
},
|
|
{ "", "", -1 }
|
|
// clang-format on
|
|
};
|
|
|
|
static const device_t ev170_device = {
|
|
.name = "Everex EV-170 Magic I/O",
|
|
.internal_name = "ev170",
|
|
.flags = DEVICE_ISA,
|
|
.local = ISARTC_EV170,
|
|
.init = isartc_init,
|
|
.close = isartc_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = ev170_config
|
|
};
|
|
|
|
static const device_config_t pii147_config[] = {
|
|
// clang-format off
|
|
{
|
|
"base", "Address", CONFIG_HEX16, "", 0x0240, "", { 0 },
|
|
{
|
|
{ "Clock 1", 0x0240 },
|
|
{ "Clock 2", 0x0340 },
|
|
{ "" }
|
|
},
|
|
},
|
|
{ "", "", -1 }
|
|
// clang-format on
|
|
};
|
|
|
|
static const device_t pii147_device = {
|
|
.name = "DTK PII-147 Hexa I/O Plus",
|
|
.internal_name = "pii147",
|
|
.flags = DEVICE_ISA,
|
|
.local = ISARTC_DTK,
|
|
.init = isartc_init,
|
|
.close = isartc_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = pii147_config
|
|
};
|
|
|
|
static const device_config_t p5pak_config[] = {
|
|
// clang-format off
|
|
{
|
|
"irq", "IRQ", CONFIG_SELECTION, "", -1, "", { 0 },
|
|
{
|
|
{ "Disabled", -1 },
|
|
{ "IRQ2", 2 },
|
|
{ "IRQ3", 3 },
|
|
{ "IRQ5", 5 },
|
|
{ "" }
|
|
},
|
|
},
|
|
{ "", "", -1 }
|
|
// clang-format on
|
|
};
|
|
|
|
static const device_t p5pak_device = {
|
|
.name = "Paradise Systems 5-PAK",
|
|
.internal_name = "p5pak",
|
|
.flags = DEVICE_ISA,
|
|
.local = ISARTC_P5PAK,
|
|
.init = isartc_init,
|
|
.close = isartc_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = p5pak_config
|
|
};
|
|
|
|
static const device_config_t a6pak_config[] = {
|
|
// clang-format off
|
|
{
|
|
"irq", "IRQ", CONFIG_SELECTION, "", -1, "", { 0 },
|
|
{
|
|
{ "Disabled", -1 },
|
|
{ "IRQ2", 2 },
|
|
{ "IRQ4", 4 },
|
|
{ "IRQ5", 5 },
|
|
{ "IRQ7", 7 },
|
|
{ "" }
|
|
},
|
|
},
|
|
{ "", "", -1 }
|
|
// clang-format on
|
|
};
|
|
|
|
static const device_t a6pak_device = {
|
|
.name = "AST SixPakPlus",
|
|
.internal_name = "a6pak",
|
|
.flags = DEVICE_ISA,
|
|
.local = ISARTC_A6PAK,
|
|
.init = isartc_init,
|
|
.close = isartc_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = a6pak_config
|
|
};
|
|
|
|
/* Onboard RTC devices */
|
|
const device_t vendex_xt_rtc_onboard_device = {
|
|
.name = "National Semiconductor MM58167 (Vendex)",
|
|
.internal_name = "vendex_xt_rtc",
|
|
.flags = DEVICE_ISA,
|
|
.local = ISARTC_VENDEX,
|
|
.init = isartc_init,
|
|
.close = isartc_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
static const struct {
|
|
const device_t *dev;
|
|
} boards[] = {
|
|
// clang-format off
|
|
{ &device_none },
|
|
{ &ev170_device },
|
|
{ &pii147_device },
|
|
{ &p5pak_device },
|
|
{ &a6pak_device },
|
|
{ NULL },
|
|
// clang-format on
|
|
};
|
|
|
|
void
|
|
isartc_reset(void)
|
|
{
|
|
if (isartc_type == 0)
|
|
return;
|
|
|
|
/* Add the device to the system. */
|
|
device_add(boards[isartc_type].dev);
|
|
}
|
|
|
|
const char *
|
|
isartc_get_internal_name(int board)
|
|
{
|
|
return device_get_internal_name(boards[board].dev);
|
|
}
|
|
|
|
int
|
|
isartc_get_from_internal_name(char *s)
|
|
{
|
|
int c = 0;
|
|
|
|
while (boards[c].dev != NULL) {
|
|
if (!strcmp(boards[c].dev->internal_name, s))
|
|
return c;
|
|
c++;
|
|
}
|
|
|
|
/* Not found. */
|
|
return 0;
|
|
}
|
|
|
|
const device_t *
|
|
isartc_get_device(int board)
|
|
{
|
|
return (boards[board].dev);
|
|
}
|
|
|
|
int
|
|
isartc_has_config(int board)
|
|
{
|
|
if (boards[board].dev == NULL)
|
|
return 0;
|
|
|
|
return (boards[board].dev->config ? 1 : 0);
|
|
}
|