846 lines
26 KiB
C
846 lines
26 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* VIA AC'97 audio controller emulation.
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*
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*
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*
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* Authors: RichardG, <richardg867@gmail.com>
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*
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* Copyright 2021 RichardG.
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/io.h>
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#include <86box/mem.h>
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#include <86box/pci.h>
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#include <86box/pic.h>
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#include <86box/snd_ac97.h>
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#include <86box/sound.h>
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#include <86box/timer.h>
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#include <86box/plat_unused.h>
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typedef struct ac97_via_sgd_t {
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uint8_t id;
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uint8_t always_run;
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struct _ac97_via_ *dev;
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uint32_t entry_ptr;
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uint32_t sample_ptr;
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uint32_t fifo_pos;
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uint32_t fifo_end;
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int32_t sample_count;
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uint8_t entry_flags;
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uint8_t fifo[32];
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uint8_t restart;
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int16_t out_l;
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int16_t out_r;
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int vol_l;
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int vol_r;
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int pos;
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int32_t buffer[SOUNDBUFLEN * 2];
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uint64_t timer_latch;
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pc_timer_t dma_timer;
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pc_timer_t poll_timer;
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} ac97_via_sgd_t;
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typedef struct _ac97_via_ {
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uint16_t audio_sgd_base;
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uint16_t audio_codec_base;
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uint16_t modem_sgd_base;
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uint16_t modem_codec_base;
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uint8_t sgd_regs[256];
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uint8_t pcm_enabled : 1;
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uint8_t fm_enabled : 1;
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uint8_t vsr_enabled : 1;
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struct {
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union {
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uint8_t regs_codec[2][128];
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uint8_t regs_linear[256];
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};
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} codec_shadow[2];
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uint8_t pci_slot;
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uint8_t irq_state;
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int irq_pin;
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ac97_codec_t *codec[2][2];
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ac97_via_sgd_t sgd[6];
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int master_vol_l;
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int master_vol_r;
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int cd_vol_l;
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int cd_vol_r;
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} ac97_via_t;
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#ifdef ENABLE_AC97_VIA_LOG
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int ac97_via_do_log = ENABLE_AC97_VIA_LOG;
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static void
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ac97_via_log(const char *fmt, ...)
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{
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va_list ap;
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if (ac97_via_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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# define ac97_via_log(fmt, ...)
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#endif
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static void ac97_via_sgd_process(void *priv);
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static void ac97_via_update_codec(ac97_via_t *dev);
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static void ac97_via_speed_changed(void *priv);
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static void ac97_via_filter_cd_audio(int channel, double *buffer, void *priv);
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void
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ac97_via_set_slot(void *priv, int slot, int irq_pin)
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{
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ac97_via_t *dev = (ac97_via_t *) priv;
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ac97_via_log("AC97 VIA: set_slot(%d, %d)\n", slot, irq_pin);
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dev->pci_slot = slot;
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dev->irq_pin = irq_pin;
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}
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uint8_t
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ac97_via_read_status(void *priv, uint8_t modem)
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{
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const ac97_via_t *dev = (ac97_via_t *) priv;
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uint8_t ret = 0x00;
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/* Flag each codec as ready if present. */
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for (uint8_t i = 0; i <= 1; i++) {
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if (dev->codec[modem][i])
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ret |= 0x01 << (i << 1);
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}
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ac97_via_log("AC97 VIA %d: read_status() = %02X\n", modem, ret);
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return ret;
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}
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void
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ac97_via_write_control(void *priv, uint8_t modem, uint8_t val)
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{
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ac97_via_t *dev = (ac97_via_t *) priv;
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uint8_t i;
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ac97_via_log("AC97 VIA %d: write_control(%02X)\n", modem, val);
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/* Reset codecs if requested. */
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if (!(val & 0x40)) {
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for (i = 0; i <= 1; i++) {
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if (dev->codec[modem][i])
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ac97_codec_reset(dev->codec[modem][i]);
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}
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}
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if (!modem) {
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/* Set the variable sample rate flag. */
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dev->vsr_enabled = (val & 0xf8) == 0xc8;
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/* Start or stop PCM playback. */
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i = (val & 0xf4) == 0xc4;
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if (i && !dev->pcm_enabled)
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timer_advance_u64(&dev->sgd[0].poll_timer, dev->sgd[0].timer_latch);
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dev->pcm_enabled = i;
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/* Start or stop FM playback. */
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i = (val & 0xf2) == 0xc2;
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if (i && !dev->fm_enabled)
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timer_advance_u64(&dev->sgd[2].poll_timer, dev->sgd[2].timer_latch);
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dev->fm_enabled = i;
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/* Update primary audio codec state. */
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if (dev->codec[0][0])
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ac97_via_update_codec(dev);
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}
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}
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static void
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ac97_via_update_irqs(ac97_via_t *dev)
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{
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/* Check interrupt flags in all SGDs. */
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for (uint8_t i = 0x00; i < ((sizeof(dev->sgd) / sizeof(dev->sgd[0])) << 4); i += 0x10) {
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/* Stop immediately if any flag is set. Doing it this way optimizes
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rising edges for the playback SGD (0 - first to be checked). */
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if (dev->sgd_regs[i] & (dev->sgd_regs[i | 0x2] & 0x03)) {
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pci_set_irq(dev->pci_slot, dev->irq_pin, &dev->irq_state);
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return;
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}
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}
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pci_clear_irq(dev->pci_slot, dev->irq_pin, &dev->irq_state);
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}
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static void
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ac97_via_update_codec(ac97_via_t *dev)
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{
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/* Get primary audio codec. */
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ac97_codec_t *codec = dev->codec[0][0];
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/* Update volumes according to codec registers. */
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ac97_codec_getattn(codec, 0x02, &dev->master_vol_l, &dev->master_vol_r);
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ac97_codec_getattn(codec, 0x18, &dev->sgd[0].vol_l, &dev->sgd[0].vol_r);
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ac97_codec_getattn(codec, 0x18, &dev->sgd[2].vol_l, &dev->sgd[2].vol_r); /* VIAFMTSR sets Master, CD and PCM volumes to 0 dB */
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ac97_codec_getattn(codec, 0x12, &dev->cd_vol_l, &dev->cd_vol_r);
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/* Update sample rate according to codec registers and the variable sample rate flag. */
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ac97_via_speed_changed(dev);
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}
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uint8_t
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ac97_via_sgd_read(uint16_t addr, void *priv)
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{
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const ac97_via_t *dev = (ac97_via_t *) priv;
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#ifdef ENABLE_AC97_VIA_LOG
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uint8_t modem = (addr & 0xff00) == dev->modem_sgd_base;
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#endif
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addr &= 0xff;
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uint8_t ret;
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if (!(addr & 0x80)) {
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/* Process SGD channel registers. */
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switch (addr & 0xf) {
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case 0x4:
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ret = dev->sgd[addr >> 4].entry_ptr;
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break;
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case 0x5:
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ret = dev->sgd[addr >> 4].entry_ptr >> 8;
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break;
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case 0x6:
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ret = dev->sgd[addr >> 4].entry_ptr >> 16;
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break;
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case 0x7:
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ret = dev->sgd[addr >> 4].entry_ptr >> 24;
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break;
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case 0xc:
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ret = dev->sgd[addr >> 4].sample_count;
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break;
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case 0xd:
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ret = dev->sgd[addr >> 4].sample_count >> 8;
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break;
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case 0xe:
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ret = dev->sgd[addr >> 4].sample_count >> 16;
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break;
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default:
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ret = dev->sgd_regs[addr];
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break;
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}
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} else {
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/* Process regular registers. */
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switch (addr) {
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case 0x84:
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ret = (dev->sgd_regs[0x00] & 0x01);
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ret |= (dev->sgd_regs[0x10] & 0x01) << 1;
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ret |= (dev->sgd_regs[0x20] & 0x01) << 2;
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ret |= (dev->sgd_regs[0x00] & 0x02) << 3;
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ret |= (dev->sgd_regs[0x10] & 0x02) << 4;
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ret |= (dev->sgd_regs[0x20] & 0x02) << 5;
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break;
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case 0x85:
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ret = (dev->sgd_regs[0x00] & 0x04) >> 2;
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ret |= (dev->sgd_regs[0x10] & 0x04) >> 1;
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ret |= (dev->sgd_regs[0x20] & 0x04);
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ret |= (dev->sgd_regs[0x00] & 0x80) >> 3;
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ret |= (dev->sgd_regs[0x10] & 0x80) >> 2;
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ret |= (dev->sgd_regs[0x20] & 0x80) >> 1;
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break;
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case 0x86:
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ret = (dev->sgd_regs[0x40] & 0x01);
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ret |= (dev->sgd_regs[0x50] & 0x01) << 1;
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ret |= (dev->sgd_regs[0x40] & 0x02) << 3;
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ret |= (dev->sgd_regs[0x50] & 0x02) << 4;
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break;
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case 0x87:
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ret = (dev->sgd_regs[0x40] & 0x04) >> 2;
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ret |= (dev->sgd_regs[0x50] & 0x04) >> 1;
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ret |= (dev->sgd_regs[0x40] & 0x80) >> 3;
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ret |= (dev->sgd_regs[0x50] & 0x80) >> 2;
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break;
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default:
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ret = dev->sgd_regs[addr];
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break;
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}
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}
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ac97_via_log("AC97 VIA %d: sgd_read(%02X) = %02X\n", modem, addr, ret);
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return ret;
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}
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void
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ac97_via_sgd_write(uint16_t addr, uint8_t val, void *priv)
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{
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ac97_via_t *dev = (ac97_via_t *) priv;
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uint8_t modem = (addr & 0xff00) == dev->modem_sgd_base;
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uint8_t i;
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ac97_codec_t *codec;
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addr &= 0xff;
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ac97_via_log("AC97 VIA %d: sgd_write(%02X, %02X)\n", modem, addr, val);
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/* Check function-specific read only registers. */
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if ((addr >= (modem ? 0x00 : 0x40)) && (addr < (modem ? 0x40 : 0x60)))
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return;
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if (addr >= (modem ? 0x90 : 0x88))
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return;
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if (!(addr & 0x80)) {
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/* Process SGD channel registers. */
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switch (addr & 0xf) {
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case 0x0:
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/* Clear RWC status bits. */
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dev->sgd_regs[addr] &= ~(val & 0x07);
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/* Update status interrupts. */
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ac97_via_update_irqs(dev);
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return;
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case 0x1:
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/* Start SGD if requested. */
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if (val & 0x80) {
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if (dev->sgd_regs[addr & 0xf0] & 0x80) {
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/* Queue SGD trigger if already running. */
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dev->sgd_regs[addr & 0xf0] |= 0x08;
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} else {
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/* Start SGD immediately. */
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dev->sgd_regs[addr & 0xf0] = (dev->sgd_regs[addr & 0xf0] & ~0x47) | 0x80;
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/* Start at the specified entry pointer. */
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dev->sgd[addr >> 4].entry_ptr = *((uint32_t *) &dev->sgd_regs[(addr & 0xf0) | 0x4]) & 0xfffffffe;
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dev->sgd[addr >> 4].restart = 2;
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/* Start the actual SGD process. */
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ac97_via_sgd_process(&dev->sgd[addr >> 4]);
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}
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}
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/* Stop SGD if requested. */
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if (val & 0x40)
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dev->sgd_regs[addr & 0xf0] &= ~0x88;
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val &= 0x08;
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/* (Un)pause SGD if requested. */
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if (val & 0x08)
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dev->sgd_regs[addr & 0xf0] |= 0x40;
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else
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dev->sgd_regs[addr & 0xf0] &= ~0x40;
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break;
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case 0x2:
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if (addr & 0x10)
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val &= 0xf3;
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break;
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case 0x3:
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case 0x8 ... 0xf:
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/* Read-only registers. */
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return;
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default:
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break;
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}
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} else {
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/* Process regular registers. */
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switch (addr) {
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case 0x30 ... 0x3f:
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case 0x60 ... 0x7f:
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case 0x84 ... 0x87:
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/* Read-only registers. */
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return;
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case 0x82:
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/* Determine the selected codec. */
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i = !!(dev->sgd_regs[0x83] & 0x40);
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codec = dev->codec[modem][i];
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/* Keep value in register if this codec is not present. */
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if (codec) {
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/* Read from or write to codec. */
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if (val & 0x80) {
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if (val & 1) { /* return 0x0000 on unaligned reads (real 686B behavior) */
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dev->sgd_regs[0x80] = dev->sgd_regs[0x81] = 0x00;
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} else {
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*((uint16_t *) &dev->codec_shadow[modem].regs_codec[i][val & 0x7f]) = *((uint16_t *) &dev->sgd_regs[0x80]) = ac97_codec_readw(codec, val);
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}
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/* Flag data/status/index for this codec as valid. */
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dev->sgd_regs[0x83] |= 0x02 << (i << 1);
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} else if (!(val & 1)) { /* do nothing on unaligned writes */
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ac97_codec_writew(codec, val,
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*((uint16_t *) &dev->codec_shadow[modem].regs_codec[i][val & 0x7f]) = *((uint16_t *) &dev->sgd_regs[0x80]));
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/* Update primary audio codec state if that codec was written to. */
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if (!modem && !i) {
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ac97_via_update_codec(dev);
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/* Set up CD audio filter if CD volume was written to. Setting it
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up at init prevents CD audio from working on other cards, but
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this works as the CD channel is muted by default per AC97 spec. */
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if (val == 0x12)
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sound_set_cd_audio_filter(ac97_via_filter_cd_audio, dev);
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}
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}
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}
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break;
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case 0x83:
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/* Clear RWC status bits. */
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#if 0 /* race condition with Linux accessing a register and clearing status bits on the same dword write */
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val = (dev->sgd_regs[addr] & ~(val & 0x0a)) | (val & 0xc0);
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#else
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val = dev->sgd_regs[addr] | (val & 0xc0);
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#endif
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break;
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default:
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break;
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}
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}
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dev->sgd_regs[addr] = val;
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}
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void
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ac97_via_remap_audio_sgd(void *priv, uint16_t new_io_base, uint8_t enable)
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{
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ac97_via_t *dev = (ac97_via_t *) priv;
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if (dev->audio_sgd_base)
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io_removehandler(dev->audio_sgd_base, 256, ac97_via_sgd_read, NULL, NULL, ac97_via_sgd_write, NULL, NULL, dev);
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dev->audio_sgd_base = new_io_base;
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if (dev->audio_sgd_base && enable)
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io_sethandler(dev->audio_sgd_base, 256, ac97_via_sgd_read, NULL, NULL, ac97_via_sgd_write, NULL, NULL, dev);
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}
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void
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ac97_via_remap_modem_sgd(void *priv, uint16_t new_io_base, uint8_t enable)
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{
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ac97_via_t *dev = (ac97_via_t *) priv;
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if (dev->modem_sgd_base)
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io_removehandler(dev->modem_sgd_base, 256, ac97_via_sgd_read, NULL, NULL, ac97_via_sgd_write, NULL, NULL, dev);
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dev->modem_sgd_base = new_io_base;
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if (dev->modem_sgd_base && enable)
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io_sethandler(dev->modem_sgd_base, 256, ac97_via_sgd_read, NULL, NULL, ac97_via_sgd_write, NULL, NULL, dev);
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}
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uint8_t
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ac97_via_codec_read(uint16_t addr, void *priv)
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{
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const ac97_via_t *dev = (ac97_via_t *) priv;
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uint8_t modem = (addr & 0xff00) == dev->modem_codec_base;
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uint8_t ret = 0xff;
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addr &= 0xff;
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ret = dev->codec_shadow[modem].regs_linear[addr];
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ac97_via_log("AC97 VIA %d: codec_read(%02X) = %02X\n", modem, addr, ret);
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return ret;
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}
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void
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ac97_via_codec_write(uint16_t addr, uint8_t val, void *priv)
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{
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ac97_via_t *dev = (ac97_via_t *) priv;
|
|
uint8_t modem = (addr & 0xff00) == dev->modem_codec_base;
|
|
addr &= 0xff;
|
|
|
|
ac97_via_log("AC97 VIA %d: codec_write(%02X, %02X)\n", modem, addr, val);
|
|
|
|
/* Unknown behavior, maybe it does write to the shadow registers? */
|
|
dev->codec_shadow[modem].regs_linear[addr] = val;
|
|
}
|
|
|
|
void
|
|
ac97_via_remap_audio_codec(void *priv, uint16_t new_io_base, uint8_t enable)
|
|
{
|
|
ac97_via_t *dev = (ac97_via_t *) priv;
|
|
|
|
if (dev->audio_codec_base)
|
|
io_removehandler(dev->audio_codec_base, 256, ac97_via_codec_read, NULL, NULL, ac97_via_codec_write, NULL, NULL, dev);
|
|
|
|
dev->audio_codec_base = new_io_base;
|
|
|
|
if (dev->audio_codec_base && enable)
|
|
io_sethandler(dev->audio_codec_base, 256, ac97_via_codec_read, NULL, NULL, ac97_via_codec_write, NULL, NULL, dev);
|
|
}
|
|
|
|
void
|
|
ac97_via_remap_modem_codec(void *priv, uint16_t new_io_base, uint8_t enable)
|
|
{
|
|
ac97_via_t *dev = (ac97_via_t *) priv;
|
|
|
|
if (dev->modem_codec_base)
|
|
io_removehandler(dev->modem_codec_base, 256, ac97_via_codec_read, NULL, NULL, ac97_via_codec_write, NULL, NULL, dev);
|
|
|
|
dev->modem_codec_base = new_io_base;
|
|
|
|
if (dev->modem_codec_base && enable)
|
|
io_sethandler(dev->modem_codec_base, 256, ac97_via_codec_read, NULL, NULL, ac97_via_codec_write, NULL, NULL, dev);
|
|
}
|
|
|
|
static void
|
|
ac97_via_update_stereo(ac97_via_t *dev, ac97_via_sgd_t *sgd)
|
|
{
|
|
int32_t l = (((sgd->out_l * sgd->vol_l) >> 15) * dev->master_vol_l) >> 15;
|
|
int32_t r = (((sgd->out_r * sgd->vol_r) >> 15) * dev->master_vol_r) >> 15;
|
|
|
|
if (l < -32768)
|
|
l = -32768;
|
|
else if (l > 32767)
|
|
l = 32767;
|
|
if (r < -32768)
|
|
r = -32768;
|
|
else if (r > 32767)
|
|
r = 32767;
|
|
|
|
for (; sgd->pos < sound_pos_global; sgd->pos++) {
|
|
sgd->buffer[sgd->pos * 2] = l;
|
|
sgd->buffer[sgd->pos * 2 + 1] = r;
|
|
}
|
|
}
|
|
|
|
static void
|
|
ac97_via_sgd_process(void *priv)
|
|
{
|
|
ac97_via_sgd_t *sgd = (ac97_via_sgd_t *) priv;
|
|
ac97_via_t *dev = sgd->dev;
|
|
|
|
/* Stop if this SGD is not active. */
|
|
uint8_t sgd_status = dev->sgd_regs[sgd->id] & 0xc4;
|
|
if (!(sgd_status & 0x80))
|
|
return;
|
|
|
|
/* Schedule next run. */
|
|
timer_on_auto(&sgd->dma_timer, 10.0);
|
|
|
|
/* Process SGD if it's active, and the FIFO has room or is disabled. */
|
|
if (((sgd_status & 0xc7) == 0x80) && (sgd->always_run || ((sgd->fifo_end - sgd->fifo_pos) <= (sizeof(sgd->fifo) - 4)))) {
|
|
/* Move on to the next block if no entry is present. */
|
|
if (sgd->restart) {
|
|
/* (Re)load entry pointer if required. */
|
|
if (sgd->restart & 2)
|
|
sgd->entry_ptr = *((uint32_t *) &dev->sgd_regs[sgd->id | 0x4]) & 0xfffffffe; /* TODO: probe real hardware - does "even addr" actually mean dword aligned? */
|
|
sgd->restart = 0;
|
|
|
|
/* Read entry. */
|
|
sgd->sample_ptr = mem_readl_phys(sgd->entry_ptr);
|
|
sgd->entry_ptr += 4;
|
|
sgd->sample_count = mem_readl_phys(sgd->entry_ptr);
|
|
sgd->entry_ptr += 4;
|
|
#ifdef ENABLE_AC97_VIA_LOG
|
|
if (((sgd->sample_ptr == 0xffffffff) && (sgd->sample_count == 0xffffffff)) || ((sgd->sample_ptr == 0x00000000) && (sgd->sample_count == 0x00000000)))
|
|
fatal("AC97 VIA: Invalid SGD %d entry %08X%08X at %08X\n", sgd->id >> 4,
|
|
sgd->sample_ptr, sgd->sample_count, sgd->entry_ptr - 8);
|
|
#endif
|
|
|
|
/* Extract flags from the most significant byte. */
|
|
sgd->entry_flags = sgd->sample_count >> 24;
|
|
sgd->sample_count &= 0xffffff;
|
|
|
|
ac97_via_log("AC97 VIA: Starting SGD %d block at %08X start %08X len %06X flags %02X\n", sgd->id >> 4,
|
|
sgd->entry_ptr - 8, sgd->sample_ptr, sgd->sample_count, sgd->entry_flags);
|
|
}
|
|
|
|
if (sgd->id & 0x10) {
|
|
/* Write channel: read data from FIFO. */
|
|
mem_writel_phys(sgd->sample_ptr, *((uint32_t *) &sgd->fifo[sgd->fifo_end & (sizeof(sgd->fifo) - 1)]));
|
|
} else {
|
|
/* Read channel: write data to FIFO. */
|
|
*((uint32_t *) &sgd->fifo[sgd->fifo_end & (sizeof(sgd->fifo) - 1)]) = mem_readl_phys(sgd->sample_ptr);
|
|
}
|
|
sgd->fifo_end += 4;
|
|
sgd->sample_ptr += 4;
|
|
sgd->sample_count -= 4;
|
|
|
|
/* Check if we've hit the end of this block. */
|
|
if (sgd->sample_count <= 0) {
|
|
ac97_via_log("AC97 VIA: Ending SGD %d block", sgd->id >> 4);
|
|
|
|
/* Move on to the next block on the next run, unless overridden below. */
|
|
sgd->restart = 1;
|
|
|
|
if (sgd->entry_flags & 0x20) {
|
|
ac97_via_log(" with STOP");
|
|
|
|
/* Raise STOP to pause SGD. */
|
|
dev->sgd_regs[sgd->id] |= 0x04;
|
|
}
|
|
|
|
if (sgd->entry_flags & 0x40) {
|
|
ac97_via_log(" with FLAG");
|
|
|
|
/* Raise FLAG to pause SGD. */
|
|
dev->sgd_regs[sgd->id] |= 0x01;
|
|
|
|
#ifdef ENABLE_AC97_VIA_LOG
|
|
if (dev->sgd_regs[sgd->id | 0x2] & 0x01)
|
|
ac97_via_log(" interrupt");
|
|
#endif
|
|
}
|
|
|
|
if (sgd->entry_flags & 0x80) {
|
|
ac97_via_log(" with EOL");
|
|
|
|
/* Raise EOL. */
|
|
dev->sgd_regs[sgd->id] |= 0x02;
|
|
|
|
#ifdef ENABLE_AC97_VIA_LOG
|
|
if (dev->sgd_regs[sgd->id | 0x2] & 0x02)
|
|
ac97_via_log(" interrupt");
|
|
#endif
|
|
|
|
/* Restart SGD if a trigger is queued or auto-start is enabled. */
|
|
if ((dev->sgd_regs[sgd->id] & 0x08) || (dev->sgd_regs[sgd->id | 0x2] & 0x80)) {
|
|
ac97_via_log(" restart");
|
|
|
|
/* Un-queue trigger. */
|
|
dev->sgd_regs[sgd->id] &= ~0x08;
|
|
|
|
/* Go back to the starting block on the next run. */
|
|
sgd->restart = 2;
|
|
} else {
|
|
ac97_via_log(" finish");
|
|
|
|
/* Terminate SGD. */
|
|
dev->sgd_regs[sgd->id] &= ~0x80;
|
|
}
|
|
}
|
|
ac97_via_log("\n");
|
|
|
|
/* Fire any requested status interrupts. */
|
|
ac97_via_update_irqs(dev);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void
|
|
ac97_via_poll_stereo(void *priv)
|
|
{
|
|
ac97_via_t *dev = (ac97_via_t *) priv;
|
|
ac97_via_sgd_t *sgd = &dev->sgd[0]; /* Audio Read */
|
|
|
|
/* Schedule next run if PCM playback is enabled. */
|
|
if (dev->pcm_enabled)
|
|
timer_advance_u64(&sgd->poll_timer, sgd->timer_latch);
|
|
|
|
/* Update stereo audio buffer. */
|
|
ac97_via_update_stereo(dev, sgd);
|
|
|
|
/* Feed next sample from the FIFO. */
|
|
switch (dev->sgd_regs[sgd->id | 0x2] & 0x30) {
|
|
case 0x00: /* Mono, 8-bit PCM */
|
|
if ((sgd->fifo_end - sgd->fifo_pos) >= 1) {
|
|
sgd->out_l = sgd->out_r = (sgd->fifo[sgd->fifo_pos++ & (sizeof(sgd->fifo) - 1)] ^ 0x80) << 8;
|
|
return;
|
|
}
|
|
break;
|
|
|
|
case 0x10: /* Stereo, 8-bit PCM */
|
|
if ((sgd->fifo_end - sgd->fifo_pos) >= 2) {
|
|
sgd->out_l = (sgd->fifo[sgd->fifo_pos++ & (sizeof(sgd->fifo) - 1)] ^ 0x80) << 8;
|
|
sgd->out_r = (sgd->fifo[sgd->fifo_pos++ & (sizeof(sgd->fifo) - 1)] ^ 0x80) << 8;
|
|
return;
|
|
}
|
|
break;
|
|
|
|
case 0x20: /* Mono, 16-bit PCM */
|
|
if ((sgd->fifo_end - sgd->fifo_pos) >= 2) {
|
|
sgd->out_l = sgd->out_r = *((uint16_t *) &sgd->fifo[sgd->fifo_pos & (sizeof(sgd->fifo) - 1)]);
|
|
sgd->fifo_pos += 2;
|
|
return;
|
|
}
|
|
break;
|
|
|
|
case 0x30: /* Stereo, 16-bit PCM */
|
|
if ((sgd->fifo_end - sgd->fifo_pos) >= 4) {
|
|
sgd->out_l = *((uint16_t *) &sgd->fifo[sgd->fifo_pos & (sizeof(sgd->fifo) - 1)]);
|
|
sgd->fifo_pos += 2;
|
|
sgd->out_r = *((uint16_t *) &sgd->fifo[sgd->fifo_pos & (sizeof(sgd->fifo) - 1)]);
|
|
sgd->fifo_pos += 2;
|
|
return;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
/* Feed silence if the FIFO is empty. */
|
|
sgd->out_l = sgd->out_r = 0;
|
|
}
|
|
|
|
static void
|
|
ac97_via_poll_fm(void *priv)
|
|
{
|
|
ac97_via_t *dev = (ac97_via_t *) priv;
|
|
ac97_via_sgd_t *sgd = &dev->sgd[2]; /* FM Read */
|
|
|
|
/* Schedule next run if FM playback is enabled. */
|
|
if (dev->fm_enabled)
|
|
timer_advance_u64(&sgd->poll_timer, sgd->timer_latch);
|
|
|
|
/* Update FM audio buffer. */
|
|
ac97_via_update_stereo(dev, sgd);
|
|
|
|
/* Feed next sample from the FIFO.
|
|
The data format is not documented, but it probes as 16-bit stereo at 24 KHz. */
|
|
if ((sgd->fifo_end - sgd->fifo_pos) >= 4) {
|
|
sgd->out_l = *((uint16_t *) &sgd->fifo[sgd->fifo_pos & (sizeof(sgd->fifo) - 1)]);
|
|
sgd->fifo_pos += 2;
|
|
sgd->out_r = *((uint16_t *) &sgd->fifo[sgd->fifo_pos & (sizeof(sgd->fifo) - 1)]);
|
|
sgd->fifo_pos += 2;
|
|
return;
|
|
}
|
|
|
|
/* Feed silence if the FIFO is empty. */
|
|
sgd->out_l = sgd->out_r = 0;
|
|
}
|
|
|
|
static void
|
|
ac97_via_get_buffer(int32_t *buffer, int len, void *priv)
|
|
{
|
|
ac97_via_t *dev = (ac97_via_t *) priv;
|
|
|
|
ac97_via_update_stereo(dev, &dev->sgd[0]);
|
|
ac97_via_update_stereo(dev, &dev->sgd[2]);
|
|
|
|
for (int c = 0; c < len * 2; c++) {
|
|
buffer[c] += dev->sgd[0].buffer[c] / 2;
|
|
buffer[c] += dev->sgd[2].buffer[c] / 2;
|
|
}
|
|
|
|
dev->sgd[0].pos = dev->sgd[2].pos = 0;
|
|
}
|
|
|
|
static void
|
|
ac97_via_filter_cd_audio(int channel, double *buffer, void *priv)
|
|
{
|
|
const ac97_via_t *dev = (ac97_via_t *) priv;
|
|
double c;
|
|
double volume = channel ? dev->cd_vol_r : dev->cd_vol_l;
|
|
|
|
c = ((*buffer) * volume) / 65536.0;
|
|
*buffer = c;
|
|
}
|
|
|
|
static void
|
|
ac97_via_speed_changed(void *priv)
|
|
{
|
|
ac97_via_t *dev = (ac97_via_t *) priv;
|
|
double freq;
|
|
|
|
/* Get variable sample rate if enabled. */
|
|
if (dev->vsr_enabled && dev->codec[0][0])
|
|
freq = ac97_codec_getrate(dev->codec[0][0], 0x2c);
|
|
else
|
|
freq = (double) SOUND_FREQ;
|
|
|
|
dev->sgd[0].timer_latch = (uint64_t) ((double) TIMER_USEC * (1000000.0 / freq));
|
|
dev->sgd[2].timer_latch = (uint64_t) ((double) TIMER_USEC * (1000000.0 / 24000.0)); /* FM operates at a fixed 24 KHz */
|
|
}
|
|
|
|
static void *
|
|
ac97_via_init(UNUSED(const device_t *info))
|
|
{
|
|
ac97_via_t *dev = calloc(1, sizeof(ac97_via_t));
|
|
|
|
ac97_via_log("AC97 VIA: init()\n");
|
|
|
|
/* Set up codecs. */
|
|
ac97_codec = &dev->codec[0][0];
|
|
ac97_modem_codec = &dev->codec[1][0];
|
|
ac97_codec_count = ac97_modem_codec_count = sizeof(dev->codec[0]) / sizeof(dev->codec[0][0]);
|
|
ac97_codec_id = ac97_modem_codec_id = 0;
|
|
|
|
/* Set up SGD channels. */
|
|
for (uint8_t i = 0; i < (sizeof(dev->sgd) / sizeof(dev->sgd[0])); i++) {
|
|
dev->sgd[i].id = i << 4;
|
|
dev->sgd[i].dev = dev;
|
|
|
|
/* Disable the FIFO on SGDs we don't care about. */
|
|
if ((i != 0) && (i != 2))
|
|
dev->sgd[i].always_run = 1;
|
|
|
|
timer_add(&dev->sgd[i].dma_timer, ac97_via_sgd_process, &dev->sgd[i], 0);
|
|
}
|
|
|
|
/* Set up playback pollers. */
|
|
timer_add(&dev->sgd[0].poll_timer, ac97_via_poll_stereo, dev, 0);
|
|
timer_add(&dev->sgd[2].poll_timer, ac97_via_poll_fm, dev, 0);
|
|
ac97_via_speed_changed(dev);
|
|
|
|
/* Set up playback handler. */
|
|
sound_add_handler(ac97_via_get_buffer, dev);
|
|
|
|
return dev;
|
|
}
|
|
|
|
static void
|
|
ac97_via_close(void *priv)
|
|
{
|
|
ac97_via_t *dev = (ac97_via_t *) priv;
|
|
|
|
ac97_via_log("AC97 VIA: close()\n");
|
|
|
|
free(dev);
|
|
}
|
|
|
|
const device_t ac97_via_device = {
|
|
.name = "VIA VT82C686 Integrated AC97 Controller",
|
|
.internal_name = "ac97_via",
|
|
.flags = DEVICE_PCI,
|
|
.local = 0,
|
|
.init = ac97_via_init,
|
|
.close = ac97_via_close,
|
|
.reset = NULL,
|
|
.available = NULL,
|
|
.speed_changed = ac97_via_speed_changed,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|