188 lines
6.2 KiB
C
188 lines
6.2 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the NEC uPD-765 and compatible floppy disk
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* controller.
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*
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*
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*
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* Authors: Sarah Walker, <tommowalker@tommowalker.co.uk>
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* Miran Grca, <mgrca8@gmail.com>
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* Fred N. van Kempen, <decwiz@yahoo.com>
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*
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* Copyright 2008-2020 Sarah Walker.
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* Copyright 2016-2020 Miran Grca.
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* Copyright 2018-2020 Fred N. van Kempen.
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*/
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#ifndef EMU_FDC_H
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# define EMU_FDC_H
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extern int fdc_type;
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#define FDC_FLAG_PCJR 0x01 /* PCjr */
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#define FDC_FLAG_DISKCHG_ACTLOW 0x02 /* Amstrad, PS/1, PS/2 ISA */
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#define FDC_FLAG_AT 0x04 /* AT+, PS/x */
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#define FDC_FLAG_PS1 0x08 /* PS/1, PS/2 ISA */
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#define FDC_FLAG_SUPERIO 0x10 /* Super I/O chips */
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#define FDC_FLAG_START_RWC_1 0x20 /* W83877F, W83977F */
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#define FDC_FLAG_MORE_TRACKS 0x40 /* W83877F, W83977F, PC87306, PC87309 */
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#define FDC_FLAG_NSC 0x80 /* PC87306, PC87309 */
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#define FDC_FLAG_TOSHIBA 0x100 /* T1000, T1200 */
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#define FDC_FLAG_AMSTRAD 0x200 /* Non-AT Amstrad machines */
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#define FDC_FLAG_UMC 0x400 /* UMC UM8398 */
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typedef struct {
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uint8_t dor, stat, command, processed_cmd, dat, st0, swap, dtl;
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uint8_t swwp, disable_write, st5, st6, error;
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uint8_t params[8], res[11];
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uint8_t specify[2];
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uint8_t config, pretrk;
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uint8_t fifobuf[16];
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uint16_t base_address;
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int head, sector, drive, lastdrive;
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int pcn[4], eot[4];
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int rw_track, pos;
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int pnum, ptot;
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int rate, reset_stat;
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int lock, perp;
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int format_state, format_n;
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int step, seek_dir;
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int tc, noprec;
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int data_ready, inread;
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int bitcell_period, enh_mode;
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int rwc[4], drvrate[4];
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int boot_drive, dma;
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int densel_polarity, densel_force;
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int fifo, tfifo;
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int fifobufpos, drv2en;
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int gap;
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int enable_3f1, format_sectors;
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int max_track, mfm;
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int deleted, wrong_am;
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int sc, satisfying_sectors;
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int fintr, rw_drive;
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int flags, interrupt;
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int irq; /* Should be 6 by default. */
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int dma_ch; /* Should be 2 by default. */
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int bit_rate; /* Should be 250 at start. */
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int paramstogo;
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sector_id_t read_track_sector, format_sector_id;
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uint64_t watchdog_count;
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pc_timer_t timer, watchdog_timer;
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} fdc_t;
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extern void fdc_remove(fdc_t *fdc);
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extern void fdc_poll(fdc_t *fdc);
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extern void fdc_abort(fdc_t *fdc);
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extern void fdc_set_dskchg_activelow(fdc_t *fdc);
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extern void fdc_3f1_enable(fdc_t *fdc, int enable);
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extern int fdc_get_bit_rate(fdc_t *fdc);
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extern int fdc_get_bitcell_period(fdc_t *fdc);
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/* A few functions to communicate between Super I/O chips and the FDC. */
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extern void fdc_update_enh_mode(fdc_t *fdc, int enh_mode);
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extern int fdc_get_rwc(fdc_t *fdc, int drive);
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extern void fdc_update_rwc(fdc_t *fdc, int drive, int rwc);
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extern int fdc_get_boot_drive(fdc_t *fdc);
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extern void fdc_update_boot_drive(fdc_t *fdc, int boot_drive);
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extern void fdc_update_densel_polarity(fdc_t *fdc, int densel_polarity);
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extern uint8_t fdc_get_densel_polarity(fdc_t *fdc);
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extern void fdc_update_densel_force(fdc_t *fdc, int densel_force);
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extern void fdc_update_drvrate(fdc_t *fdc, int drive, int drvrate);
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extern void fdc_update_drv2en(fdc_t *fdc, int drv2en);
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extern void fdc_noidam(fdc_t *fdc);
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extern void fdc_nosector(fdc_t *fdc);
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extern void fdc_nodataam(fdc_t *fdc);
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extern void fdc_cannotformat(fdc_t *fdc);
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extern void fdc_wrongcylinder(fdc_t *fdc);
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extern void fdc_badcylinder(fdc_t *fdc);
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extern void fdc_writeprotect(fdc_t *fdc);
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extern void fdc_datacrcerror(fdc_t *fdc);
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extern void fdc_headercrcerror(fdc_t *fdc);
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extern void fdc_nosector(fdc_t *fdc);
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extern int real_drive(fdc_t *fdc, int drive);
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extern sector_id_t fdc_get_read_track_sector(fdc_t *fdc);
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extern int fdc_get_compare_condition(fdc_t *fdc);
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extern int fdc_is_deleted(fdc_t *fdc);
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extern int fdc_is_sk(fdc_t *fdc);
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extern void fdc_set_wrong_am(fdc_t *fdc);
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extern int fdc_get_drive(fdc_t *fdc);
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extern int fdc_get_perp(fdc_t *fdc);
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extern int fdc_get_format_n(fdc_t *fdc);
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extern int fdc_is_mfm(fdc_t *fdc);
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extern double fdc_get_hut(fdc_t *fdc);
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extern double fdc_get_hlt(fdc_t *fdc);
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extern void fdc_request_next_sector_id(fdc_t *fdc);
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extern void fdc_stop_id_request(fdc_t *fdc);
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extern int fdc_get_gap(fdc_t *fdc);
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extern int fdc_get_gap2(fdc_t *fdc, int drive);
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extern int fdc_get_dtl(fdc_t *fdc);
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extern int fdc_get_format_sectors(fdc_t *fdc);
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extern uint8_t fdc_get_swwp(fdc_t *fdc);
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extern void fdc_set_swwp(fdc_t *fdc, uint8_t swwp);
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extern uint8_t fdc_get_diswr(fdc_t *fdc);
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extern void fdc_set_diswr(fdc_t *fdc, uint8_t diswr);
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extern uint8_t fdc_get_swap(fdc_t *fdc);
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extern void fdc_set_swap(fdc_t *fdc, uint8_t swap);
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extern void fdc_finishcompare(fdc_t *fdc, int satisfying);
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extern void fdc_finishread(fdc_t *fdc);
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extern void fdc_sector_finishcompare(fdc_t *fdc, int satisfying);
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extern void fdc_sector_finishread(fdc_t *fdc);
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extern void fdc_track_finishread(fdc_t *fdc, int condition);
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extern int fdc_is_verify(fdc_t *fdc);
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extern void fdc_overrun(fdc_t *fdc);
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extern void fdc_set_base(fdc_t *fdc, int base);
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extern void fdc_set_irq(fdc_t *fdc, int irq);
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extern void fdc_set_dma_ch(fdc_t *fdc, int dma_ch);
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extern int fdc_getdata(fdc_t *fdc, int last);
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extern int fdc_data(fdc_t *fdc, uint8_t data);
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extern void fdc_sectorid(fdc_t *fdc, uint8_t track, uint8_t side,
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uint8_t sector, uint8_t size, uint8_t crc1,
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uint8_t crc2);
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extern uint8_t fdc_read(uint16_t addr, void *priv);
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extern void fdc_reset(void *priv);
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extern uint8_t fdc_get_current_drive(void);
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#ifdef EMU_DEVICE_H
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extern const device_t fdc_xt_device;
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extern const device_t fdc_xt_t1x00_device;
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extern const device_t fdc_xt_tandy_device;
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extern const device_t fdc_xt_amstrad_device;
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extern const device_t fdc_pcjr_device;
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extern const device_t fdc_at_device;
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extern const device_t fdc_at_actlow_device;
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extern const device_t fdc_at_ps1_device;
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extern const device_t fdc_at_smc_device;
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extern const device_t fdc_at_winbond_device;
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extern const device_t fdc_at_nsc_device;
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extern const device_t fdc_dp8473_device;
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extern const device_t fdc_um8398_device;
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#endif
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#endif /*EMU_FDC_H*/
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