600 lines
21 KiB
C
600 lines
21 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the Intel 1 Mbit and 2 Mbit, 8-bit and
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* 16-bit flash devices.
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*
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*
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*
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* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
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* Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2008-2020 Sarah Walker.
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* Copyright 2016-2020 Miran Grca.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <stdlib.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/mem.h>
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#include <86box/machine.h>
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#include <86box/timer.h>
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#include <86box/nvr.h>
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#include <86box/plat.h>
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#define FLAG_WORD 4
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#define FLAG_BXB 2
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#define FLAG_INV_A16 1
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enum {
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BLOCK_MAIN1,
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BLOCK_MAIN2,
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BLOCK_MAIN3,
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BLOCK_MAIN4,
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BLOCK_DATA1,
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BLOCK_DATA2,
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BLOCK_BOOT,
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BLOCKS_NUM
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};
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enum {
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CMD_READ_ARRAY = 0xff,
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CMD_IID = 0x90,
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CMD_READ_STATUS = 0x70,
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CMD_CLEAR_STATUS = 0x50,
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CMD_ERASE_SETUP = 0x20,
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CMD_ERASE_CONFIRM = 0xd0,
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CMD_ERASE_SUSPEND = 0xb0,
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CMD_PROGRAM_SETUP = 0x40,
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CMD_PROGRAM_SETUP_ALT = 0x10
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};
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typedef struct flash_t {
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uint8_t command;
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uint8_t status;
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uint8_t pad;
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uint8_t flags;
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uint8_t *array;
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uint16_t flash_id;
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uint16_t pad16;
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uint32_t program_addr;
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uint32_t block_start[BLOCKS_NUM];
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uint32_t block_end[BLOCKS_NUM];
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uint32_t block_len[BLOCKS_NUM];
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mem_mapping_t mapping[4];
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mem_mapping_t mapping_h[16];
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} flash_t;
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static char flash_path[1024];
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static uint8_t
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flash_read(uint32_t addr, void *priv)
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{
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const flash_t *dev = (flash_t *) priv;
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uint8_t ret = 0xff;
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if (dev->flags & FLAG_INV_A16)
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addr ^= 0x10000;
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addr &= biosmask;
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switch (dev->command) {
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default:
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case CMD_READ_ARRAY:
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ret = dev->array[addr];
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break;
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case CMD_IID:
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if (addr & 1)
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ret = dev->flash_id & 0xff;
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else
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ret = 0x89;
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break;
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case CMD_READ_STATUS:
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ret = dev->status;
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break;
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}
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return ret;
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}
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static uint16_t
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flash_readw(uint32_t addr, void *priv)
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{
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flash_t *dev = (flash_t *) priv;
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const uint16_t *q;
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uint16_t ret = 0xffff;
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if (dev->flags & FLAG_INV_A16)
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addr ^= 0x10000;
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addr &= biosmask;
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if (dev->flags & FLAG_WORD)
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addr &= 0xfffffffe;
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q = (uint16_t *) &(dev->array[addr]);
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ret = *q;
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if (dev->flags & FLAG_WORD)
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switch (dev->command) {
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default:
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case CMD_READ_ARRAY:
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break;
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case CMD_IID:
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if (addr & 2)
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ret = dev->flash_id;
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else
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ret = 0x0089;
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break;
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case CMD_READ_STATUS:
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ret = dev->status;
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break;
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}
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return ret;
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}
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static uint32_t
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flash_readl(uint32_t addr, void *priv)
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{
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flash_t *dev = (flash_t *) priv;
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const uint32_t *q;
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if (dev->flags & FLAG_INV_A16)
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addr ^= 0x10000;
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addr &= biosmask;
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q = (uint32_t *) &(dev->array[addr]);
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return *q;
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}
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static void
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flash_write(uint32_t addr, uint8_t val, void *priv)
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{
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flash_t *dev = (flash_t *) priv;
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uint32_t bb_mask = biosmask & 0xffffe000;
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if (biosmask == 0x7ffff)
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bb_mask &= 0xffff8000;
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else if (biosmask == 0x3ffff)
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bb_mask &= 0xffffc000;
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if (dev->flags & FLAG_INV_A16)
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addr ^= 0x10000;
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addr &= biosmask;
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switch (dev->command) {
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case CMD_ERASE_SETUP:
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if (val == CMD_ERASE_CONFIRM) {
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for (uint8_t i = 0; i < 6; i++) {
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if ((i == dev->program_addr) && (addr >= dev->block_start[i]) && (addr <= dev->block_end[i]))
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memset(&(dev->array[dev->block_start[i]]), 0xff, dev->block_len[i]);
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}
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dev->status = 0x80;
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}
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dev->command = CMD_READ_STATUS;
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break;
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case CMD_PROGRAM_SETUP:
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case CMD_PROGRAM_SETUP_ALT:
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if (((addr & bb_mask) != (dev->block_start[6] & bb_mask)) && (addr == dev->program_addr))
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dev->array[addr] = val;
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dev->command = CMD_READ_STATUS;
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dev->status = 0x80;
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break;
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default:
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dev->command = val;
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switch (val) {
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case CMD_CLEAR_STATUS:
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dev->status = 0;
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break;
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case CMD_ERASE_SETUP:
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for (uint8_t i = 0; i < 7; i++) {
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if ((addr >= dev->block_start[i]) && (addr <= dev->block_end[i]))
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dev->program_addr = i;
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}
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break;
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case CMD_PROGRAM_SETUP:
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case CMD_PROGRAM_SETUP_ALT:
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dev->program_addr = addr;
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break;
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default:
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break;
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}
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}
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}
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static void
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flash_writew(uint32_t addr, uint16_t val, void *priv)
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{
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flash_t *dev = (flash_t *) priv;
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uint32_t bb_mask = biosmask & 0xffffe000;
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if (biosmask == 0x7ffff)
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bb_mask &= 0xffff8000;
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else if (biosmask == 0x3ffff)
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bb_mask &= 0xffffc000;
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if (dev->flags & FLAG_INV_A16)
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addr ^= 0x10000;
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addr &= biosmask;
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if (dev->flags & FLAG_WORD)
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switch (dev->command) {
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case CMD_ERASE_SETUP:
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if (val == CMD_ERASE_CONFIRM) {
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for (uint8_t i = 0; i < 6; i++) {
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if ((i == dev->program_addr) && (addr >= dev->block_start[i]) && (addr <= dev->block_end[i]))
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memset(&(dev->array[dev->block_start[i]]), 0xff, dev->block_len[i]);
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}
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dev->status = 0x80;
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}
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dev->command = CMD_READ_STATUS;
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break;
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case CMD_PROGRAM_SETUP:
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case CMD_PROGRAM_SETUP_ALT:
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if (((addr & bb_mask) != (dev->block_start[6] & bb_mask)) && (addr == dev->program_addr))
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*(uint16_t *) (&dev->array[addr]) = val;
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dev->command = CMD_READ_STATUS;
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dev->status = 0x80;
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break;
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default:
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dev->command = val & 0xff;
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switch (val) {
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case CMD_CLEAR_STATUS:
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dev->status = 0;
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break;
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case CMD_ERASE_SETUP:
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for (uint8_t i = 0; i < 7; i++) {
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if ((addr >= dev->block_start[i]) && (addr <= dev->block_end[i]))
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dev->program_addr = i;
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}
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break;
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case CMD_PROGRAM_SETUP:
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case CMD_PROGRAM_SETUP_ALT:
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dev->program_addr = addr;
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break;
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default:
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break;
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}
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}
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}
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static void
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flash_writel(UNUSED(uint32_t addr), UNUSED(uint32_t val), UNUSED(void *priv))
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{
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#if 0
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flash_writew(addr, val & 0xffff, priv);
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flash_writew(addr + 2, (val >> 16) & 0xffff, priv);
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#endif
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}
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static void
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intel_flash_add_mappings(flash_t *dev)
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{
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uint8_t max = 2;
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uint32_t base;
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uint32_t fbase;
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uint32_t sub = 0x20000;
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if (biosmask == 0x7ffff) {
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sub = 0x80000;
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max = 8;
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} else if (biosmask == 0x3ffff) {
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sub = 0x40000;
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max = 4;
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}
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for (uint8_t i = 0; i < max; i++) {
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if (biosmask == 0x7ffff)
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base = 0x80000 + (i << 16);
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else if (biosmask == 0x3ffff)
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base = 0xc0000 + (i << 16);
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else
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base = 0xe0000 + (i << 16);
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fbase = base & biosmask;
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if (dev->flags & FLAG_INV_A16)
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fbase ^= 0x10000;
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memcpy(&dev->array[fbase], &rom[base & biosmask], 0x10000);
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if ((max == 2) || (i >= 2)) {
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mem_mapping_add(&(dev->mapping[i]), base, 0x10000,
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flash_read, flash_readw, flash_readl,
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flash_write, flash_writew, flash_writel,
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dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
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}
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mem_mapping_add(&(dev->mapping_h[i]), (base | 0xfff00000) - sub, 0x10000,
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flash_read, flash_readw, flash_readl,
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flash_write, flash_writew, flash_writel,
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dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
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mem_mapping_add(&(dev->mapping_h[i + max]), (base | 0xfff00000), 0x10000,
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flash_read, flash_readw, flash_readl,
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flash_write, flash_writew, flash_writel,
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dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
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}
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}
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static void
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intel_flash_reset(void *priv)
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{
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flash_t *dev = (flash_t *) priv;
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dev->command = CMD_READ_ARRAY;
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dev->status = 0;
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}
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static void *
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intel_flash_init(const device_t *info)
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{
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FILE *fp;
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flash_t *dev;
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uint8_t type = info->local & 0xff;
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dev = malloc(sizeof(flash_t));
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memset(dev, 0, sizeof(flash_t));
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sprintf(flash_path, "%s.bin", machine_get_internal_name_ex(machine));
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dev->flags = info->local & 0xff;
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mem_mapping_disable(&bios_mapping);
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mem_mapping_disable(&bios_high_mapping);
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dev->array = (uint8_t *) malloc(biosmask + 1);
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memset(dev->array, 0xff, biosmask + 1);
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switch (biosmask) {
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case 0x7ffff:
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if (dev->flags & FLAG_WORD)
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dev->flash_id = (dev->flags & FLAG_BXB) ? 0x4471 : 0x4470;
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else
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dev->flash_id = (dev->flags & FLAG_BXB) ? 0x8A : 0x89;
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/* The block lengths are the same both flash types. */
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dev->block_len[BLOCK_MAIN1] = 0x20000;
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dev->block_len[BLOCK_MAIN2] = 0x20000;
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dev->block_len[BLOCK_MAIN3] = 0x20000;
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dev->block_len[BLOCK_MAIN4] = 0x18000;
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dev->block_len[BLOCK_DATA1] = 0x02000;
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dev->block_len[BLOCK_DATA2] = 0x02000;
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dev->block_len[BLOCK_BOOT] = 0x04000;
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if (dev->flags & FLAG_BXB) { /* 28F004BX-T/28F400BX-B */
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dev->block_start[BLOCK_BOOT] = 0x00000; /* MAIN BLOCK 1 */
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dev->block_end[BLOCK_BOOT] = 0x1ffff;
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dev->block_start[BLOCK_DATA2] = 0x20000; /* MAIN BLOCK 2 */
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dev->block_end[BLOCK_DATA2] = 0x3ffff;
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dev->block_start[BLOCK_DATA1] = 0x40000; /* MAIN BLOCK 3 */
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dev->block_end[BLOCK_DATA1] = 0x5ffff;
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dev->block_start[BLOCK_MAIN4] = 0x60000; /* MAIN BLOCK 4 */
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dev->block_end[BLOCK_MAIN4] = 0x77fff;
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dev->block_start[BLOCK_MAIN3] = 0x78000; /* DATA AREA 1 BLOCK */
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dev->block_end[BLOCK_MAIN3] = 0x79fff;
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dev->block_start[BLOCK_MAIN2] = 0x7a000; /* DATA AREA 2 BLOCK */
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dev->block_end[BLOCK_MAIN2] = 0x7bfff;
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dev->block_start[BLOCK_MAIN1] = 0x7c000; /* BOOT BLOCK */
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dev->block_end[BLOCK_MAIN1] = 0x7ffff;
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} else {
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dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */
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dev->block_end[BLOCK_MAIN1] = 0x1ffff;
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dev->block_start[BLOCK_MAIN2] = 0x20000; /* MAIN BLOCK 2 */
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dev->block_end[BLOCK_MAIN2] = 0x3ffff;
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dev->block_start[BLOCK_MAIN3] = 0x40000; /* MAIN BLOCK 3 */
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dev->block_end[BLOCK_MAIN3] = 0x5ffff;
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dev->block_start[BLOCK_MAIN4] = 0x60000; /* MAIN BLOCK 4 */
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dev->block_end[BLOCK_MAIN4] = 0x77fff;
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dev->block_start[BLOCK_DATA1] = 0x78000; /* DATA AREA 1 BLOCK */
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dev->block_end[BLOCK_DATA1] = 0x79fff;
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dev->block_start[BLOCK_DATA2] = 0x7a000; /* DATA AREA 2 BLOCK */
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dev->block_end[BLOCK_DATA2] = 0x7bfff;
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dev->block_start[BLOCK_BOOT] = 0x7c000; /* BOOT BLOCK */
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dev->block_end[BLOCK_BOOT] = 0x7ffff;
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}
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break;
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case 0x3ffff:
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if (dev->flags & FLAG_WORD)
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dev->flash_id = (dev->flags & FLAG_BXB) ? 0x2275 : 0x2274;
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else
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dev->flash_id = (dev->flags & FLAG_BXB) ? 0x7D : 0x7C;
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/* The block lengths are the same both flash types. */
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dev->block_len[BLOCK_MAIN1] = 0x20000;
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dev->block_len[BLOCK_MAIN2] = 0x18000;
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dev->block_len[BLOCK_MAIN3] = 0x00000;
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dev->block_len[BLOCK_MAIN4] = 0x00000;
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dev->block_len[BLOCK_DATA1] = 0x02000;
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dev->block_len[BLOCK_DATA2] = 0x02000;
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dev->block_len[BLOCK_BOOT] = 0x04000;
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if (dev->flags & FLAG_BXB) { /* 28F002BX-B/28F200BX-B */
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dev->block_start[BLOCK_MAIN1] = 0x20000; /* MAIN BLOCK 1 */
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dev->block_end[BLOCK_MAIN1] = 0x3ffff;
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dev->block_start[BLOCK_MAIN2] = 0x08000; /* MAIN BLOCK 2 */
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dev->block_end[BLOCK_MAIN2] = 0x1ffff;
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dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */
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dev->block_end[BLOCK_MAIN3] = 0xfffff;
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dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */
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dev->block_end[BLOCK_MAIN4] = 0xfffff;
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dev->block_start[BLOCK_DATA1] = 0x06000; /* DATA AREA 1 BLOCK */
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dev->block_end[BLOCK_DATA1] = 0x07fff;
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dev->block_start[BLOCK_DATA2] = 0x04000; /* DATA AREA 2 BLOCK */
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dev->block_end[BLOCK_DATA2] = 0x05fff;
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dev->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */
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dev->block_end[BLOCK_BOOT] = 0x03fff;
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} else { /* 28F002BX-T/28F200BX-T */
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dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */
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dev->block_end[BLOCK_MAIN1] = 0x1ffff;
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dev->block_start[BLOCK_MAIN2] = 0x20000; /* MAIN BLOCK 2 */
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dev->block_end[BLOCK_MAIN2] = 0x37fff;
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dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */
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dev->block_end[BLOCK_MAIN3] = 0xfffff;
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dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */
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dev->block_end[BLOCK_MAIN4] = 0xfffff;
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dev->block_start[BLOCK_DATA1] = 0x38000; /* DATA AREA 1 BLOCK */
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dev->block_end[BLOCK_DATA1] = 0x39fff;
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dev->block_start[BLOCK_DATA2] = 0x3a000; /* DATA AREA 2 BLOCK */
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dev->block_end[BLOCK_DATA2] = 0x3bfff;
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dev->block_start[BLOCK_BOOT] = 0x3c000; /* BOOT BLOCK */
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dev->block_end[BLOCK_BOOT] = 0x3ffff;
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}
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break;
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default:
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dev->flash_id = (type & FLAG_BXB) ? 0x95 : 0x94;
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/* The block lengths are the same both flash types. */
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dev->block_len[BLOCK_MAIN1] = 0x1c000;
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dev->block_len[BLOCK_MAIN2] = 0x00000;
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dev->block_len[BLOCK_MAIN3] = 0x00000;
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dev->block_len[BLOCK_MAIN4] = 0x00000;
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dev->block_len[BLOCK_DATA1] = 0x01000;
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dev->block_len[BLOCK_DATA2] = 0x01000;
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dev->block_len[BLOCK_BOOT] = 0x02000;
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if (dev->flags & FLAG_BXB) { /* 28F001BX-B/28F100BX-B */
|
|
dev->block_start[BLOCK_MAIN1] = 0x04000; /* MAIN BLOCK 1 */
|
|
dev->block_end[BLOCK_MAIN1] = 0x1ffff;
|
|
dev->block_start[BLOCK_MAIN2] = 0xfffff; /* MAIN BLOCK 2 */
|
|
dev->block_end[BLOCK_MAIN2] = 0xfffff;
|
|
dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */
|
|
dev->block_end[BLOCK_MAIN3] = 0xfffff;
|
|
dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */
|
|
dev->block_end[BLOCK_MAIN4] = 0xfffff;
|
|
dev->block_start[BLOCK_DATA1] = 0x02000; /* DATA AREA 1 BLOCK */
|
|
dev->block_end[BLOCK_DATA1] = 0x02fff;
|
|
dev->block_start[BLOCK_DATA2] = 0x03000; /* DATA AREA 2 BLOCK */
|
|
dev->block_end[BLOCK_DATA2] = 0x03fff;
|
|
dev->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */
|
|
dev->block_end[BLOCK_BOOT] = 0x01fff;
|
|
} else { /* 28F001BX-T/28F100BX-T */
|
|
dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */
|
|
dev->block_end[BLOCK_MAIN1] = 0x1bfff;
|
|
dev->block_start[BLOCK_MAIN2] = 0xfffff; /* MAIN BLOCK 2 */
|
|
dev->block_end[BLOCK_MAIN2] = 0xfffff;
|
|
dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */
|
|
dev->block_end[BLOCK_MAIN3] = 0xfffff;
|
|
dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */
|
|
dev->block_end[BLOCK_MAIN4] = 0xfffff;
|
|
dev->block_start[BLOCK_DATA1] = 0x1c000; /* DATA AREA 1 BLOCK */
|
|
dev->block_end[BLOCK_DATA1] = 0x1cfff;
|
|
dev->block_start[BLOCK_DATA2] = 0x1d000; /* DATA AREA 2 BLOCK */
|
|
dev->block_end[BLOCK_DATA2] = 0x1dfff;
|
|
dev->block_start[BLOCK_BOOT] = 0x1e000; /* BOOT BLOCK */
|
|
dev->block_end[BLOCK_BOOT] = 0x1ffff;
|
|
}
|
|
break;
|
|
}
|
|
|
|
intel_flash_add_mappings(dev);
|
|
|
|
dev->command = CMD_READ_ARRAY;
|
|
dev->status = 0;
|
|
|
|
fp = nvr_fopen(flash_path, "rb");
|
|
if (fp) {
|
|
(void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, fp);
|
|
if (dev->block_len[BLOCK_MAIN2])
|
|
(void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, fp);
|
|
if (dev->block_len[BLOCK_MAIN3])
|
|
(void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN3]]), dev->block_len[BLOCK_MAIN3], 1, fp);
|
|
if (dev->block_len[BLOCK_MAIN4])
|
|
(void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN4]]), dev->block_len[BLOCK_MAIN4], 1, fp);
|
|
|
|
(void) !fread(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, fp);
|
|
(void) !fread(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, fp);
|
|
fclose(fp);
|
|
}
|
|
|
|
return dev;
|
|
}
|
|
|
|
static void
|
|
intel_flash_close(void *priv)
|
|
{
|
|
FILE *fp;
|
|
flash_t *dev = (flash_t *) priv;
|
|
|
|
fp = nvr_fopen(flash_path, "wb");
|
|
fwrite(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, fp);
|
|
if (dev->block_len[BLOCK_MAIN2])
|
|
fwrite(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, fp);
|
|
if (dev->block_len[BLOCK_MAIN3])
|
|
fwrite(&(dev->array[dev->block_start[BLOCK_MAIN3]]), dev->block_len[BLOCK_MAIN3], 1, fp);
|
|
if (dev->block_len[BLOCK_MAIN4])
|
|
fwrite(&(dev->array[dev->block_start[BLOCK_MAIN4]]), dev->block_len[BLOCK_MAIN4], 1, fp);
|
|
|
|
fwrite(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, fp);
|
|
fwrite(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, fp);
|
|
fclose(fp);
|
|
|
|
free(dev->array);
|
|
dev->array = NULL;
|
|
|
|
free(dev);
|
|
}
|
|
|
|
/* For AMI BIOS'es - Intel 28F001BXT with A16 pin inverted. */
|
|
const device_t intel_flash_bxt_ami_device = {
|
|
.name = "Intel 28F001BXT/28F002BXT/28F004BXT Flash BIOS",
|
|
.internal_name = "intel_flash_bxt_ami",
|
|
.flags = DEVICE_PCI,
|
|
.local = FLAG_INV_A16,
|
|
.init = intel_flash_init,
|
|
.close = intel_flash_close,
|
|
.reset = intel_flash_reset,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t intel_flash_bxt_device = {
|
|
.name = "Intel 28F001BXT/28F002BXT/28F004BXT Flash BIOS",
|
|
.internal_name = "intel_flash_bxt",
|
|
.flags = DEVICE_PCI,
|
|
.local = 0,
|
|
.init = intel_flash_init,
|
|
.close = intel_flash_close,
|
|
.reset = intel_flash_reset,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t intel_flash_bxb_device = {
|
|
.name = "Intel 28F001BXB/28F002BXB/28F004BXB Flash BIOS",
|
|
.internal_name = "intel_flash_bxb",
|
|
.flags = DEVICE_PCI,
|
|
.local = FLAG_BXB,
|
|
.init = intel_flash_init,
|
|
.close = intel_flash_close,
|
|
.reset = intel_flash_reset,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|