552a87ea3d
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port; Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX); Finished the 586MC1; Added 8087 emulation; Moved Cyrix 6x86'es to the Dev branch; Sanitized/cleaned up memregs.c/h and intel.c/h; Split the chipsets from machines and sanitized Port 92 emulation; Added support for the 15bpp mode to the Compaq ATI 28800; Moved the MR 386DX and 486 machines to the Dev branch; Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00; Ported the new timer code from PCem; Cleaned up the CPU table of unused stuff and better optimized its structure; Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch; Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem; Added the AHA-1540A and the BusTek BT-542B; Moved the Sumo SCSI-AT to the Dev branch; Minor IDE, FDC, and floppy drive code clean-ups; Made NCR 5380/53C400-based cards' BIOS address configurable; Got rid of the legacy romset variable; Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit; Added the Amstead PPC512 per PCem patch by John Elliott; Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages); Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing; Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem; Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit; Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement; Amstrad MegaPC does now works correctly with non-internal graphics card; The SLiRP code no longer casts a packed struct type to a non-packed struct type; The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present; The S3 Virge on BeOS is no longer broken (was broken by build #1591); OS/2 2.0 build 6.167 now sees key presses again; Xi8088 now work on CGA again; 86F images converted from either the old or new variants of the HxC MFM format now work correctly; Hardware interrupts with a vector of 0xFF are now handled correctly; OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct; Fixed VNC keyboard input bugs; Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver; Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly; Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4; Compaq Portable now works with all graphics cards; Fixed various MDSI Genius bugs; Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly; Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355; OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400. Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391. Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389. Fixed a minor IDE timing bug, fixes #388. Fixed Toshiba T1000 RAM issues, fixes #379. Fixed EGA/(S)VGA overscan border handling, fixes #378; Got rid of the now long useless IDE channel 2 auto-removal, fixes #370; Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366; Ported the Unicode CD image file name fix from VARCem, fixes #365; Fixed high density floppy disks on the Xi8088, fixes #359; Fixed some bugs in the Hercules emulation, fixes #346, fixes #358; Fixed the SCSI hard disk mode sense pages, fixes #356; Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349; Fixed bugs in the serial mouse emulation, fixes #344; Compiled 86Box binaries now include all the required .DLL's, fixes #341; Made some combo boxes in the Settings dialog slightly wider, fixes #276.
270 lines
13 KiB
C
270 lines
13 KiB
C
static uint32_t ropPUSH_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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int host_reg;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(-2);
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host_reg = LOAD_REG_W(opcode & 7);
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MEM_STORE_ADDR_EA_W(&cpu_state.seg_ss, host_reg);
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SP_MODIFY(-2);
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return op_pc;
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}
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static uint32_t ropPUSH_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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int host_reg;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(-4);
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host_reg = LOAD_REG_L(opcode & 7);
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MEM_STORE_ADDR_EA_L(&cpu_state.seg_ss, host_reg);
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SP_MODIFY(-4);
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return op_pc;
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}
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static uint32_t ropPUSH_imm_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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uint16_t imm = fetchdat & 0xffff;
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int host_reg;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(-2);
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host_reg = LOAD_REG_IMM(imm);
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MEM_STORE_ADDR_EA_W(&cpu_state.seg_ss, host_reg);
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SP_MODIFY(-2);
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return op_pc+2;
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}
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static uint32_t ropPUSH_imm_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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uint32_t imm = fastreadl(cs + op_pc);
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int host_reg;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(-4);
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host_reg = LOAD_REG_IMM(imm);
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MEM_STORE_ADDR_EA_L(&cpu_state.seg_ss, host_reg);
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SP_MODIFY(-4);
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return op_pc+4;
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}
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static uint32_t ropPUSH_imm_b16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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uint16_t imm = fetchdat & 0xff;
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int host_reg;
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if (imm & 0x80)
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imm |= 0xff00;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(-2);
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host_reg = LOAD_REG_IMM(imm);
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MEM_STORE_ADDR_EA_W(&cpu_state.seg_ss, host_reg);
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SP_MODIFY(-2);
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return op_pc+1;
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}
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static uint32_t ropPUSH_imm_b32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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uint32_t imm = fetchdat & 0xff;
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int host_reg;
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if (imm & 0x80)
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imm |= 0xffffff00;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(-4);
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host_reg = LOAD_REG_IMM(imm);
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MEM_STORE_ADDR_EA_L(&cpu_state.seg_ss, host_reg);
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SP_MODIFY(-4);
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return op_pc+1;
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}
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static uint32_t ropPOP_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(0);
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MEM_LOAD_ADDR_EA_W(&cpu_state.seg_ss);
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SP_MODIFY(2);
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STORE_REG_TARGET_W_RELEASE(0, opcode & 7);
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return op_pc;
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}
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static uint32_t ropPOP_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(0);
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MEM_LOAD_ADDR_EA_L(&cpu_state.seg_ss);
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SP_MODIFY(4);
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STORE_REG_TARGET_L_RELEASE(0, opcode & 7);
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return op_pc;
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}
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static uint32_t ropRET_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(0);
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MEM_LOAD_ADDR_EA_W(&cpu_state.seg_ss);
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STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0);
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SP_MODIFY(2);
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return -1;
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}
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static uint32_t ropRET_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(0);
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MEM_LOAD_ADDR_EA_L(&cpu_state.seg_ss);
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STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0);
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SP_MODIFY(4);
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return -1;
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}
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static uint32_t ropRET_imm_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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uint16_t offset = fetchdat & 0xffff;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(0);
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MEM_LOAD_ADDR_EA_W(&cpu_state.seg_ss);
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STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0);
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SP_MODIFY(2+offset);
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return -1;
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}
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static uint32_t ropRET_imm_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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uint16_t offset = fetchdat & 0xffff;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(0);
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MEM_LOAD_ADDR_EA_L(&cpu_state.seg_ss);
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STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0);
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SP_MODIFY(4+offset);
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return -1;
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}
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static uint32_t ropCALL_r16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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uint16_t offset = fetchdat & 0xffff;
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int host_reg;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(-2);
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host_reg = LOAD_REG_IMM(op_pc+2);
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MEM_STORE_ADDR_EA_W(&cpu_state.seg_ss, host_reg);
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SP_MODIFY(-2);
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.pc, (op_pc+2+offset) & 0xffff);
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return -1;
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}
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static uint32_t ropCALL_r32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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uint32_t offset = fastreadl(cs + op_pc);
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int host_reg;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_STACK_TO_EA(-4);
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host_reg = LOAD_REG_IMM(op_pc+4);
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MEM_STORE_ADDR_EA_L(&cpu_state.seg_ss, host_reg);
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SP_MODIFY(-4);
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.pc, op_pc+4+offset);
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return -1;
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}
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static uint32_t ropLEAVE_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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int host_reg;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_EBP_TO_EA(0);
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MEM_LOAD_ADDR_EA_W(&cpu_state.seg_ss);
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host_reg = LOAD_REG_W(REG_BP); /*SP = BP + 2*/
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ADD_HOST_REG_IMM_W(host_reg, 2);
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STORE_REG_TARGET_W_RELEASE(host_reg, REG_SP);
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STORE_REG_TARGET_W_RELEASE(0, REG_BP); /*BP = POP_W()*/
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return op_pc;
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}
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static uint32_t ropLEAVE_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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int host_reg;
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
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LOAD_EBP_TO_EA(0);
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MEM_LOAD_ADDR_EA_L(&cpu_state.seg_ss);
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host_reg = LOAD_REG_L(REG_EBP); /*ESP = EBP + 4*/
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ADD_HOST_REG_IMM(host_reg, 4);
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STORE_REG_TARGET_L_RELEASE(host_reg, REG_ESP);
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STORE_REG_TARGET_L_RELEASE(0, REG_EBP); /*EBP = POP_L()*/
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return op_pc;
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}
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#define ROP_PUSH_SEG(seg) \
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static uint32_t ropPUSH_ ## seg ## _16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
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{ \
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int host_reg; \
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\
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
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LOAD_STACK_TO_EA(-2); \
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host_reg = LOAD_VAR_W((uintptr_t)&seg); \
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MEM_STORE_ADDR_EA_W(&cpu_state.seg_ss, host_reg); \
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SP_MODIFY(-2); \
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\
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return op_pc; \
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} \
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static uint32_t ropPUSH_ ## seg ## _32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
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{ \
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int host_reg; \
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\
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
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LOAD_STACK_TO_EA(-4); \
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host_reg = LOAD_VAR_W((uintptr_t)&seg); \
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MEM_STORE_ADDR_EA_L(&cpu_state.seg_ss, host_reg); \
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SP_MODIFY(-4); \
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\
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return op_pc; \
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}
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ROP_PUSH_SEG(CS)
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ROP_PUSH_SEG(DS)
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ROP_PUSH_SEG(ES)
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ROP_PUSH_SEG(FS)
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ROP_PUSH_SEG(GS)
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ROP_PUSH_SEG(SS)
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#define ROP_POP_SEG(seg, rseg) \
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static uint32_t ropPOP_ ## seg ## _16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
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{ \
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
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LOAD_STACK_TO_EA(0); \
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MEM_LOAD_ADDR_EA_W(&cpu_state.seg_ss); \
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LOAD_SEG(0, &rseg); \
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SP_MODIFY(2); \
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\
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return op_pc; \
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} \
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static uint32_t ropPOP_ ## seg ## _32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
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{ \
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
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LOAD_STACK_TO_EA(0); \
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MEM_LOAD_ADDR_EA_W(&cpu_state.seg_ss); \
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LOAD_SEG(0, &rseg); \
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SP_MODIFY(4); \
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\
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return op_pc; \
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}
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ROP_POP_SEG(DS, cpu_state.seg_ds)
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ROP_POP_SEG(ES, cpu_state.seg_es)
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ROP_POP_SEG(FS, cpu_state.seg_fs)
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ROP_POP_SEG(GS, cpu_state.seg_gs)
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