2018-02-20 21:44:51 -05:00
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/*
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2018-03-08 15:58:46 -05:00
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* VARCem Virtual ARchaeological Computer EMulator.
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2018-02-20 21:44:51 -05:00
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* An emulator of (mostly) x86-based PC systems and devices,
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* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
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* spanning the era between 1981 and 1995.
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*
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* This file is part of the VARCem Project.
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*
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* Implementation of the Schneider EuroPC system.
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*
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* NOTES: BIOS info (taken from MAME, thanks guys!!)
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*
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* f000:e107 bios checksum test
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* memory test
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* f000:e145 irq vector init
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* f000:e156
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* f000:e169-d774 test of special registers 254/354
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* f000:e16c-e817
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* f000:e16f
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* f000:ec08 test of special registers 800a rtc time
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* or date error, rtc corrected
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* f000:ef66 0xf
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* f000:db3e 0x8..0xc
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* f000:d7f8
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* f000:db5f
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* f000:e172
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* f000:ecc5 801a video setup error
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* f000:d6c9 copyright output
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* f000:e1b7
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2018-03-11 23:23:45 -05:00
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* f000:e1be DI bits set mean output text!!! (801a)
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2018-02-20 21:44:51 -05:00
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* f000: 0x8000 output
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* 1 rtc error
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* 2 rtc time or date error
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* 4 checksum error in setup
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* 8 rtc status corrected
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* 10 video setup error
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* 20 video ram bad
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* 40 monitor type not recogniced
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* 80 mouse port enabled
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* 100 joystick port enabled
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* f000:e1e2-dc0c CPU speed is 4.77 mhz
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* f000:e1e5-f9c0 keyboard processor error
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2018-04-07 00:23:55 -04:00
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* f000:e1eb-c617 external LPT1 at 0x3bc
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2018-02-20 21:44:51 -05:00
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* f000:e1ee-e8ee external coms at
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*
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* Routines:
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* f000:c92d output text at bp
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* f000:db3e RTC read reg cl
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* f000:e8ee piep
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* f000:e95e RTC write reg cl
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* polls until JIM 0xa is zero,
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* output cl at jim 0xa
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* write ah hinibble as lownibble into jim 0xa
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* write ah lownibble into jim 0xa
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2018-03-11 23:23:45 -05:00
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* f000:ef66 RTC read reg cl
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2018-02-20 21:44:51 -05:00
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* polls until jim 0xa is zero,
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* output cl at jim 0xa
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* read low 4 nibble at jim 0xa
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* read low 4 nibble at jim 0xa
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* return first nibble<<4|second nibble in ah
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2018-03-11 23:23:45 -05:00
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* f000:f046 seldom compares ret
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* f000:fe87 0 -> ds
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*
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* Memory:
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* 0000:0469 bit 0: b0000 memory available
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2018-02-20 21:44:51 -05:00
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* bit 1: b8000 memory available
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2018-03-11 23:23:45 -05:00
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* 0000:046a: 00 jim 250 01 jim 350
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2018-02-20 21:44:51 -05:00
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*
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2018-10-06 18:20:09 -04:00
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* FIXME: Find a new way to handle the switching of color/mono on
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* external cards. New video_get_type(int card) function?
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*
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2019-04-29 21:02:42 -05:00
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* Version: @(#)m_europc.c 1.0.23 2019/04/29
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2018-02-20 21:44:51 -05:00
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*
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* Author: Fred N. van Kempen, <decwiz@yahoo.com>
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*
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* Inspired by the "jim.c" file originally present, but a
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* fully re-written module, based on the information from
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* Schneider's schematics and technical manuals, and the
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* input from people with real EuroPC hardware.
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*
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2019-02-11 23:52:27 -05:00
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* Copyright 2017-2019 Fred N. van Kempen.
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2018-02-20 21:44:51 -05:00
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*
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* Redistribution and use in source and binary forms, with
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* or without modification, are permitted provided that the
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* following conditions are met:
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*
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* 1. Redistributions of source code must retain the entire
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* above notice, this list of conditions and the following
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* disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the
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* following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names
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* of its contributors may be used to endorse or promote
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* products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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2018-10-06 18:20:09 -04:00
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#include <string.h>
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2018-02-20 21:44:51 -05:00
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#include <wchar.h>
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2018-03-11 23:23:45 -05:00
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#include <time.h>
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2018-02-20 21:44:51 -05:00
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#include "../emu.h"
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2019-04-21 16:09:12 -05:00
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#include "../cpu/cpu.h"
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2018-02-20 21:44:51 -05:00
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#include "../io.h"
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#include "../mem.h"
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#include "../rom.h"
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#include "../device.h"
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2018-10-06 18:20:09 -04:00
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#include "../nvr.h"
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2019-02-11 23:52:27 -05:00
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#include "../devices/system/pit.h"
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2018-05-06 22:47:14 -04:00
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#include "../devices/system/nmi.h"
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#include "../devices/ports/parallel.h"
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#include "../devices/input/keyboard.h"
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#include "../devices/input/mouse.h"
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#include "../devices/floppy/fdd.h"
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#include "../devices/floppy/fdc.h"
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#include "../devices/disk/hdc.h"
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#include "../devices/video/video.h"
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2018-02-20 21:44:51 -05:00
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#include "machine.h"
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/* M3002 RTC chip registers. */
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#define MRTC_SECONDS 0x00 /* BCD, 00-59 */
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#define MRTC_MINUTES 0x01 /* BCD, 00-59 */
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#define MRTC_HOURS 0x02 /* BCD, 00-23 */
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#define MRTC_DAYS 0x03 /* BCD, 01-31 */
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#define MRTC_MONTHS 0x04 /* BCD, 01-12 */
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2018-03-11 23:23:45 -05:00
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#define MRTC_YEARS 0x05 /* BCD, 00-99 (year only) */
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2018-02-20 21:44:51 -05:00
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#define MRTC_WEEKDAY 0x06 /* BCD, 01-07 */
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#define MRTC_WEEKNO 0x07 /* BCD, 01-52 */
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#define MRTC_CONF_A 0x08 /* EuroPC config, binary */
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#define MRTC_CONF_B 0x09 /* EuroPC config, binary */
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#define MRTC_CONF_C 0x0a /* EuroPC config, binary */
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#define MRTC_CONF_D 0x0b /* EuroPC config, binary */
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#define MRTC_CONF_E 0x0c /* EuroPC config, binary */
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#define MRTC_CHECK_LO 0x0d /* Checksum, low byte */
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#define MRTC_CHECK_HI 0x0e /* Checksum, high byte */
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#define MRTC_CTRLSTAT 0x0f /* RTC control/status, binary */
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2018-10-06 18:20:09 -04:00
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2018-02-20 21:44:51 -05:00
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typedef struct {
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uint16_t jim; /* JIM base address */
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uint8_t regs[16]; /* JIM internal regs (8) */
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nvr_t nvr; /* NVR */
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2018-03-11 23:23:45 -05:00
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uint8_t nvr_stat;
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uint8_t nvr_addr;
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} europc_t;
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2018-02-20 21:44:51 -05:00
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2018-03-11 23:23:45 -05:00
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/*
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* This is called every second through the NVR/RTC hook.
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*
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* We fake a 'running' RTC by updating its registers on
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* each passing second. Not exactly accurate, but good
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* enough.
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*
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* Note that this code looks nasty because of all the
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* BCD to decimal vv going on.
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*
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* FIXME: should we mark NVR as dirty?
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*/
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static void
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2018-10-06 18:20:09 -04:00
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rtc_ticker(nvr_t *nvr)
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2018-02-20 21:44:51 -05:00
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{
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2018-03-11 23:23:45 -05:00
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uint8_t *regs;
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int mon, yr;
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/* Only if RTC is running.. */
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regs = nvr->regs;
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if (! (regs[MRTC_CTRLSTAT] & 0x01)) return;
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regs[MRTC_SECONDS] = RTC_BCDINC(nvr->regs[MRTC_SECONDS], 1);
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if (regs[MRTC_SECONDS] >= RTC_BCD(60)) {
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regs[MRTC_SECONDS] = RTC_BCD(0);
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regs[MRTC_MINUTES] = RTC_BCDINC(regs[MRTC_MINUTES], 1);
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if (regs[MRTC_MINUTES] >= RTC_BCD(60)) {
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regs[MRTC_MINUTES] = RTC_BCD(0);
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regs[MRTC_HOURS] = RTC_BCDINC(regs[MRTC_HOURS], 1);
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if (regs[MRTC_HOURS] >= RTC_BCD(24)) {
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regs[MRTC_HOURS] = RTC_BCD(0);
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regs[MRTC_DAYS] = RTC_BCDINC(regs[MRTC_DAYS], 1);
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mon = RTC_DCB(regs[MRTC_MONTHS]);
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yr = RTC_DCB(regs[MRTC_YEARS]) + 1900;
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if (RTC_DCB(regs[MRTC_DAYS]) > nvr_get_days(mon, yr)) {
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regs[MRTC_DAYS] = RTC_BCD(1);
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regs[MRTC_MONTHS] = RTC_BCDINC(regs[MRTC_MONTHS], 1);
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if (regs[MRTC_MONTHS] > RTC_BCD(12)) {
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regs[MRTC_MONTHS] = RTC_BCD(1);
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regs[MRTC_YEARS] = RTC_BCDINC(regs[MRTC_YEARS], 1) & 0xff;
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}
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}
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}
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}
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2018-02-20 21:44:51 -05:00
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}
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}
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2018-03-11 23:23:45 -05:00
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/* Get the current NVR time. */
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static void
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rtc_time_get(uint8_t *regs, struct tm *tm)
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2018-02-20 21:44:51 -05:00
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{
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2018-03-11 23:23:45 -05:00
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/* NVR is in BCD data mode. */
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tm->tm_sec = RTC_DCB(regs[MRTC_SECONDS]);
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tm->tm_min = RTC_DCB(regs[MRTC_MINUTES]);
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tm->tm_hour = RTC_DCB(regs[MRTC_HOURS]);
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tm->tm_wday = (RTC_DCB(regs[MRTC_WEEKDAY]) - 1);
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tm->tm_mday = RTC_DCB(regs[MRTC_DAYS]);
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tm->tm_mon = (RTC_DCB(regs[MRTC_MONTHS]) - 1);
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tm->tm_year = RTC_DCB(regs[MRTC_YEARS]);
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2018-10-06 18:20:09 -04:00
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#ifdef MRTC_CENTURY
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2018-03-11 23:23:45 -05:00
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tm->tm_year += (RTC_DCB(regs[MRTC_CENTURY]) * 100) - 1900;
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#endif
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}
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2018-02-20 21:44:51 -05:00
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2018-03-11 23:23:45 -05:00
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/* Set the current NVR time. */
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static void
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rtc_time_set(uint8_t *regs, struct tm *tm)
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{
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/* NVR is in BCD data mode. */
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regs[MRTC_SECONDS] = RTC_BCD(tm->tm_sec);
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regs[MRTC_MINUTES] = RTC_BCD(tm->tm_min);
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regs[MRTC_HOURS] = RTC_BCD(tm->tm_hour);
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regs[MRTC_WEEKDAY] = RTC_BCD(tm->tm_wday + 1);
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regs[MRTC_DAYS] = RTC_BCD(tm->tm_mday);
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regs[MRTC_MONTHS] = RTC_BCD(tm->tm_mon + 1);
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regs[MRTC_YEARS] = RTC_BCD(tm->tm_year % 100);
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2018-10-06 18:20:09 -04:00
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#ifdef MRTC_CENTURY
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2018-03-11 23:23:45 -05:00
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regs[MRTC_CENTURY] = RTC_BCD((tm->tm_year+1900) / 100);
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#endif
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2018-02-20 21:44:51 -05:00
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}
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static void
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2018-03-11 23:23:45 -05:00
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rtc_start(nvr_t *nvr)
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2018-02-20 21:44:51 -05:00
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{
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2018-03-11 23:23:45 -05:00
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struct tm tm;
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/* Initialize the internal and chip times. */
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2018-10-06 18:20:09 -04:00
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if (time_sync != TIME_SYNC_DISABLED) {
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2018-03-11 23:23:45 -05:00
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/* Use the internal clock's time. */
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nvr_time_get(&tm);
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rtc_time_set(nvr->regs, &tm);
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} else {
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/* Set the internal clock from the chip time. */
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rtc_time_get(nvr->regs, &tm);
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nvr_time_set(&tm);
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2018-02-20 21:44:51 -05:00
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}
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}
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2018-03-11 23:23:45 -05:00
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/* Create a valid checksum for the current NVR data. */
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static uint8_t
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rtc_checksum(uint8_t *ptr)
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{
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uint8_t sum;
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int i;
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|
|
|
|
|
/* Calculate all bytes with XOR. */
|
|
|
|
|
sum = 0x00;
|
2018-06-08 19:43:22 -04:00
|
|
|
for (i = MRTC_CONF_A; i <= MRTC_CONF_E; i++)
|
2018-03-11 23:23:45 -05:00
|
|
|
sum += ptr[i];
|
|
|
|
|
|
|
|
|
|
return(sum);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Reset the machine's NVR to a sane state. */
|
|
|
|
|
static void
|
|
|
|
|
rtc_reset(nvr_t *nvr)
|
2018-02-20 21:44:51 -05:00
|
|
|
{
|
2018-03-11 23:23:45 -05:00
|
|
|
/* Initialize the RTC to a known state. */
|
|
|
|
|
nvr->regs[MRTC_SECONDS] = RTC_BCD(0); /* seconds */
|
|
|
|
|
nvr->regs[MRTC_MINUTES] = RTC_BCD(0); /* minutes */
|
|
|
|
|
nvr->regs[MRTC_HOURS] = RTC_BCD(0); /* hours */
|
|
|
|
|
nvr->regs[MRTC_DAYS] = RTC_BCD(1); /* days */
|
|
|
|
|
nvr->regs[MRTC_MONTHS] = RTC_BCD(1); /* months */
|
|
|
|
|
nvr->regs[MRTC_YEARS] = RTC_BCD(80); /* years */
|
|
|
|
|
nvr->regs[MRTC_WEEKDAY] = RTC_BCD(1); /* weekday */
|
|
|
|
|
nvr->regs[MRTC_WEEKNO] = RTC_BCD(1); /* weekno */
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2018-03-11 23:23:45 -05:00
|
|
|
/*
|
|
|
|
|
* EuroPC System Configuration:
|
|
|
|
|
*
|
|
|
|
|
* [A] unknown
|
|
|
|
|
*
|
|
|
|
|
* [B] 7 1 bootdrive extern
|
2018-05-12 23:53:10 -04:00
|
|
|
* 0 bootdrive intern
|
2018-03-11 23:23:45 -05:00
|
|
|
* 6:5 11 invalid hard disk type
|
|
|
|
|
* 10 hard disk installed, type 2
|
|
|
|
|
* 01 hard disk installed, type 1
|
|
|
|
|
* 00 hard disk not installed
|
|
|
|
|
* 4:3 11 invalid external drive type
|
|
|
|
|
* 10 external drive 720K
|
|
|
|
|
* 01 external drive 360K
|
|
|
|
|
* 00 external drive disabled
|
|
|
|
|
* 2 unknown
|
|
|
|
|
* 1:0 11 invalid internal drive type
|
2018-05-12 23:53:10 -04:00
|
|
|
* 10 internal drive 720K
|
|
|
|
|
* 01 internal drive 360K
|
2018-03-11 23:23:45 -05:00
|
|
|
* 00 internal drive disabled
|
|
|
|
|
*
|
|
|
|
|
* [C] 7:6 unknown
|
|
|
|
|
* 5 monitor detection OFF
|
|
|
|
|
* 4 unknown
|
2018-05-12 23:53:10 -04:00
|
|
|
* 3:2 11 illegal memory size (768K ?)
|
2018-03-11 23:23:45 -05:00
|
|
|
* 10 512K
|
|
|
|
|
* 01 256K
|
|
|
|
|
* 00 640K
|
|
|
|
|
* 1:0 11 illegal game port
|
|
|
|
|
* 10 gameport as mouse port
|
|
|
|
|
* 01 gameport as joysticks
|
|
|
|
|
* 00 gameport disabled
|
|
|
|
|
*
|
|
|
|
|
* [D] 7:6 10 9MHz CPU speed
|
|
|
|
|
* 01 7MHz CPU speed
|
|
|
|
|
* 00 4.77 MHz CPU
|
|
|
|
|
* 5 unknown
|
|
|
|
|
* 4 external: color, internal: mono
|
|
|
|
|
* 3 unknown
|
|
|
|
|
* 2 internal video ON
|
|
|
|
|
* 1:0 11 mono
|
|
|
|
|
* 10 color80
|
|
|
|
|
* 01 color40
|
|
|
|
|
* 00 special (EGA,VGA etc)
|
|
|
|
|
*
|
|
|
|
|
* [E] 7:4 unknown
|
|
|
|
|
* 3:0 country (00=Deutschland, 0A=ASCII)
|
|
|
|
|
*/
|
|
|
|
|
nvr->regs[MRTC_CONF_A] = 0x00; /* CONFIG A */
|
|
|
|
|
nvr->regs[MRTC_CONF_B] = 0x0A; /* CONFIG B */
|
|
|
|
|
nvr->regs[MRTC_CONF_C] = 0x28; /* CONFIG C */
|
|
|
|
|
nvr->regs[MRTC_CONF_D] = 0x12; /* CONFIG D */
|
|
|
|
|
nvr->regs[MRTC_CONF_E] = 0x0A; /* CONFIG E */
|
|
|
|
|
|
|
|
|
|
nvr->regs[MRTC_CHECK_LO] = 0x00; /* checksum (LO) */
|
|
|
|
|
nvr->regs[MRTC_CHECK_HI] = 0x00; /* checksum (HI) */
|
|
|
|
|
|
|
|
|
|
nvr->regs[MRTC_CTRLSTAT] = 0x01; /* status/control */
|
|
|
|
|
|
|
|
|
|
/* Generate a valid checksum. */
|
|
|
|
|
nvr->regs[MRTC_CHECK_LO] = rtc_checksum(nvr->regs);
|
2018-02-20 21:44:51 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Execute a JIM control command. */
|
|
|
|
|
static void
|
2019-04-21 16:09:12 -05:00
|
|
|
jim_set(europc_t *dev, uint8_t reg, uint8_t val)
|
2018-02-20 21:44:51 -05:00
|
|
|
{
|
|
|
|
|
switch(reg) {
|
|
|
|
|
case 0: /* MISC control (WO) */
|
2018-10-06 18:20:09 -04:00
|
|
|
/* bit0: enable MOUSE */
|
|
|
|
|
/* bit1: enable joystick */
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 2: /* AGA control */
|
|
|
|
|
if (! (val & 0x80)) {
|
|
|
|
|
/* Reset AGA. */
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
switch (val) {
|
|
|
|
|
case 0x1f: /* 0001 1111 */
|
|
|
|
|
case 0x0b: /* 0000 1011 */
|
2018-10-06 18:20:09 -04:00
|
|
|
/*europc_jim.mode=AGA_MONO; */
|
|
|
|
|
DEBUG("EuroPC: AGA Monochrome mode!\n");
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x18: /* 0001 1000 */
|
|
|
|
|
case 0x1a: /* 0001 1010 */
|
2018-10-06 18:20:09 -04:00
|
|
|
/*europc_jim.mode=AGA_COLOR; */
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0e: /* 0000 1100 */
|
|
|
|
|
/*80 columns? */
|
2018-10-06 18:20:09 -04:00
|
|
|
DEBUG("EuroPC: AGA 80-column mode!\n");
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0d: /* 0000 1011 */
|
|
|
|
|
/*40 columns? */
|
2018-10-06 18:20:09 -04:00
|
|
|
DEBUG("EuroPC: AGA 40-column mode!\n");
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
2018-10-06 18:20:09 -04:00
|
|
|
/*europc_jim.mode=AGA_OFF; */
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 4: /* CPU Speed control */
|
|
|
|
|
switch(val & 0xc0) {
|
|
|
|
|
case 0x00: /* 4.77 MHz */
|
2018-10-06 18:20:09 -04:00
|
|
|
/*FIXME: cpu_set_clockscale(0, 1.0/2); */
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x40: /* 7.16 MHz */
|
2018-10-06 18:20:09 -04:00
|
|
|
/*FIXME: cpu_set_clockscale(0, 3.0/4); */
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default: /* 9.54 MHz */
|
2018-10-06 18:20:09 -04:00
|
|
|
/*FIXME: cpu_set_clockscale(0, 1);break; */
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->regs[reg] = val;
|
2018-02-20 21:44:51 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Write to one of the JIM registers. */
|
|
|
|
|
static void
|
|
|
|
|
jim_write(uint16_t addr, uint8_t val, void *priv)
|
|
|
|
|
{
|
2019-04-21 16:09:12 -05:00
|
|
|
europc_t *dev = (europc_t *)priv;
|
2018-02-20 21:44:51 -05:00
|
|
|
uint8_t b;
|
|
|
|
|
|
2018-10-06 18:20:09 -04:00
|
|
|
DBGLOG(2, "EuroPC: jim_wr(%04x, %02x)\n", addr, val);
|
2018-02-20 21:44:51 -05:00
|
|
|
|
|
|
|
|
switch (addr & 0x000f) {
|
|
|
|
|
case 0x00: /* JIM internal registers (WRONLY) */
|
|
|
|
|
case 0x01:
|
|
|
|
|
case 0x02:
|
|
|
|
|
case 0x03:
|
|
|
|
|
case 0x04: /* JIM internal registers (R/W) */
|
|
|
|
|
case 0x05:
|
|
|
|
|
case 0x06:
|
|
|
|
|
case 0x07:
|
2019-04-21 16:09:12 -05:00
|
|
|
jim_set(dev, (addr & 0x07), val);
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
2018-03-11 23:23:45 -05:00
|
|
|
case 0x0a: /* M3002 RTC INDEX/DATA register */
|
2019-04-21 16:09:12 -05:00
|
|
|
switch(dev->nvr_stat) {
|
2018-02-20 21:44:51 -05:00
|
|
|
case 0: /* save index */
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->nvr_addr = val & 0x0f;
|
|
|
|
|
dev->nvr_stat++;
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 1: /* save data HI nibble */
|
2019-04-21 16:09:12 -05:00
|
|
|
b = dev->nvr.regs[dev->nvr_addr] & 0x0f;
|
2018-02-20 21:44:51 -05:00
|
|
|
b |= (val << 4);
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->nvr.regs[dev->nvr_addr] = b;
|
|
|
|
|
dev->nvr_stat++;
|
2018-03-11 23:23:45 -05:00
|
|
|
nvr_dosave++;
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 2: /* save data LO nibble */
|
2019-04-21 16:09:12 -05:00
|
|
|
b = dev->nvr.regs[dev->nvr_addr] & 0xf0;
|
2018-02-20 21:44:51 -05:00
|
|
|
b |= (val & 0x0f);
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->nvr.regs[dev->nvr_addr] = b;
|
|
|
|
|
dev->nvr_stat = 0;
|
2018-03-11 23:23:45 -05:00
|
|
|
nvr_dosave++;
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
2018-10-06 18:20:09 -04:00
|
|
|
ERRLOG("EuroPC: invalid JIM write %02x, val %02x\n", addr, val);
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Read from one of the JIM registers. */
|
|
|
|
|
static uint8_t
|
|
|
|
|
jim_read(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2019-04-21 16:09:12 -05:00
|
|
|
europc_t *dev = (europc_t *)priv;
|
2018-02-20 21:44:51 -05:00
|
|
|
uint8_t r = 0xff;
|
|
|
|
|
|
|
|
|
|
switch (addr & 0x000f) {
|
|
|
|
|
case 0x00: /* JIM internal registers (WRONLY) */
|
|
|
|
|
case 0x01:
|
|
|
|
|
case 0x02:
|
|
|
|
|
case 0x03:
|
|
|
|
|
r = 0x00;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x04: /* JIM internal registers (R/W) */
|
|
|
|
|
case 0x05:
|
|
|
|
|
case 0x06:
|
|
|
|
|
case 0x07:
|
2019-04-21 16:09:12 -05:00
|
|
|
r = dev->regs[addr & 0x07];
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
2018-03-11 23:23:45 -05:00
|
|
|
case 0x0a: /* M3002 RTC INDEX/DATA register */
|
2019-04-21 16:09:12 -05:00
|
|
|
switch(dev->nvr_stat) {
|
2018-02-20 21:44:51 -05:00
|
|
|
case 0:
|
|
|
|
|
r = 0x00;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 1: /* read data HI nibble */
|
2019-04-21 16:09:12 -05:00
|
|
|
r = (dev->nvr.regs[dev->nvr_addr] >> 4);
|
|
|
|
|
dev->nvr_stat++;
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 2: /* read data LO nibble */
|
2019-04-21 16:09:12 -05:00
|
|
|
r = (dev->nvr.regs[dev->nvr_addr] & 0x0f);
|
|
|
|
|
dev->nvr_stat = 0;
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
2018-10-06 18:20:09 -04:00
|
|
|
ERRLOG("EuroPC: invalid JIM read %02x\n", addr);
|
2018-02-20 21:44:51 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2018-10-06 18:20:09 -04:00
|
|
|
DBGLOG(2, "EuroPC: jim_rd(%04x): %02x\n", addr, r);
|
2018-02-20 21:44:51 -05:00
|
|
|
|
|
|
|
|
return(r);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2019-04-21 16:09:12 -05:00
|
|
|
/*
|
|
|
|
|
* Initialize the mainboard 'device' of the machine.
|
|
|
|
|
*
|
|
|
|
|
* Its task is to allocate a clean machine data block,
|
|
|
|
|
* and then simply enable the mainboard "device" which
|
|
|
|
|
* allows it to reset (dev init) and configured by the
|
|
|
|
|
* user.
|
|
|
|
|
*/
|
2018-02-20 21:44:51 -05:00
|
|
|
static void *
|
2019-04-21 16:09:12 -05:00
|
|
|
europc_init(const device_t *info, void *arg)
|
2018-02-20 21:44:51 -05:00
|
|
|
{
|
2019-04-21 16:09:12 -05:00
|
|
|
europc_t *dev;
|
2019-04-23 23:11:13 -05:00
|
|
|
void *priv;
|
2018-02-20 21:44:51 -05:00
|
|
|
uint8_t b;
|
2019-04-21 16:09:12 -05:00
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
/* Clear the machine state. */
|
|
|
|
|
dev = (europc_t *)mem_alloc(sizeof(europc_t));
|
|
|
|
|
memset(dev, 0x00, sizeof(europc_t));
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2019-04-21 16:09:12 -05:00
|
|
|
/* Add the machine device. */
|
|
|
|
|
device_add_ex(info, dev);
|
|
|
|
|
|
|
|
|
|
/* Get configurable things. */
|
|
|
|
|
i = machine_get_config_int("js9");
|
|
|
|
|
dev->jim = (i == 1) ? 0x0350 : 0x0250;
|
|
|
|
|
|
|
|
|
|
/* Set up and initialize the NVR. */
|
2019-04-29 21:02:42 -05:00
|
|
|
dev->nvr.size = machine_get_nvrsize();
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->nvr.irq = -1;
|
|
|
|
|
dev->nvr.reset = rtc_reset;
|
|
|
|
|
dev->nvr.start = rtc_start;
|
|
|
|
|
dev->nvr.tick = rtc_ticker;
|
|
|
|
|
nvr_init(&dev->nvr);
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2018-10-06 18:20:09 -04:00
|
|
|
/*
|
|
|
|
|
* This is not quite correct, but it works.
|
|
|
|
|
*
|
|
|
|
|
* The EuroPC has an onboard CGA-class video controller
|
|
|
|
|
* (AGA) which is normally used. We currently do not yet
|
|
|
|
|
* support it. To keep the NVRAM valid, however, we act
|
|
|
|
|
* like we have it configured.
|
|
|
|
|
*/
|
|
|
|
|
if (video_card == VID_INTERNAL) {
|
|
|
|
|
INFO("EuroPC: enabling CGA in place of AGA!\n");
|
|
|
|
|
device_add(&cga_device);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
DEBUG("EuroPC: NVR=[ %02x %02x %02x %02x %02x ] %sVALID\n",
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->nvr.regs[MRTC_CONF_A], dev->nvr.regs[MRTC_CONF_B],
|
|
|
|
|
dev->nvr.regs[MRTC_CONF_C], dev->nvr.regs[MRTC_CONF_D],
|
|
|
|
|
dev->nvr.regs[MRTC_CONF_E],
|
|
|
|
|
(dev->nvr.regs[MRTC_CHECK_LO]!=rtc_checksum(dev->nvr.regs))?"IN":"");
|
2018-02-20 21:44:51 -05:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Now that we have initialized the NVR (either from file,
|
|
|
|
|
* or by setting it to defaults) we can start overriding it
|
|
|
|
|
* with values set by the user.
|
|
|
|
|
*/
|
2019-04-21 16:09:12 -05:00
|
|
|
b = (dev->nvr.regs[MRTC_CONF_D] & ~0x17);
|
2018-10-06 18:20:09 -04:00
|
|
|
if (video_card != VID_INTERNAL) {
|
|
|
|
|
/*
|
|
|
|
|
* OK, this is not exactly correct, either.
|
|
|
|
|
*
|
|
|
|
|
* If we use an external video card, that will not be
|
|
|
|
|
* installed until after we boot the mainboard, so we
|
|
|
|
|
* do not know about it yet. Therefore, we just peek
|
|
|
|
|
* at the configured video card type, and perform an
|
|
|
|
|
* "educated guess" as to its type..
|
|
|
|
|
*/
|
|
|
|
|
switch(video_card) {
|
|
|
|
|
case VID_MDA: /* MDA */
|
|
|
|
|
case VID_HERCULES: /* Hercules */
|
|
|
|
|
b |= 0x03; /* external video, mono */
|
|
|
|
|
break;
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2018-10-06 18:20:09 -04:00
|
|
|
case VID_CGA: /* Color, CGA */
|
|
|
|
|
b |= 0x12; /* external video, CGA80 */
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default: /* all others */
|
|
|
|
|
b |= 0x10; /* external video, special */
|
|
|
|
|
}
|
|
|
|
|
} else {
|
2019-04-21 16:09:12 -05:00
|
|
|
i = video_type();
|
|
|
|
|
switch(i) {
|
2018-10-06 18:20:09 -04:00
|
|
|
case VID_TYPE_MDA: /* Monochrome, MDA, Hercules */
|
|
|
|
|
b |= 0x03; /* external video, mono */
|
|
|
|
|
break;
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2018-10-06 18:20:09 -04:00
|
|
|
case VID_TYPE_CGA: /* Color, CGA */
|
|
|
|
|
b |= 0x12; /* external video, CGA80 */
|
|
|
|
|
break;
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2018-10-06 18:20:09 -04:00
|
|
|
case VID_TYPE_SPEC: /* EGA, VGA etc */
|
|
|
|
|
b |= 0x10; /* external video, special */
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
2019-04-21 16:09:12 -05:00
|
|
|
ERRLOG("EuroPC: unknown video type %i !\n", i);
|
2018-10-06 18:20:09 -04:00
|
|
|
break;
|
|
|
|
|
}
|
2018-02-20 21:44:51 -05:00
|
|
|
}
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->nvr.regs[MRTC_CONF_D] = b;
|
2018-02-20 21:44:51 -05:00
|
|
|
|
|
|
|
|
/* Update the memory size. */
|
2019-04-21 16:09:12 -05:00
|
|
|
b = (dev->nvr.regs[MRTC_CONF_C] & 0xf3);
|
2018-02-20 21:44:51 -05:00
|
|
|
switch(mem_size) {
|
|
|
|
|
case 256:
|
|
|
|
|
b |= 0x04;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 512:
|
|
|
|
|
b |= 0x08;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 640:
|
|
|
|
|
b |= 0x00;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->nvr.regs[MRTC_CONF_C] = b;
|
2018-02-20 21:44:51 -05:00
|
|
|
|
|
|
|
|
/* Update CPU speed. */
|
2019-04-21 16:09:12 -05:00
|
|
|
b = (dev->nvr.regs[MRTC_CONF_D] & 0x3f);
|
|
|
|
|
switch(cpu_type) {
|
2018-02-20 21:44:51 -05:00
|
|
|
case 0: /* 8088, 4.77 MHz */
|
|
|
|
|
b |= 0x00;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 1: /* 8088, 7.15 MHz */
|
|
|
|
|
b |= 0x40;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 2: /* 8088, 9.56 MHz */
|
|
|
|
|
b |= 0x80;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->nvr.regs[MRTC_CONF_D] = b;
|
2018-02-20 21:44:51 -05:00
|
|
|
|
|
|
|
|
/* Set up game port. */
|
2019-04-21 16:09:12 -05:00
|
|
|
b = (dev->nvr.regs[MRTC_CONF_C] & 0xfc);
|
2018-04-20 04:16:43 -04:00
|
|
|
if (mouse_type == MOUSE_INTERNAL) {
|
2018-06-08 19:43:22 -04:00
|
|
|
/* Enable the Logitech Bus Mouse device. */
|
2019-04-23 23:11:13 -05:00
|
|
|
priv = device_add(&mouse_logibus_onboard_device);
|
|
|
|
|
mouse_bus_set_irq(priv, 2);
|
2018-06-08 19:43:22 -04:00
|
|
|
|
|
|
|
|
/* Configure the port for (Bus Mouse Compatible) Mouse. */
|
|
|
|
|
b |= 0x01;
|
2018-04-26 16:46:42 -04:00
|
|
|
} else if (game_enabled) {
|
2018-02-20 21:44:51 -05:00
|
|
|
b |= 0x02; /* enable port as joysticks */
|
|
|
|
|
}
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->nvr.regs[MRTC_CONF_C] = b;
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2018-05-12 23:53:10 -04:00
|
|
|
/* Set up hard disks. */
|
2019-04-21 16:09:12 -05:00
|
|
|
b = dev->nvr.regs[MRTC_CONF_B] & 0x84;
|
2018-05-12 23:53:10 -04:00
|
|
|
if (hdc_type != HDC_NONE)
|
|
|
|
|
b |= 0x20; /* HD20 #1 */
|
|
|
|
|
|
2018-02-20 21:44:51 -05:00
|
|
|
/* Set up floppy types. */
|
2018-05-12 23:53:10 -04:00
|
|
|
if (fdd_get_type(0) != 0) {
|
|
|
|
|
/* We have floppy A: */
|
|
|
|
|
if (fdd_is_dd(0)) {
|
|
|
|
|
if (fdd_is_525(0))
|
|
|
|
|
b |= 0x01; /* 5.25" DD */
|
|
|
|
|
else
|
|
|
|
|
b |= 0x02; /* 3.5" DD */
|
|
|
|
|
} else
|
2018-10-06 18:20:09 -04:00
|
|
|
ERRLOG("EuroPC: unsupported HD type for floppy drive 0\n");
|
2018-05-12 23:53:10 -04:00
|
|
|
}
|
|
|
|
|
if (fdd_get_type(1) != 0) {
|
|
|
|
|
/* We have floppy B: */
|
|
|
|
|
if (fdd_is_dd(1)) {
|
|
|
|
|
b |= 0x04; /* EXTERNAL */
|
|
|
|
|
if (fdd_is_525(1))
|
|
|
|
|
b |= 0x08; /* 5.25" DD */
|
|
|
|
|
else
|
|
|
|
|
b |= 0x10; /* 3.5" DD */
|
|
|
|
|
} else
|
2018-10-06 18:20:09 -04:00
|
|
|
ERRLOG("EuroPC: unsupported HD type for floppy drive 1\n");
|
2018-05-12 23:53:10 -04:00
|
|
|
}
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->nvr.regs[MRTC_CONF_B] = b;
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2018-03-11 23:23:45 -05:00
|
|
|
/* Validate the NVR checksum and save. */
|
2019-04-21 16:09:12 -05:00
|
|
|
dev->nvr.regs[MRTC_CHECK_LO] = rtc_checksum(dev->nvr.regs);
|
2018-03-11 23:23:45 -05:00
|
|
|
nvr_dosave++;
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2019-04-21 16:09:12 -05:00
|
|
|
machine_common_init();
|
|
|
|
|
|
|
|
|
|
nmi_init();
|
|
|
|
|
|
|
|
|
|
pit_set_out_func(&pit, 1, pit_refresh_timer_xt);
|
|
|
|
|
|
2018-02-20 21:44:51 -05:00
|
|
|
/*
|
|
|
|
|
* Allocate the system's I/O handlers.
|
|
|
|
|
*
|
|
|
|
|
* The first one is for the JIM. Note that although JIM usually
|
|
|
|
|
* resides at 0x0250, a special solder jumper on the mainboard
|
|
|
|
|
* (JS9) can be used to "move" it to 0x0350, to get it out of
|
|
|
|
|
* the way of other cards that need this range.
|
|
|
|
|
*/
|
2019-04-21 16:09:12 -05:00
|
|
|
io_sethandler(dev->jim, 16,
|
|
|
|
|
jim_read,NULL,NULL, jim_write,NULL,NULL, dev);
|
2018-02-20 21:44:51 -05:00
|
|
|
|
|
|
|
|
/* Only after JIM has been initialized. */
|
2019-04-21 16:09:12 -05:00
|
|
|
device_add(&keyboard_xt_device);
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2018-04-25 16:03:28 -04:00
|
|
|
/* Enable and set up the FDC. */
|
2019-04-21 16:09:12 -05:00
|
|
|
device_add(&fdc_xt_device);
|
2018-04-25 16:03:28 -04:00
|
|
|
|
2018-02-20 21:44:51 -05:00
|
|
|
/*
|
|
|
|
|
* Set up and enable the HD20 disk controller.
|
|
|
|
|
*
|
|
|
|
|
* We only do this if we have not configured another one.
|
|
|
|
|
*/
|
2018-10-06 18:20:09 -04:00
|
|
|
if (hdc_type == HDC_INTERNAL)
|
2018-04-25 16:03:28 -04:00
|
|
|
(void)device_add(&xta_hd20_device);
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2019-04-21 16:09:12 -05:00
|
|
|
return(dev);
|
2018-02-20 21:44:51 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
europc_close(void *priv)
|
|
|
|
|
{
|
2019-04-21 16:09:12 -05:00
|
|
|
europc_t *dev = (europc_t *)priv;
|
|
|
|
|
nvr_t *nvr = &dev->nvr;
|
2018-02-20 21:44:51 -05:00
|
|
|
|
2018-08-29 03:58:50 -04:00
|
|
|
if (nvr->fn != NULL) {
|
|
|
|
|
free((wchar_t *)nvr->fn);
|
|
|
|
|
nvr->fn = NULL;
|
|
|
|
|
}
|
2019-04-21 16:09:12 -05:00
|
|
|
|
|
|
|
|
free(dev);
|
2018-02-20 21:44:51 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2018-03-17 23:13:46 -05:00
|
|
|
static const device_config_t europc_config[] = {
|
2018-02-20 21:44:51 -05:00
|
|
|
{
|
|
|
|
|
"js9", "JS9 Jumper (JIM)", CONFIG_INT, "", 0,
|
|
|
|
|
{
|
|
|
|
|
{
|
|
|
|
|
"Disabled (250h)", 0
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"Enabled (350h)", 1
|
|
|
|
|
},
|
|
|
|
|
{
|
2019-04-21 16:09:12 -05:00
|
|
|
NULL
|
2018-02-20 21:44:51 -05:00
|
|
|
}
|
|
|
|
|
},
|
|
|
|
|
},
|
|
|
|
|
{
|
2019-04-21 16:09:12 -05:00
|
|
|
NULL
|
2018-02-20 21:44:51 -05:00
|
|
|
}
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
2019-04-21 16:09:12 -05:00
|
|
|
static const CPU cpus_europc[] = {
|
|
|
|
|
{ "8088/4.77", CPU_8088, 4772728, 1, 0, 0, 0, 0, CPU_ALTERNATE_XTAL, 0,0,0,0, 1 },
|
|
|
|
|
{ "8088/7.16", CPU_8088, 7159092, 1, 0, 0, 0, 0, CPU_ALTERNATE_XTAL, 0,0,0,0, 1 },
|
|
|
|
|
{ "8088/9.54", CPU_8088, 9545456, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1 },
|
|
|
|
|
{ NULL }
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const machine_t europc_info = {
|
|
|
|
|
MACHINE_ISA | MACHINE_HDC | MACHINE_VIDEO | MACHINE_MOUSE,
|
2018-10-06 18:20:09 -04:00
|
|
|
0,
|
2019-04-21 16:09:12 -05:00
|
|
|
512, 640, 128, 16, 0,
|
|
|
|
|
{{"Siemens",cpus_europc}}
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const device_t m_europc = {
|
|
|
|
|
"Schneider EuroPC",
|
|
|
|
|
DEVICE_ROOT,
|
2018-10-06 18:20:09 -04:00
|
|
|
0,
|
2019-04-21 16:09:12 -05:00
|
|
|
L"schneider/europc",
|
|
|
|
|
europc_init, europc_close, NULL,
|
|
|
|
|
NULL, NULL, NULL,
|
|
|
|
|
&europc_info,
|
2018-02-20 21:44:51 -05:00
|
|
|
europc_config
|
|
|
|
|
};
|