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Minor upstream changes.

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This commit is contained in:
waltje
2018-09-22 19:14:45 -04:00
parent 98a9f34131
commit 116a7f68af
3 changed files with 44 additions and 38 deletions
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33
src/cpu/808x.c
View File

@@ -18,7 +18,7 @@
* 2 clocks - fetch opcode 1 2 clocks - execute * 2 clocks - fetch opcode 1 2 clocks - execute
* 2 clocks - fetch opcode 2 etc * 2 clocks - fetch opcode 2 etc
* *
* Version: @(#)808x.c 1.0.5 2018/05/06 * Version: @(#)808x.c 1.0.6 2018/09/22
* *
* Authors: Sarah Walker, <tommowalker@tommowalker.co.uk> * Authors: Sarah Walker, <tommowalker@tommowalker.co.uk>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -182,23 +182,6 @@ FETCH(void)
{ {
uint8_t temp; uint8_t temp;
#if 0
temp=prefetchqueue[0];
prefetchqueue[0]=prefetchqueue[1];
prefetchqueue[1]=prefetchqueue[2];
prefetchqueue[2]=prefetchqueue[3];
prefetchqueue[3]=prefetchqueue[4];
prefetchqueue[4]=prefetchqueue[5];
if (prefetchw<=((is8086)?4:3))
{
prefetchqueue[prefetchw++]=readmembf(cs+prefetchpc); prefetchpc++;
if (is8086 && (prefetchpc&1))
{
prefetchqueue[prefetchw++]=readmembf(cs+prefetchpc); prefetchpc++;
}
}
#endif
if (prefetchw==0) if (prefetchw==0)
{ {
cycles-=(4-(fetchcycles&3)); cycles-=(4-(fetchcycles&3));
@@ -219,8 +202,10 @@ FETCH(void)
prefetchqueue[0]=prefetchqueue[1]; prefetchqueue[0]=prefetchqueue[1];
prefetchqueue[1]=prefetchqueue[2]; prefetchqueue[1]=prefetchqueue[2];
prefetchqueue[2]=prefetchqueue[3]; prefetchqueue[2]=prefetchqueue[3];
prefetchqueue[3]=prefetchqueue[4]; if (is8086) {
prefetchqueue[4]=prefetchqueue[5]; prefetchqueue[3]=prefetchqueue[4];
prefetchqueue[4]=prefetchqueue[5];
}
prefetchw--; prefetchw--;
fetchcycles-=4; fetchcycles-=4;
cpu_state.pc++; cpu_state.pc++;
@@ -234,7 +219,7 @@ FETCHADD(int c)
{ {
int d; int d;
if (c<0) return; if (c<0) return;
if (prefetchw>((is8086)?4:3)) return; if (prefetchw>((is8086)?5:3)) return;
d=c+(fetchcycles&3); d=c+(fetchcycles&3);
while (d>3 && prefetchw<((is8086)?6:4)) while (d>3 && prefetchw<((is8086)?6:4))
{ {
@@ -245,7 +230,7 @@ FETCHADD(int c)
prefetchpc++; prefetchpc++;
prefetchw++; prefetchw++;
} }
if (prefetchw<6) if (prefetchw<(is8086)?6:4)
{ {
prefetchqueue[prefetchw]=readmembf(cs+prefetchpc); prefetchqueue[prefetchw]=readmembf(cs+prefetchpc);
prefetchpc++; prefetchpc++;
@@ -271,7 +256,7 @@ void
FETCHCOMPLETE(void) FETCHCOMPLETE(void)
{ {
if (!(fetchcycles&3)) return; if (!(fetchcycles&3)) return;
if (prefetchw>((is8086)?4:3)) return; if (prefetchw>((is8086)?5:3)) return;
if (!prefetchw) nextcyc=(4-(fetchcycles&3)); if (!prefetchw) nextcyc=(4-(fetchcycles&3));
cycles-=(4-(fetchcycles&3)); cycles-=(4-(fetchcycles&3));
fetchclocks+=(4-(fetchcycles&3)); fetchclocks+=(4-(fetchcycles&3));
@@ -281,7 +266,7 @@ FETCHCOMPLETE(void)
prefetchpc++; prefetchpc++;
prefetchw++; prefetchw++;
} }
if (prefetchw<6) if (prefetchw<(is8086)?6:4)
{ {
prefetchqueue[prefetchw]=readmembf(cs+prefetchpc); prefetchqueue[prefetchw]=readmembf(cs+prefetchpc);
prefetchpc++; prefetchpc++;

40
src/devices/floppy/fdc.c
View File

@@ -9,7 +9,7 @@
* Implementation of the NEC uPD-765 and compatible floppy disk * Implementation of the NEC uPD-765 and compatible floppy disk
* controller. * controller.
* *
* Version: @(#)fdc.c 1.0.15 2018/09/21 * Version: @(#)fdc.c 1.0.16 2018/09/22
* *
* Authors: Miran Grca, <mgrca8@gmail.com> * Authors: Miran Grca, <mgrca8@gmail.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk> * Sarah Walker, <tommowalker@tommowalker.co.uk>
@@ -1341,21 +1341,35 @@ fdc_read(uint16_t addr, void *priv)
case 7: /*Disk change*/ case 7: /*Disk change*/
drive = real_drive(fdc, fdc->dor & 3); drive = real_drive(fdc, fdc->dor & 3);
ret = 0x00; if (fdc->flags & FDC_FLAG_PS1) {
if (fdc->dor & (0x10 << drive)) {
if (fdc->flags & FDC_FLAG_TOSHIBA) { ret = (fdd_changed[drive] || drive_empty[drive]) ? 0x00 : 0x80;
/* ret |= (fdc->dor & 0x08);
* T1200 only has the DSCH bit set for the ret |= (fdc->rate & 0x03);
* internal 3.5" drive, otherwise it is 0. } else
*/ ret = 0x00;
if ((drive == 0) && (fdc->dor & (0x10 << drive)))
ret = (fdd_changed[drive] || drive_empty[drive]) ? 0x80 : 0x00;
} else { } else {
if (fdc->dor & (0x10 << drive)) if (fdc->dor & (0x10 << drive)) {
ret = (fdd_changed[drive] || drive_empty[drive])?0x80:0; /*
* T1200 only has the DSCH bit set for the
* internal 3.5" drive, otherwise it is 0.
*/
if ((drive == 1) && (fdc->flags & FDC_FLAG_TOSHIBA))
ret = 0x00;
else
ret = (fdd_changed[drive] || drive_empty[drive]) ? 0x80 : 0x00;
} else
ret = 0x00;
/* Some controllers reverse this bit. */
if (fdc->flags & FDC_FLAG_DISKCHG_ACTLOW) if (fdc->flags & FDC_FLAG_DISKCHG_ACTLOW)
ret ^= 0x80; ret ^= 0x80;
ret |= 0x01;
if (fdc->flags & FDC_FLAG_TOSHIBA) {
/* 1=ExtFDD off, 2=ExtFDD =A, 3=ExtFDD = B */
ret |= (0x03 << 5);
} else
ret |= 0x01;
} }
break; break;

9
src/pc.c
View File

@@ -8,7 +8,7 @@
* *
* Main emulator module where most things are controlled. * Main emulator module where most things are controlled.
* *
* Version: @(#)pc.c 1.0.53 2018/09/03 * Version: @(#)pc.c 1.0.54 2018/09/22
* *
* Authors: Fred N. van Kempen, <decwiz@yahoo.com> * Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -366,6 +366,13 @@ fatal(const char *fmt, ...)
dumppic(); dumppic();
dumpregs(1); dumpregs(1);
/*
* Attempt to perform a clean exit by terminating the
* main loop of the emulator, which hopefully also do
* a shutdown of all running threads.
*/
plat_stop();
/* Make sure the message does not have a trailing newline. */ /* Make sure the message does not have a trailing newline. */
if ((sp = strchr(temp, '\n')) != NULL) *sp = '\0'; if ((sp = strchr(temp, '\n')) != NULL) *sp = '\0';