diff --git a/src/cpu/386_ops.h b/src/cpu/386_ops.h index 8141045..3037906 100644 --- a/src/cpu/386_ops.h +++ b/src/cpu/386_ops.h @@ -8,12 +8,14 @@ * * 286/386+ instruction handlers list. * - * Version: @(#)386_ops.h 1.0.1 2018/02/14 + * Version: @(#)386_ops.h 1.0.2 2018/05/05 * - * Authors: Sarah Walker, + * Authors: Fred N. van Kempen, + * Sarah Walker, * leilei, * Miran Grca, * + * Copyright 2018 Fred N. van Kempen. * Copyright 2008-2018 Sarah Walker. * Copyright 2016-2018 leilei. * Copyright 2016-2018 Miran Grca. @@ -209,6 +211,7 @@ static int ILLEGAL(uint32_t fetchdat) #include "x86_ops_string.h" #include "x86_ops_xchg.h" + static int op0F_w_a16(uint32_t fetchdat) { int opcode = fetchdat & 0xff; @@ -250,7 +253,8 @@ static int op0F_l_a32(uint32_t fetchdat) return x86_opcodes_0f[opcode | 0x300](fetchdat >> 8); } -OpFn OP_TABLE(286_0f)[1024] = + +const OpFn OP_TABLE(286_0f)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -341,7 +345,7 @@ OpFn OP_TABLE(286_0f)[1024] = /*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, }; -OpFn OP_TABLE(386_0f)[1024] = +const OpFn OP_TABLE(386_0f)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -432,7 +436,7 @@ OpFn OP_TABLE(386_0f)[1024] = /*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, }; -OpFn OP_TABLE(486_0f)[1024] = +const OpFn OP_TABLE(486_0f)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -523,7 +527,7 @@ OpFn OP_TABLE(486_0f)[1024] = /*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, }; -OpFn OP_TABLE(winchip_0f)[1024] = +const OpFn OP_TABLE(winchip_0f)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -614,7 +618,7 @@ OpFn OP_TABLE(winchip_0f)[1024] = /*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL, }; -OpFn OP_TABLE(pentium_0f)[1024] = +const OpFn OP_TABLE(pentium_0f)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -705,7 +709,7 @@ OpFn OP_TABLE(pentium_0f)[1024] = /*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, }; -OpFn OP_TABLE(pentiummmx_0f)[1024] = +const OpFn OP_TABLE(pentiummmx_0f)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -797,7 +801,7 @@ OpFn OP_TABLE(pentiummmx_0f)[1024] = }; #if defined(DEV_BRANCH) && defined(USE_AMD_K) -OpFn OP_TABLE(k6_0f)[1024] = +const OpFn OP_TABLE(k6_0f)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -889,7 +893,7 @@ OpFn OP_TABLE(k6_0f)[1024] = }; #endif -OpFn OP_TABLE(c6x86mx_0f)[1024] = +const OpFn OP_TABLE(c6x86mx_0f)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -982,7 +986,7 @@ OpFn OP_TABLE(c6x86mx_0f)[1024] = #ifdef DEV_BRANCH #ifdef USE_I686 -OpFn OP_TABLE(pentiumpro_0f)[1024] = +const OpFn OP_TABLE(pentiumpro_0f)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -1074,7 +1078,7 @@ OpFn OP_TABLE(pentiumpro_0f)[1024] = }; #if 0 -OpFn OP_TABLE(pentium2_0f)[1024] = +const OpFn OP_TABLE(pentium2_0f)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -1166,7 +1170,7 @@ OpFn OP_TABLE(pentium2_0f)[1024] = }; #endif -OpFn OP_TABLE(pentium2d_0f)[1024] = +const OpFn OP_TABLE(pentium2d_0f)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -1259,7 +1263,7 @@ OpFn OP_TABLE(pentium2d_0f)[1024] = #endif #endif -OpFn OP_TABLE(286)[1024] = +const OpFn OP_TABLE(286)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -1350,7 +1354,7 @@ OpFn OP_TABLE(286)[1024] = /*f0*/ opLOCK, opLOCK, opREPNE, opREPE, opHLT, opCMC, opF6_a16, opF7_w_a16, opCLC, opSTC, opCLI, opSTI, opCLD, opSTD, opINCDEC_b_a16, opFF_w_a16, }; -OpFn OP_TABLE(386)[1024] = +const OpFn OP_TABLE(386)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -1441,7 +1445,7 @@ OpFn OP_TABLE(386)[1024] = /*f0*/ opLOCK, opINT1, opREPNE, opREPE, opHLT, opCMC, opF6_a32, opF7_l_a32, opCLC, opSTC, opCLI, opSTI, opCLD, opSTD, opINCDEC_b_a32, opFF_l_a32, }; -OpFn OP_TABLE(REPE)[1024] = +const OpFn OP_TABLE(REPE)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ @@ -1532,7 +1536,7 @@ OpFn OP_TABLE(REPE)[1024] = /*f0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; -OpFn OP_TABLE(REPNE)[1024] = +const OpFn OP_TABLE(REPNE)[1024] = { /*16-bit data, 16-bit addr*/ /* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/ diff --git a/src/cpu/codegen_x86.c b/src/cpu/codegen_x86.c index a054fac..3fce395 100644 --- a/src/cpu/codegen_x86.c +++ b/src/cpu/codegen_x86.c @@ -8,11 +8,13 @@ * * Dynamic Recompiler for Intel 32-bit systems. * - * Version: @(#)codegen_x86.c 1.0.2 2018/02/21 + * Version: @(#)codegen_x86.c 1.0.3 2018/05/05 * - * Authors: Sarah Walker, + * Authors: Fred N. van Kempen, + * Sarah Walker, * Miran Grca, * + * Copyright 2018 Fred N. van Kempen. * Copyright 2008-2018 Sarah Walker. * Copyright 2016-2018 Miran Grca. * @@ -1887,7 +1889,7 @@ void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t codeblock_t *block = &codeblock[block_current]; uint32_t op_32 = use32; uint32_t op_pc = new_pc; - OpFn *op_table = x86_dynarec_opcodes; + const OpFn *op_table = x86_dynarec_opcodes; RecompOpFn *recomp_op_table = recomp_opcodes; int opcode_shift = 0; int opcode_mask = 0x3ff; diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index e0024d8..59e9a62 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -8,12 +8,14 @@ * * CPU type handler. * - * Version: @(#)cpu.c 1.0.5 2018/05/0 + * Version: @(#)cpu.c 1.0.6 2018/05/05 * - * Authors: Sarah Walker, + * Authors: Fred N. van Kempen, + * Sarah Walker, * leilei, * Miran Grca, * + * Copyright 2018 Fred N. van Kempen. * Copyright 2008-2018 Sarah Walker. * Copyright 2016-2018 leilei. * Copyright 2016-2018 Miran Grca. @@ -52,55 +54,8 @@ # include "codegen.h" #endif -int isa_cycles; -static uint8_t ccr0, ccr1, ccr2, ccr3, ccr4, ccr5, ccr6; -#ifdef USE_DYNAREC -OpFn *x86_dynarec_opcodes; -OpFn *x86_dynarec_opcodes_0f; -OpFn *x86_dynarec_opcodes_d8_a16; -OpFn *x86_dynarec_opcodes_d8_a32; -OpFn *x86_dynarec_opcodes_d9_a16; -OpFn *x86_dynarec_opcodes_d9_a32; -OpFn *x86_dynarec_opcodes_da_a16; -OpFn *x86_dynarec_opcodes_da_a32; -OpFn *x86_dynarec_opcodes_db_a16; -OpFn *x86_dynarec_opcodes_db_a32; -OpFn *x86_dynarec_opcodes_dc_a16; -OpFn *x86_dynarec_opcodes_dc_a32; -OpFn *x86_dynarec_opcodes_dd_a16; -OpFn *x86_dynarec_opcodes_dd_a32; -OpFn *x86_dynarec_opcodes_de_a16; -OpFn *x86_dynarec_opcodes_de_a32; -OpFn *x86_dynarec_opcodes_df_a16; -OpFn *x86_dynarec_opcodes_df_a32; -OpFn *x86_dynarec_opcodes_REPE; -OpFn *x86_dynarec_opcodes_REPNE; -#endif - -OpFn *x86_opcodes; -OpFn *x86_opcodes_0f; -OpFn *x86_opcodes_d8_a16; -OpFn *x86_opcodes_d8_a32; -OpFn *x86_opcodes_d9_a16; -OpFn *x86_opcodes_d9_a32; -OpFn *x86_opcodes_da_a16; -OpFn *x86_opcodes_da_a32; -OpFn *x86_opcodes_db_a16; -OpFn *x86_opcodes_db_a32; -OpFn *x86_opcodes_dc_a16; -OpFn *x86_opcodes_dc_a32; -OpFn *x86_opcodes_dd_a16; -OpFn *x86_opcodes_dd_a32; -OpFn *x86_opcodes_de_a16; -OpFn *x86_opcodes_de_a32; -OpFn *x86_opcodes_df_a16; -OpFn *x86_opcodes_df_a32; -OpFn *x86_opcodes_REPE; -OpFn *x86_opcodes_REPNE; - -enum -{ +enum { CPUID_FPU = (1 << 0), CPUID_VME = (1 << 1), CPUID_PSE = (1 << 3), @@ -114,90 +69,145 @@ enum CPUID_FXSR = (1 << 24) }; -CPU *cpu_s; -int cpu_effective; -int cpu_multi; -int cpu_iscyrix; -int cpu_16bitbus; -int cpu_busspeed; -int cpu_hasrdtsc; -int cpu_hasMMX, cpu_hasMSR; -int cpu_hasCR4; -int cpu_hasVME; -int cpu_cyrix_alignment; -int hasfpu; -int cpuspeed; -int CPUID; -uint64_t cpu_CR4_mask; +#ifdef USE_DYNAREC +const OpFn *x86_dynarec_opcodes; +const OpFn *x86_dynarec_opcodes_0f; +const OpFn *x86_dynarec_opcodes_d8_a16; +const OpFn *x86_dynarec_opcodes_d8_a32; +const OpFn *x86_dynarec_opcodes_d9_a16; +const OpFn *x86_dynarec_opcodes_d9_a32; +const OpFn *x86_dynarec_opcodes_da_a16; +const OpFn *x86_dynarec_opcodes_da_a32; +const OpFn *x86_dynarec_opcodes_db_a16; +const OpFn *x86_dynarec_opcodes_db_a32; +const OpFn *x86_dynarec_opcodes_dc_a16; +const OpFn *x86_dynarec_opcodes_dc_a32; +const OpFn *x86_dynarec_opcodes_dd_a16; +const OpFn *x86_dynarec_opcodes_dd_a32; +const OpFn *x86_dynarec_opcodes_de_a16; +const OpFn *x86_dynarec_opcodes_de_a32; +const OpFn *x86_dynarec_opcodes_df_a16; +const OpFn *x86_dynarec_opcodes_df_a32; +const OpFn *x86_dynarec_opcodes_REPE; +const OpFn *x86_dynarec_opcodes_REPNE; +#endif -int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l; -int cpu_prefetch_cycles, cpu_prefetch_width, cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles; -int cpu_waitstates; -int cpu_cache_int_enabled, cpu_cache_ext_enabled; -int cpu_pci_speed; +const OpFn *x86_opcodes; +const OpFn *x86_opcodes_0f; +const OpFn *x86_opcodes_d8_a16; +const OpFn *x86_opcodes_d8_a32; +const OpFn *x86_opcodes_d9_a16; +const OpFn *x86_opcodes_d9_a32; +const OpFn *x86_opcodes_da_a16; +const OpFn *x86_opcodes_da_a32; +const OpFn *x86_opcodes_db_a16; +const OpFn *x86_opcodes_db_a32; +const OpFn *x86_opcodes_dc_a16; +const OpFn *x86_opcodes_dc_a32; +const OpFn *x86_opcodes_dd_a16; +const OpFn *x86_opcodes_dd_a32; +const OpFn *x86_opcodes_de_a16; +const OpFn *x86_opcodes_de_a32; +const OpFn *x86_opcodes_df_a16; +const OpFn *x86_opcodes_df_a32; +const OpFn *x86_opcodes_REPE; +const OpFn *x86_opcodes_REPNE; -int is286, is386, is486; -int israpidcad, is_pentium; +CPU *cpu_s; +int cpu_effective; +int cpu_multi; +int cpu_16bitbus; +int cpu_busspeed; +int cpu_cyrix_alignment; +int cpuspeed; +int CPUID; +uint64_t cpu_CR4_mask; +int isa_cycles; +int cpu_cycles_read, cpu_cycles_read_l, + cpu_cycles_write, cpu_cycles_write_l; +int cpu_prefetch_cycles, cpu_prefetch_width, + cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles; +int cpu_waitstates; +int cpu_cache_int_enabled, cpu_cache_ext_enabled; +int cpu_pci_speed; -uint64_t tsc = 0; +int is286, + is386, + is486, + cpu_iscyrix, + israpidcad, + is_pentium; -cr0_t CR0; -uint64_t pmc[2] = {0, 0}; +int hasfpu, + cpu_hasrdtsc, + cpu_hasMMX, + cpu_hasMSR, + cpu_hasCR4, + cpu_hasVME; -uint16_t temp_seg_data[4] = {0, 0, 0, 0}; + +uint64_t tsc = 0; +msr_t msr; +cr0_t CR0; +uint64_t pmc[2] = {0, 0}; + +uint16_t temp_seg_data[4] = {0, 0, 0, 0}; #if defined(DEV_BRANCH) && defined(USE_I686) -uint16_t cs_msr = 0; -uint32_t esp_msr = 0; -uint32_t eip_msr = 0; -uint64_t apic_base_msr = 0; -uint64_t mtrr_cap_msr = 0; -uint64_t mtrr_physbase_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0}; -uint64_t mtrr_physmask_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0}; -uint64_t mtrr_fix64k_8000_msr = 0; -uint64_t mtrr_fix16k_8000_msr = 0; -uint64_t mtrr_fix16k_a000_msr = 0; -uint64_t mtrr_fix4k_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0}; -uint64_t pat_msr = 0; -uint64_t mtrr_deftype_msr = 0; -uint64_t msr_ia32_pmc[8] = {0, 0, 0, 0, 0, 0, 0, 0}; -uint64_t ecx17_msr = 0; -uint64_t ecx79_msr = 0; -uint64_t ecx8x_msr[4] = {0, 0, 0, 0}; -uint64_t ecx116_msr = 0; -uint64_t ecx11x_msr[4] = {0, 0, 0, 0}; -uint64_t ecx11e_msr = 0; -uint64_t ecx186_msr = 0; -uint64_t ecx187_msr = 0; -uint64_t ecx1e0_msr = 0; -uint64_t ecx570_msr = 0; +uint16_t cs_msr = 0; +uint32_t esp_msr = 0; +uint32_t eip_msr = 0; +uint64_t apic_base_msr = 0; +uint64_t mtrr_cap_msr = 0; +uint64_t mtrr_physbase_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0}; +uint64_t mtrr_physmask_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0}; +uint64_t mtrr_fix64k_8000_msr = 0; +uint64_t mtrr_fix16k_8000_msr = 0; +uint64_t mtrr_fix16k_a000_msr = 0; +uint64_t mtrr_fix4k_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0}; +uint64_t pat_msr = 0; +uint64_t mtrr_deftype_msr = 0; +uint64_t msr_ia32_pmc[8] = {0, 0, 0, 0, 0, 0, 0, 0}; +uint64_t ecx17_msr = 0; +uint64_t ecx79_msr = 0; +uint64_t ecx8x_msr[4] = {0, 0, 0, 0}; +uint64_t ecx116_msr = 0; +uint64_t ecx11x_msr[4] = {0, 0, 0, 0}; +uint64_t ecx11e_msr = 0; +uint64_t ecx186_msr = 0; +uint64_t ecx187_msr = 0; +uint64_t ecx1e0_msr = 0; +uint64_t ecx570_msr = 0; #endif #if defined(DEV_BRANCH) && defined(USE_AMD_K) -/* AMD K5 and K6 MSR's. */ -uint64_t ecx83_msr = 0; -/* These are K6-only. */ -uint64_t star = 0; -uint64_t sfmask = 0; +uint64_t ecx83_msr = 0; /* AMD K5 and K6 MSR's. */ +uint64_t star = 0; /* These are K6-only. */ +uint64_t sfmask = 0; #endif -int timing_rr; -int timing_mr, timing_mrl; -int timing_rm, timing_rml; -int timing_mm, timing_mml; -int timing_bt, timing_bnt; -int timing_int, timing_int_rm, timing_int_v86, timing_int_pm, timing_int_pm_outer; -int timing_iret_rm, timing_iret_v86, timing_iret_pm, timing_iret_pm_outer; -int timing_call_rm, timing_call_pm, timing_call_pm_gate, timing_call_pm_gate_inner; -int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer; -int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate; -int timing_misaligned; - -msr_t msr; +int timing_rr; +int timing_mr, timing_mrl; +int timing_rm, timing_rml; +int timing_mm, timing_mml; +int timing_bt, timing_bnt; +int timing_int, timing_int_rm, timing_int_v86, timing_int_pm, + timing_int_pm_outer; +int timing_iret_rm, timing_iret_v86, timing_iret_pm, + timing_iret_pm_outer; +int timing_call_rm, timing_call_pm, timing_call_pm_gate, + timing_call_pm_gate_inner; +int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer; +int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate; +int timing_misaligned; -void cpu_dynamic_switch(int new_cpu) +static uint8_t ccr0, ccr1, ccr2, ccr3, ccr4, ccr5, ccr6; + + +void +cpu_dynamic_switch(int new_cpu) { if (cpu_effective == new_cpu) return; @@ -209,13 +219,16 @@ void cpu_dynamic_switch(int new_cpu) cpu = c; } -void cpu_set_edx(void) + +void +cpu_set_edx(void) { EDX = machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].edx_reset; } -void cpu_set(void) +void +cpu_set(void) { if (!machines[machine].cpu[cpu_manufacturer].cpus) { @@ -1303,7 +1316,8 @@ cpu_current_pc(char *bufp) } -void cpu_CPUID() +void +cpu_CPUID(void) { switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type) { @@ -2206,8 +2220,11 @@ uint8_t cyrix_read(uint16_t addr, void *priv) return 0xff; } + +void #ifdef USE_DYNAREC -void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f, OpFn *dynarec_opcodes, OpFn *dynarec_opcodes_0f) +x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f, + const OpFn *dynarec_opcodes, const OpFn *dynarec_opcodes_0f) { x86_opcodes = opcodes; x86_opcodes_0f = opcodes_0f; @@ -2215,14 +2232,16 @@ void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f, OpFn *dynarec_opcodes, OpFn x86_dynarec_opcodes_0f = dynarec_opcodes_0f; } #else -void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f) +x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f) { x86_opcodes = opcodes; x86_opcodes_0f = opcodes_0f; } #endif -void cpu_update_waitstates() + +void +cpu_update_waitstates(void) { cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective]; diff --git a/src/cpu/x86_ops.h b/src/cpu/x86_ops.h index 5be965f..5b30c07 100644 --- a/src/cpu/x86_ops.h +++ b/src/cpu/x86_ops.h @@ -8,11 +8,13 @@ * * Miscellaneous x86 CPU Instructions. * - * Version: @(#)x86_ops.h 1.0.1 2018/02/14 + * Version: @(#)x86_ops.h 1.0.2 2018/05/05 * - * Authors: Sarah Walker, + * Authors: Fred N. van Kempen, + * Sarah Walker, * Miran Grca, * + * Copyright 2018 Fred N. van Kempen. * Copyright 2008-2018 Sarah Walker. * Copyright 2016-2018 Miran Grca. * @@ -44,186 +46,188 @@ typedef int (*OpFn)(uint32_t fetchdat); #ifdef USE_DYNAREC -void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f, OpFn *dynarec_opcodes, OpFn *dynarec_opcodes_0f); +void x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f, + const OpFn *dynarec_opcodes, + const OpFn *dynarec_opcodes_0f); -extern OpFn *x86_dynarec_opcodes; -extern OpFn *x86_dynarec_opcodes_0f; -extern OpFn *x86_dynarec_opcodes_d8_a16; -extern OpFn *x86_dynarec_opcodes_d8_a32; -extern OpFn *x86_dynarec_opcodes_d9_a16; -extern OpFn *x86_dynarec_opcodes_d9_a32; -extern OpFn *x86_dynarec_opcodes_da_a16; -extern OpFn *x86_dynarec_opcodes_da_a32; -extern OpFn *x86_dynarec_opcodes_db_a16; -extern OpFn *x86_dynarec_opcodes_db_a32; -extern OpFn *x86_dynarec_opcodes_dc_a16; -extern OpFn *x86_dynarec_opcodes_dc_a32; -extern OpFn *x86_dynarec_opcodes_dd_a16; -extern OpFn *x86_dynarec_opcodes_dd_a32; -extern OpFn *x86_dynarec_opcodes_de_a16; -extern OpFn *x86_dynarec_opcodes_de_a32; -extern OpFn *x86_dynarec_opcodes_df_a16; -extern OpFn *x86_dynarec_opcodes_df_a32; -extern OpFn *x86_dynarec_opcodes_REPE; -extern OpFn *x86_dynarec_opcodes_REPNE; +extern const OpFn *x86_dynarec_opcodes; +extern const OpFn *x86_dynarec_opcodes_0f; +extern const OpFn *x86_dynarec_opcodes_d8_a16; +extern const OpFn *x86_dynarec_opcodes_d8_a32; +extern const OpFn *x86_dynarec_opcodes_d9_a16; +extern const OpFn *x86_dynarec_opcodes_d9_a32; +extern const OpFn *x86_dynarec_opcodes_da_a16; +extern const OpFn *x86_dynarec_opcodes_da_a32; +extern const OpFn *x86_dynarec_opcodes_db_a16; +extern const OpFn *x86_dynarec_opcodes_db_a32; +extern const OpFn *x86_dynarec_opcodes_dc_a16; +extern const OpFn *x86_dynarec_opcodes_dc_a32; +extern const OpFn *x86_dynarec_opcodes_dd_a16; +extern const OpFn *x86_dynarec_opcodes_dd_a32; +extern const OpFn *x86_dynarec_opcodes_de_a16; +extern const OpFn *x86_dynarec_opcodes_de_a32; +extern const OpFn *x86_dynarec_opcodes_df_a16; +extern const OpFn *x86_dynarec_opcodes_df_a32; +extern const OpFn *x86_dynarec_opcodes_REPE; +extern const OpFn *x86_dynarec_opcodes_REPNE; -extern OpFn dynarec_ops_286[1024]; -extern OpFn dynarec_ops_286_0f[1024]; +extern const OpFn dynarec_ops_286[1024]; +extern const OpFn dynarec_ops_286_0f[1024]; -extern OpFn dynarec_ops_386[1024]; -extern OpFn dynarec_ops_386_0f[1024]; +extern const OpFn dynarec_ops_386[1024]; +extern const OpFn dynarec_ops_386_0f[1024]; -extern OpFn dynarec_ops_486_0f[1024]; +extern const OpFn dynarec_ops_486_0f[1024]; -extern OpFn dynarec_ops_winchip_0f[1024]; +extern const OpFn dynarec_ops_winchip_0f[1024]; -extern OpFn dynarec_ops_pentium_0f[1024]; -extern OpFn dynarec_ops_pentiummmx_0f[1024]; -extern OpFn dynarec_ops_c6x86mx_0f[1024]; +extern const OpFn dynarec_ops_pentium_0f[1024]; +extern const OpFn dynarec_ops_pentiummmx_0f[1024]; +extern const OpFn dynarec_ops_c6x86mx_0f[1024]; #if defined(DEV_BRANCH) && defined(USE_AMD_K) -extern OpFn dynarec_ops_k6_0f[1024]; +extern const OpFn dynarec_ops_k6_0f[1024]; #endif #if defined(DEV_BRANCH) && defined(USE_I686) -extern OpFn dynarec_ops_pentiumpro_0f[1024]; -extern OpFn dynarec_ops_pentium2d_0f[1024]; +extern const OpFn dynarec_ops_pentiumpro_0f[1024]; +extern const OpFn dynarec_ops_pentium2d_0f[1024]; #endif -extern OpFn dynarec_ops_fpu_287_d9_a16[256]; -extern OpFn dynarec_ops_fpu_287_d9_a32[256]; -extern OpFn dynarec_ops_fpu_287_da_a16[256]; -extern OpFn dynarec_ops_fpu_287_da_a32[256]; -extern OpFn dynarec_ops_fpu_287_db_a16[256]; -extern OpFn dynarec_ops_fpu_287_db_a32[256]; -extern OpFn dynarec_ops_fpu_287_dc_a16[32]; -extern OpFn dynarec_ops_fpu_287_dc_a32[32]; -extern OpFn dynarec_ops_fpu_287_dd_a16[256]; -extern OpFn dynarec_ops_fpu_287_dd_a32[256]; -extern OpFn dynarec_ops_fpu_287_de_a16[256]; -extern OpFn dynarec_ops_fpu_287_de_a32[256]; -extern OpFn dynarec_ops_fpu_287_df_a16[256]; -extern OpFn dynarec_ops_fpu_287_df_a32[256]; +extern const OpFn dynarec_ops_fpu_287_d9_a16[256]; +extern const OpFn dynarec_ops_fpu_287_d9_a32[256]; +extern const OpFn dynarec_ops_fpu_287_da_a16[256]; +extern const OpFn dynarec_ops_fpu_287_da_a32[256]; +extern const OpFn dynarec_ops_fpu_287_db_a16[256]; +extern const OpFn dynarec_ops_fpu_287_db_a32[256]; +extern const OpFn dynarec_ops_fpu_287_dc_a16[32]; +extern const OpFn dynarec_ops_fpu_287_dc_a32[32]; +extern const OpFn dynarec_ops_fpu_287_dd_a16[256]; +extern const OpFn dynarec_ops_fpu_287_dd_a32[256]; +extern const OpFn dynarec_ops_fpu_287_de_a16[256]; +extern const OpFn dynarec_ops_fpu_287_de_a32[256]; +extern const OpFn dynarec_ops_fpu_287_df_a16[256]; +extern const OpFn dynarec_ops_fpu_287_df_a32[256]; -extern OpFn dynarec_ops_fpu_d8_a16[32]; -extern OpFn dynarec_ops_fpu_d8_a32[32]; -extern OpFn dynarec_ops_fpu_d9_a16[256]; -extern OpFn dynarec_ops_fpu_d9_a32[256]; -extern OpFn dynarec_ops_fpu_da_a16[256]; -extern OpFn dynarec_ops_fpu_da_a32[256]; -extern OpFn dynarec_ops_fpu_db_a16[256]; -extern OpFn dynarec_ops_fpu_db_a32[256]; -extern OpFn dynarec_ops_fpu_dc_a16[32]; -extern OpFn dynarec_ops_fpu_dc_a32[32]; -extern OpFn dynarec_ops_fpu_dd_a16[256]; -extern OpFn dynarec_ops_fpu_dd_a32[256]; -extern OpFn dynarec_ops_fpu_de_a16[256]; -extern OpFn dynarec_ops_fpu_de_a32[256]; -extern OpFn dynarec_ops_fpu_df_a16[256]; -extern OpFn dynarec_ops_fpu_df_a32[256]; -extern OpFn dynarec_ops_nofpu_a16[256]; -extern OpFn dynarec_ops_nofpu_a32[256]; +extern const OpFn dynarec_ops_fpu_d8_a16[32]; +extern const OpFn dynarec_ops_fpu_d8_a32[32]; +extern const OpFn dynarec_ops_fpu_d9_a16[256]; +extern const OpFn dynarec_ops_fpu_d9_a32[256]; +extern const OpFn dynarec_ops_fpu_da_a16[256]; +extern const OpFn dynarec_ops_fpu_da_a32[256]; +extern const OpFn dynarec_ops_fpu_db_a16[256]; +extern const OpFn dynarec_ops_fpu_db_a32[256]; +extern const OpFn dynarec_ops_fpu_dc_a16[32]; +extern const OpFn dynarec_ops_fpu_dc_a32[32]; +extern const OpFn dynarec_ops_fpu_dd_a16[256]; +extern const OpFn dynarec_ops_fpu_dd_a32[256]; +extern const OpFn dynarec_ops_fpu_de_a16[256]; +extern const OpFn dynarec_ops_fpu_de_a32[256]; +extern const OpFn dynarec_ops_fpu_df_a16[256]; +extern const OpFn dynarec_ops_fpu_df_a32[256]; +extern const OpFn dynarec_ops_nofpu_a16[256]; +extern const OpFn dynarec_ops_nofpu_a32[256]; -extern OpFn dynarec_ops_fpu_686_da_a16[256]; -extern OpFn dynarec_ops_fpu_686_da_a32[256]; -extern OpFn dynarec_ops_fpu_686_db_a16[256]; -extern OpFn dynarec_ops_fpu_686_db_a32[256]; -extern OpFn dynarec_ops_fpu_686_df_a16[256]; -extern OpFn dynarec_ops_fpu_686_df_a32[256]; +extern const OpFn dynarec_ops_fpu_686_da_a16[256]; +extern const OpFn dynarec_ops_fpu_686_da_a32[256]; +extern const OpFn dynarec_ops_fpu_686_db_a16[256]; +extern const OpFn dynarec_ops_fpu_686_db_a32[256]; +extern const OpFn dynarec_ops_fpu_686_df_a16[256]; +extern const OpFn dynarec_ops_fpu_686_df_a32[256]; -extern OpFn dynarec_ops_REPE[1024]; -extern OpFn dynarec_ops_REPNE[1024]; +extern const OpFn dynarec_ops_REPE[1024]; +extern const OpFn dynarec_ops_REPNE[1024]; #else -void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f); +void x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f); #endif -extern OpFn *x86_opcodes; -extern OpFn *x86_opcodes_0f; -extern OpFn *x86_opcodes_d8_a16; -extern OpFn *x86_opcodes_d8_a32; -extern OpFn *x86_opcodes_d9_a16; -extern OpFn *x86_opcodes_d9_a32; -extern OpFn *x86_opcodes_da_a16; -extern OpFn *x86_opcodes_da_a32; -extern OpFn *x86_opcodes_db_a16; -extern OpFn *x86_opcodes_db_a32; -extern OpFn *x86_opcodes_dc_a16; -extern OpFn *x86_opcodes_dc_a32; -extern OpFn *x86_opcodes_dd_a16; -extern OpFn *x86_opcodes_dd_a32; -extern OpFn *x86_opcodes_de_a16; -extern OpFn *x86_opcodes_de_a32; -extern OpFn *x86_opcodes_df_a16; -extern OpFn *x86_opcodes_df_a32; -extern OpFn *x86_opcodes_REPE; -extern OpFn *x86_opcodes_REPNE; +extern const OpFn *x86_opcodes; +extern const OpFn *x86_opcodes_0f; +extern const OpFn *x86_opcodes_d8_a16; +extern const OpFn *x86_opcodes_d8_a32; +extern const OpFn *x86_opcodes_d9_a16; +extern const OpFn *x86_opcodes_d9_a32; +extern const OpFn *x86_opcodes_da_a16; +extern const OpFn *x86_opcodes_da_a32; +extern const OpFn *x86_opcodes_db_a16; +extern const OpFn *x86_opcodes_db_a32; +extern const OpFn *x86_opcodes_dc_a16; +extern const OpFn *x86_opcodes_dc_a32; +extern const OpFn *x86_opcodes_dd_a16; +extern const OpFn *x86_opcodes_dd_a32; +extern const OpFn *x86_opcodes_de_a16; +extern const OpFn *x86_opcodes_de_a32; +extern const OpFn *x86_opcodes_df_a16; +extern const OpFn *x86_opcodes_df_a32; +extern const OpFn *x86_opcodes_REPE; +extern const OpFn *x86_opcodes_REPNE; -extern OpFn ops_286[1024]; -extern OpFn ops_286_0f[1024]; +extern const OpFn ops_286[1024]; +extern const OpFn ops_286_0f[1024]; -extern OpFn ops_386[1024]; -extern OpFn ops_386_0f[1024]; +extern const OpFn ops_386[1024]; +extern const OpFn ops_386_0f[1024]; -extern OpFn ops_486_0f[1024]; +extern const OpFn ops_486_0f[1024]; -extern OpFn ops_winchip_0f[1024]; +extern const OpFn ops_winchip_0f[1024]; -extern OpFn ops_pentium_0f[1024]; -extern OpFn ops_pentiummmx_0f[1024]; +extern const OpFn ops_pentium_0f[1024]; +extern const OpFn ops_pentiummmx_0f[1024]; -extern OpFn ops_c6x86mx_0f[1024]; +extern const OpFn ops_c6x86mx_0f[1024]; #if defined(DEV_BRANCH) && defined(USE_AMD_K) -extern OpFn ops_k6_0f[1024]; +extern const OpFn ops_k6_0f[1024]; #endif #if defined(DEV_BRANCH) && defined(USE_I686) -extern OpFn ops_pentiumpro_0f[1024]; -extern OpFn ops_pentium2d_0f[1024]; +extern const OpFn ops_pentiumpro_0f[1024]; +extern const OpFn ops_pentium2d_0f[1024]; #endif -extern OpFn ops_fpu_287_d9_a16[256]; -extern OpFn ops_fpu_287_d9_a32[256]; -extern OpFn ops_fpu_287_da_a16[256]; -extern OpFn ops_fpu_287_da_a32[256]; -extern OpFn ops_fpu_287_db_a16[256]; -extern OpFn ops_fpu_287_db_a32[256]; -extern OpFn ops_fpu_287_dc_a16[32]; -extern OpFn ops_fpu_287_dc_a32[32]; -extern OpFn ops_fpu_287_dd_a16[256]; -extern OpFn ops_fpu_287_dd_a32[256]; -extern OpFn ops_fpu_287_de_a16[256]; -extern OpFn ops_fpu_287_de_a32[256]; -extern OpFn ops_fpu_287_df_a16[256]; -extern OpFn ops_fpu_287_df_a32[256]; +extern const OpFn ops_fpu_287_d9_a16[256]; +extern const OpFn ops_fpu_287_d9_a32[256]; +extern const OpFn ops_fpu_287_da_a16[256]; +extern const OpFn ops_fpu_287_da_a32[256]; +extern const OpFn ops_fpu_287_db_a16[256]; +extern const OpFn ops_fpu_287_db_a32[256]; +extern const OpFn ops_fpu_287_dc_a16[32]; +extern const OpFn ops_fpu_287_dc_a32[32]; +extern const OpFn ops_fpu_287_dd_a16[256]; +extern const OpFn ops_fpu_287_dd_a32[256]; +extern const OpFn ops_fpu_287_de_a16[256]; +extern const OpFn ops_fpu_287_de_a32[256]; +extern const OpFn ops_fpu_287_df_a16[256]; +extern const OpFn ops_fpu_287_df_a32[256]; -extern OpFn ops_fpu_d8_a16[32]; -extern OpFn ops_fpu_d8_a32[32]; -extern OpFn ops_fpu_d9_a16[256]; -extern OpFn ops_fpu_d9_a32[256]; -extern OpFn ops_fpu_da_a16[256]; -extern OpFn ops_fpu_da_a32[256]; -extern OpFn ops_fpu_db_a16[256]; -extern OpFn ops_fpu_db_a32[256]; -extern OpFn ops_fpu_dc_a16[32]; -extern OpFn ops_fpu_dc_a32[32]; -extern OpFn ops_fpu_dd_a16[256]; -extern OpFn ops_fpu_dd_a32[256]; -extern OpFn ops_fpu_de_a16[256]; -extern OpFn ops_fpu_de_a32[256]; -extern OpFn ops_fpu_df_a16[256]; -extern OpFn ops_fpu_df_a32[256]; -extern OpFn ops_nofpu_a16[256]; -extern OpFn ops_nofpu_a32[256]; +extern const OpFn ops_fpu_d8_a16[32]; +extern const OpFn ops_fpu_d8_a32[32]; +extern const OpFn ops_fpu_d9_a16[256]; +extern const OpFn ops_fpu_d9_a32[256]; +extern const OpFn ops_fpu_da_a16[256]; +extern const OpFn ops_fpu_da_a32[256]; +extern const OpFn ops_fpu_db_a16[256]; +extern const OpFn ops_fpu_db_a32[256]; +extern const OpFn ops_fpu_dc_a16[32]; +extern const OpFn ops_fpu_dc_a32[32]; +extern const OpFn ops_fpu_dd_a16[256]; +extern const OpFn ops_fpu_dd_a32[256]; +extern const OpFn ops_fpu_de_a16[256]; +extern const OpFn ops_fpu_de_a32[256]; +extern const OpFn ops_fpu_df_a16[256]; +extern const OpFn ops_fpu_df_a32[256]; +extern const OpFn ops_nofpu_a16[256]; +extern const OpFn ops_nofpu_a32[256]; -extern OpFn ops_fpu_686_da_a16[256]; -extern OpFn ops_fpu_686_da_a32[256]; -extern OpFn ops_fpu_686_db_a16[256]; -extern OpFn ops_fpu_686_db_a32[256]; -extern OpFn ops_fpu_686_df_a16[256]; -extern OpFn ops_fpu_686_df_a32[256]; +extern const OpFn ops_fpu_686_da_a16[256]; +extern const OpFn ops_fpu_686_da_a32[256]; +extern const OpFn ops_fpu_686_db_a16[256]; +extern const OpFn ops_fpu_686_db_a32[256]; +extern const OpFn ops_fpu_686_df_a16[256]; +extern const OpFn ops_fpu_686_df_a32[256]; -extern OpFn ops_REPE[1024]; -extern OpFn ops_REPNE[1024]; +extern const OpFn ops_REPE[1024]; +extern const OpFn ops_REPNE[1024]; #endif /*_X86_OPS_H*/ diff --git a/src/cpu/x87_ops.h b/src/cpu/x87_ops.h index a6a48c0..4d685d0 100644 --- a/src/cpu/x87_ops.h +++ b/src/cpu/x87_ops.h @@ -8,12 +8,14 @@ * * x87 FPU instructions core. * - * Version: @(#)x87_ops.h 1.0.4 2018/03/09 + * Version: @(#)x87_ops.h 1.0.5 2018/05/05 * - * Authors: Sarah Walker, + * Authors: Fred N. van Kempen, + * Sarah Walker, * leilei, * Miran Grca, * + * Copyright 2018 Fred N. van Kempen. * Copyright 2008-2018 Sarah Walker. * Copyright 2016-2018 leilei. * Copyright 2016-2018 Miran Grca. @@ -476,14 +478,14 @@ static int FPU_ILLEGAL_a32(uint32_t fetchdat) #define ILLEGAL_a16 FPU_ILLEGAL_a16 #define ILLEGAL_a32 FPU_ILLEGAL_a32 -OpFn OP_TABLE(fpu_d8_a16)[32] = +const OpFn OP_TABLE(fpu_d8_a16)[32] = { opFADDs_a16, opFMULs_a16, opFCOMs_a16, opFCOMPs_a16, opFSUBs_a16, opFSUBRs_a16, opFDIVs_a16, opFDIVRs_a16, opFADDs_a16, opFMULs_a16, opFCOMs_a16, opFCOMPs_a16, opFSUBs_a16, opFSUBRs_a16, opFDIVs_a16, opFDIVRs_a16, opFADDs_a16, opFMULs_a16, opFCOMs_a16, opFCOMPs_a16, opFSUBs_a16, opFSUBRs_a16, opFDIVs_a16, opFDIVRs_a16, opFADD, opFMUL, opFCOM, opFCOMP, opFSUB, opFSUBR, opFDIV, opFDIVR }; -OpFn OP_TABLE(fpu_d8_a32)[32] = +const OpFn OP_TABLE(fpu_d8_a32)[32] = { opFADDs_a32, opFMULs_a32, opFCOMs_a32, opFCOMPs_a32, opFSUBs_a32, opFSUBRs_a32, opFDIVs_a32, opFDIVRs_a32, opFADDs_a32, opFMULs_a32, opFCOMs_a32, opFCOMPs_a32, opFSUBs_a32, opFSUBRs_a32, opFDIVs_a32, opFDIVRs_a32, @@ -491,7 +493,7 @@ OpFn OP_TABLE(fpu_d8_a32)[32] = opFADD, opFMUL, opFCOM, opFCOMP, opFSUB, opFSUBR, opFDIV, opFDIVR }; -OpFn OP_TABLE(fpu_287_d9_a16)[256] = +const OpFn OP_TABLE(fpu_287_d9_a16)[256] = { opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, @@ -530,7 +532,7 @@ OpFn OP_TABLE(fpu_287_d9_a16)[256] = opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS }; -OpFn OP_TABLE(fpu_287_d9_a32)[256] = +const OpFn OP_TABLE(fpu_287_d9_a32)[256] = { opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, @@ -569,7 +571,7 @@ OpFn OP_TABLE(fpu_287_d9_a32)[256] = opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS }; -OpFn OP_TABLE(fpu_d9_a16)[256] = +const OpFn OP_TABLE(fpu_d9_a16)[256] = { opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, @@ -608,7 +610,7 @@ OpFn OP_TABLE(fpu_d9_a16)[256] = opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS }; -OpFn OP_TABLE(fpu_d9_a32)[256] = +const OpFn OP_TABLE(fpu_d9_a32)[256] = { opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, @@ -647,7 +649,7 @@ OpFn OP_TABLE(fpu_d9_a32)[256] = opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS }; -OpFn OP_TABLE(fpu_287_da_a16)[256] = +const OpFn OP_TABLE(fpu_287_da_a16)[256] = { opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, @@ -685,7 +687,7 @@ OpFn OP_TABLE(fpu_287_da_a16)[256] = ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, }; -OpFn OP_TABLE(fpu_287_da_a32)[256] = +const OpFn OP_TABLE(fpu_287_da_a32)[256] = { opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, @@ -724,7 +726,7 @@ OpFn OP_TABLE(fpu_287_da_a32)[256] = ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, }; -OpFn OP_TABLE(fpu_da_a16)[256] = +const OpFn OP_TABLE(fpu_da_a16)[256] = { opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, @@ -762,7 +764,7 @@ OpFn OP_TABLE(fpu_da_a16)[256] = ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, }; -OpFn OP_TABLE(fpu_da_a32)[256] = +const OpFn OP_TABLE(fpu_da_a32)[256] = { opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, @@ -801,7 +803,7 @@ OpFn OP_TABLE(fpu_da_a32)[256] = ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, }; -OpFn OP_TABLE(fpu_686_da_a16)[256] = +const OpFn OP_TABLE(fpu_686_da_a16)[256] = { opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, opFMULil_a16, @@ -839,7 +841,7 @@ OpFn OP_TABLE(fpu_686_da_a16)[256] = ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, }; -OpFn OP_TABLE(fpu_686_da_a32)[256] = +const OpFn OP_TABLE(fpu_686_da_a32)[256] = { opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFADDil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, opFMULil_a32, @@ -878,7 +880,7 @@ OpFn OP_TABLE(fpu_686_da_a32)[256] = ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, }; -OpFn OP_TABLE(fpu_287_db_a16)[256] = +const OpFn OP_TABLE(fpu_287_db_a16)[256] = { opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, @@ -916,7 +918,7 @@ OpFn OP_TABLE(fpu_287_db_a16)[256] = ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, }; -OpFn OP_TABLE(fpu_287_db_a32)[256] = +const OpFn OP_TABLE(fpu_287_db_a32)[256] = { opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, @@ -955,7 +957,7 @@ OpFn OP_TABLE(fpu_287_db_a32)[256] = ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, }; -OpFn OP_TABLE(fpu_db_a16)[256] = +const OpFn OP_TABLE(fpu_db_a16)[256] = { opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, @@ -993,7 +995,7 @@ OpFn OP_TABLE(fpu_db_a16)[256] = ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, }; -OpFn OP_TABLE(fpu_db_a32)[256] = +const OpFn OP_TABLE(fpu_db_a32)[256] = { opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, @@ -1032,7 +1034,7 @@ OpFn OP_TABLE(fpu_db_a32)[256] = ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, }; -OpFn OP_TABLE(fpu_686_db_a16)[256] = +const OpFn OP_TABLE(fpu_686_db_a16)[256] = { opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, @@ -1070,7 +1072,7 @@ OpFn OP_TABLE(fpu_686_db_a16)[256] = opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, }; -OpFn OP_TABLE(fpu_686_db_a32)[256] = +const OpFn OP_TABLE(fpu_686_db_a32)[256] = { opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, @@ -1109,14 +1111,14 @@ OpFn OP_TABLE(fpu_686_db_a32)[256] = ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, }; -OpFn OP_TABLE(fpu_287_dc_a16)[32] = +const OpFn OP_TABLE(fpu_287_dc_a16)[32] = { opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16, opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16, opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16, opFADDr, opFMULr, ILLEGAL_a16, ILLEGAL_a16, opFSUBRr, opFSUBr, opFDIVRr, opFDIVr }; -OpFn OP_TABLE(fpu_287_dc_a32)[32] = +const OpFn OP_TABLE(fpu_287_dc_a32)[32] = { opFADDd_a32, opFMULd_a32, opFCOMd_a32, opFCOMPd_a32, opFSUBd_a32, opFSUBRd_a32, opFDIVd_a32, opFDIVRd_a32, opFADDd_a32, opFMULd_a32, opFCOMd_a32, opFCOMPd_a32, opFSUBd_a32, opFSUBRd_a32, opFDIVd_a32, opFDIVRd_a32, @@ -1124,14 +1126,14 @@ OpFn OP_TABLE(fpu_287_dc_a32)[32] = opFADDr, opFMULr, ILLEGAL_a32, ILLEGAL_a32, opFSUBRr, opFSUBr, opFDIVRr, opFDIVr }; -OpFn OP_TABLE(fpu_dc_a16)[32] = +const OpFn OP_TABLE(fpu_dc_a16)[32] = { opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16, opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16, opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16, opFADDr, opFMULr, opFCOM, opFCOMP, opFSUBRr, opFSUBr, opFDIVRr, opFDIVr }; -OpFn OP_TABLE(fpu_dc_a32)[32] = +const OpFn OP_TABLE(fpu_dc_a32)[32] = { opFADDd_a32, opFMULd_a32, opFCOMd_a32, opFCOMPd_a32, opFSUBd_a32, opFSUBRd_a32, opFDIVd_a32, opFDIVRd_a32, opFADDd_a32, opFMULd_a32, opFCOMd_a32, opFCOMPd_a32, opFSUBd_a32, opFSUBRd_a32, opFDIVd_a32, opFDIVRd_a32, @@ -1139,7 +1141,7 @@ OpFn OP_TABLE(fpu_dc_a32)[32] = opFADDr, opFMULr, opFCOM, opFCOMP, opFSUBRr, opFSUBr, opFDIVRr, opFDIVr }; -OpFn OP_TABLE(fpu_287_dd_a16)[256] = +const OpFn OP_TABLE(fpu_287_dd_a16)[256] = { opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, @@ -1177,7 +1179,7 @@ OpFn OP_TABLE(fpu_287_dd_a16)[256] = ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, }; -OpFn OP_TABLE(fpu_287_dd_a32)[256] = +const OpFn OP_TABLE(fpu_287_dd_a32)[256] = { opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, @@ -1216,7 +1218,7 @@ OpFn OP_TABLE(fpu_287_dd_a32)[256] = ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, }; -OpFn OP_TABLE(fpu_dd_a16)[256] = +const OpFn OP_TABLE(fpu_dd_a16)[256] = { opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, @@ -1254,7 +1256,7 @@ OpFn OP_TABLE(fpu_dd_a16)[256] = ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, }; -OpFn OP_TABLE(fpu_dd_a32)[256] = +const OpFn OP_TABLE(fpu_dd_a32)[256] = { opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, @@ -1293,7 +1295,7 @@ OpFn OP_TABLE(fpu_dd_a32)[256] = ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, }; -OpFn OP_TABLE(fpu_287_de_a16)[256] = +const OpFn OP_TABLE(fpu_287_de_a16)[256] = { opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, @@ -1332,7 +1334,7 @@ OpFn OP_TABLE(fpu_287_de_a16)[256] = opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, }; -OpFn OP_TABLE(fpu_287_de_a32)[256] = +const OpFn OP_TABLE(fpu_287_de_a32)[256] = { opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, @@ -1371,7 +1373,7 @@ OpFn OP_TABLE(fpu_287_de_a32)[256] = opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, }; -OpFn OP_TABLE(fpu_de_a16)[256] = +const OpFn OP_TABLE(fpu_de_a16)[256] = { opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, opFMULiw_a16, @@ -1410,7 +1412,7 @@ OpFn OP_TABLE(fpu_de_a16)[256] = opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, }; -OpFn OP_TABLE(fpu_de_a32)[256] = +const OpFn OP_TABLE(fpu_de_a32)[256] = { opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFADDiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, opFMULiw_a32, @@ -1449,7 +1451,7 @@ OpFn OP_TABLE(fpu_de_a32)[256] = opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, opFDIVP, }; -OpFn OP_TABLE(fpu_287_df_a16)[256] = +const OpFn OP_TABLE(fpu_287_df_a16)[256] = { opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, @@ -1487,7 +1489,7 @@ OpFn OP_TABLE(fpu_287_df_a16)[256] = ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, }; -OpFn OP_TABLE(fpu_287_df_a32)[256] = +const OpFn OP_TABLE(fpu_287_df_a32)[256] = { opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, @@ -1526,7 +1528,7 @@ OpFn OP_TABLE(fpu_287_df_a32)[256] = ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, }; -OpFn OP_TABLE(fpu_df_a16)[256] = +const OpFn OP_TABLE(fpu_df_a16)[256] = { opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, @@ -1564,7 +1566,7 @@ OpFn OP_TABLE(fpu_df_a16)[256] = ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, }; -OpFn OP_TABLE(fpu_df_a32)[256] = +const OpFn OP_TABLE(fpu_df_a32)[256] = { opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, @@ -1603,7 +1605,7 @@ OpFn OP_TABLE(fpu_df_a32)[256] = ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, }; -OpFn OP_TABLE(fpu_686_df_a16)[256] = +const OpFn OP_TABLE(fpu_686_df_a16)[256] = { opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, @@ -1641,7 +1643,7 @@ OpFn OP_TABLE(fpu_686_df_a16)[256] = opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, }; -OpFn OP_TABLE(fpu_686_df_a32)[256] = +const OpFn OP_TABLE(fpu_686_df_a32)[256] = { opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, @@ -1680,7 +1682,7 @@ OpFn OP_TABLE(fpu_686_df_a32)[256] = ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, }; -OpFn OP_TABLE(nofpu_a16)[256] = +const OpFn OP_TABLE(nofpu_a16)[256] = { op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, @@ -1718,7 +1720,7 @@ OpFn OP_TABLE(nofpu_a16)[256] = op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, }; -OpFn OP_TABLE(nofpu_a32)[256] = +const OpFn OP_TABLE(nofpu_a32)[256] = { op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, op_nofpu_a32, diff --git a/src/crcspeed/crc64speed.c b/src/crcspeed/crc64speed.c deleted file mode 100644 index b1a7bbb..0000000 --- a/src/crcspeed/crc64speed.c +++ /dev/null @@ -1,275 +0,0 @@ -/* Copyright (c) 2014, Matt Stancliff - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Redis nor the names of its contributors may be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. */ - -#include "crc64speed.h" - -/* If CRC64SPEED_DUAL is defined, we allow calls to - * both _little and _big CRC. - * By default, we only allow one endianness to be used - * and the first call to either _init function will set the - * lookup table endianness for the life of this module. - * We don't enable dual lookups by default because - * each 8x256 lookup table is 16k. */ -#ifndef CRC64SPEED_DUAL -static uint64_t crc64_table[8][256] = {{0}}; -static void *crc64_table_little = NULL, *crc64_table_big = NULL; -static const bool dual = false; -#else -static uint64_t crc64_table_little[8][256] = {{0}}; -static uint64_t crc64_table_big[8][256] = {{0}}; -static void *crc64_table = NULL; -static const bool dual = true; -#endif - -/* value of crc64_table[0][1], architecture dependent. */ -#define LITTLE1 UINT64_C(0x7ad870c830358979) -#define BIG1 UINT64_C(0x79893530c870d87a) - -/* Define CRC64SPEED_SAFE if you want runtime checks to stop - * CRCs from being calculated by uninitialized tables (and also stop tables - * from being initialized more than once). */ -#ifdef CRC64SPEED_SAFE -#define should_init(table, val) \ - do { \ - if ((table)[0][1] == (val)) \ - return false; \ - } while (0) -#define check_init(table, val) \ - do { \ - if ((table)[0][1] != (val)) \ - return false; \ - } while (0) -#else -#define should_init(a, b) -#define check_init(a, b) -#endif - -#define POLY UINT64_C(0xad93d23594c935a9) -/******************** BEGIN GENERATED PYCRC FUNCTIONS ********************/ -/** - * Generated on Sun Dec 21 14:14:07 2014, - * by pycrc v0.8.2, https://www.tty1.net/pycrc/ - * - * LICENSE ON GENERATED CODE: - * ========================== - * As of version 0.6, pycrc is released under the terms of the MIT licence. - * The code generated by pycrc is not considered a substantial portion of the - * software, therefore the author of pycrc will not claim any copyright on - * the generated code. - * ========================== - * - * CRC configuration: - * Width = 64 - * Poly = 0xad93d23594c935a9 - * XorIn = 0xffffffffffffffff - * ReflectIn = True - * XorOut = 0x0000000000000000 - * ReflectOut = True - * Algorithm = bit-by-bit-fast - * - * Modifications after generation (by matt): - * - included finalize step in-line with update for single-call generation - * - re-worked some inner variable architectures - * - adjusted function parameters to match expected prototypes. - *****************************************************************************/ - -/** - * Reflect all bits of a \a data word of \a data_len bytes. - * - * \param data The data word to be reflected. - * \param data_len The width of \a data expressed in number of bits. - * \return The reflected data. - *****************************************************************************/ -static inline uint_fast64_t crc_reflect(uint_fast64_t data, size_t data_len) { - uint_fast64_t ret = data & 0x01; - - for (size_t i = 1; i < data_len; i++) { - data >>= 1; - ret = (ret << 1) | (data & 0x01); - } - - return ret; -} - -/** - * Update the crc value with new data. - * - * \param crc The current crc value. - * \param data Pointer to a buffer of \a data_len bytes. - * \param data_len Number of bytes in the \a data buffer. - * \return The updated crc value. - ******************************************************************************/ -uint64_t crc64(uint_fast64_t crc, const void *in_data, const uint64_t len) { - const uint8_t *data = in_data; - bool bit; - - for (uint64_t offset = 0; offset < len; offset++) { - uint8_t c = data[offset]; - for (uint_fast8_t i = 0x01; i & 0xff; i <<= 1) { - bit = crc & 0x8000000000000000; - if (c & i) { - bit = !bit; - } - - crc <<= 1; - if (bit) { - crc ^= POLY; - } - } - - crc &= 0xffffffffffffffff; - } - - crc = crc & 0xffffffffffffffff; - return crc_reflect(crc, 64) ^ 0x0000000000000000; -} - -/******************** END GENERATED PYCRC FUNCTIONS ********************/ - -/* Only for testing; doesn't support DUAL */ -uint64_t crc64_lookup(uint64_t crc, const void *in_data, const uint64_t len) { - const uint8_t *data = in_data; - for (size_t i = 0; i < len; i++) { - crc = crc64_table[0][(uint8_t)crc ^ data[i]] ^ (crc >> 8); - } - - return crc; -} - -/* Returns false if CRC64SPEED_SAFE and table already initialized. */ -bool crc64speed_init(void) { -#ifndef CRC64SPEED_DUAL - should_init(crc64_table, LITTLE1); -#else - should_init(crc64_table_little, LITTLE1); -#endif - crcspeed64little_init(crc64, dual ? crc64_table_little : crc64_table); - return true; -} - -/* Returns false if CRC64SPEED_SAFE and table already initialized. */ -bool crc64speed_init_big(void) { -#ifndef CRC64SPEED_DUAL - should_init(crc64_table, BIG1); -#else - should_init(crc64_table_big, BIG1); -#endif - crcspeed64big_init(crc64, dual ? crc64_table_big : crc64_table); - return true; -} - -uint64_t crc64speed(uint64_t crc, const void *s, const uint64_t l) { -/* Quickly check if CRC table is initialized to little endian correctly. */ -#ifndef CRC64SPEED_DUAL - check_init(crc64_table, LITTLE1); -#else - check_init(crc64_table_little, LITTLE1); -#endif - return crcspeed64little(dual ? crc64_table_little : crc64_table, crc, - (void *)s, l); -} - -uint64_t crc64speed_big(uint64_t crc, const void *s, const uint64_t l) { -/* Quickly check if CRC table is initialized to big endian correctly. */ -#ifndef CRC64SPEED_DUAL - check_init(crc64_table, BIG1); -#else - check_init(crc64_table_big, BIG1); -#endif - return crcspeed64big(dual ? crc64_table_big : crc64_table, crc, (void *)s, - l); -} - -bool crc64speed_init_native(void) { - const uint64_t n = 1; - return *(char *)&n ? crc64speed_init() : crc64speed_init_big(); -} - -/* Iterate over table to fully load it into a cache near the CPU. */ -void crc64speed_cache_table(void) { - uint64_t m; - for (int i = 0; i < 8; ++i) { - for (int j = 0; j < 256; ++j) { -#ifndef CRC64SPEED_DUAL - m = crc64_table[i][j]; -#else - m = crc64_table_little[i][j]; - m += crc64_table_big[i][j]; -#endif - ++m; - } - } -} - -/* If you are on a platform where endianness can change at runtime, this - * will break unless you compile with CRC64SPEED_DUAL and manually run - * _init() and _init_big() instead of using _init_native() */ -uint64_t crc64speed_native(uint64_t crc, const void *s, const uint64_t l) { - const uint64_t n = 1; - return *(char *)&n ? crc64speed(crc, s, l) : crc64speed_big(crc, s, l); -} - -/* Test main */ -#if defined(REDIS_TEST) || defined(REDIS_TEST_MAIN) -#include - -#define UNUSED(x) (void)(x) -int crc64Test(int argc, char *argv[]) { - UNUSED(argc); - UNUSED(argv); - crc64speed_init(); - printf("[calcula]: e9c6d914c4b8d9ca == %016" PRIx64 "\n", - (uint64_t)crc64(0, "123456789", 9)); - printf("[lookupt]: e9c6d914c4b8d9ca == %016" PRIx64 "\n", - (uint64_t)crc64_lookup(0, "123456789", 9)); - printf("[64speed]: e9c6d914c4b8d9ca == %016" PRIx64 "\n", - (uint64_t)crc64speed(0, "123456789", 9)); - char li[] = "Lorem ipsum dolor sit amet, consectetur adipiscing elit, sed " - "do eiusmod tempor incididunt ut labore et dolore magna " - "aliqua. Ut enim ad minim veniam, quis nostrud exercitation " - "ullamco laboris nisi ut aliquip ex ea commodo consequat. Duis " - "aute irure dolor in reprehenderit in voluptate velit esse " - "cillum dolore eu fugiat nulla pariatur. Excepteur sint " - "occaecat cupidatat non proident, sunt in culpa qui officia " - "deserunt mollit anim id est laborum."; - printf("[calcula]: c7794709e69683b3 == %016" PRIx64 "\n", - (uint64_t)crc64(0, li, sizeof(li))); - printf("[lookupt]: c7794709e69683b3 == %016" PRIx64 "\n", - (uint64_t)crc64_lookup(0, li, sizeof(li))); - printf("[64speed]: c7794709e69683b3 == %016" PRIx64 "\n", - (uint64_t)crc64speed(0, li, sizeof(li))); - return 0; -} - -#endif - -#ifdef REDIS_TEST_MAIN -int main(int argc, char *argv[]) { - return crc64Test(argc, argv); -} - -#endif diff --git a/src/crcspeed/crc64speed.h b/src/crcspeed/crc64speed.h deleted file mode 100644 index c72cd8f..0000000 --- a/src/crcspeed/crc64speed.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef CRC64SPEED_H -#define CRC64SPEED_H -#include "crcspeed.h" -#include "stdbool.h" - -/* Does not require init */ -uint64_t crc64(uint64_t crc, const void *data, const uint64_t len); -void crc64speed_cache_table(void); - -/* All other crc functions here require _init() before usage. */ -bool crc64speed_init(void); -uint64_t crc64_lookup(uint64_t crc, const void *in_data, const uint64_t len); -uint64_t crc64speed(uint64_t crc, const void *s, const uint64_t l); - -bool crc64speed_init_big(void); -uint64_t crc64speed_big(uint64_t crc, const void *s, const uint64_t l); - -bool crc64speed_init_native(void); -uint64_t crc64speed_native(uint64_t crc, const void *s, const uint64_t l); -#endif diff --git a/src/crcspeed/crcspeed.c b/src/crcspeed/crcspeed.c deleted file mode 100644 index ecb58f4..0000000 --- a/src/crcspeed/crcspeed.c +++ /dev/null @@ -1,281 +0,0 @@ -/* - * Copyright (C) 2013 Mark Adler - * Originally by: crc64.c Version 1.4 16 Dec 2013 Mark Adler - * Modifications by Matt Stancliff : - * - removed CRC64-specific behavior - * - added generation of lookup tables by parameters - * - removed inversion of CRC input/result - * - removed automatic initialization in favor of explicit initialization - - This software is provided 'as-is', without any express or implied - warranty. In no event will the author be held liable for any damages - arising from the use of this software. - - Permission is granted to anyone to use this software for any purpose, - including commercial applications, and to alter it and redistribute it - freely, subject to the following restrictions: - - 1. The origin of this software must not be misrepresented; you must not - claim that you wrote the original software. If you use this software - in a product, an acknowledgment in the product documentation would be - appreciated but is not required. - 2. Altered source versions must be plainly marked as such, and must not be - misrepresented as being the original software. - 3. This notice may not be removed or altered from any source distribution. - - Mark Adler - madler@alumni.caltech.edu - */ - -#include "crcspeed.h" - -/* Fill in a CRC constants table. */ -void crcspeed64little_init(crcfn64 crcfn, uint64_t table[8][256]) { - uint64_t crc; - - /* generate CRCs for all single byte sequences */ - for (int n = 0; n < 256; n++) { - table[0][n] = crcfn(0, &n, 1); - } - - /* generate nested CRC table for future slice-by-8 lookup */ - for (int n = 0; n < 256; n++) { - crc = table[0][n]; - for (int k = 1; k < 8; k++) { - crc = table[0][crc & 0xff] ^ (crc >> 8); - table[k][n] = crc; - } - } -} - -void crcspeed16little_init(crcfn16 crcfn, uint16_t table[8][256]) { - uint16_t crc; - - /* generate CRCs for all single byte sequences */ - for (int n = 0; n < 256; n++) { - table[0][n] = crcfn(0, &n, 1); - } - - /* generate nested CRC table for future slice-by-8 lookup */ - for (int n = 0; n < 256; n++) { - crc = table[0][n]; - for (int k = 1; k < 8; k++) { - crc = table[0][(crc >> 8) & 0xff] ^ (crc << 8); - table[k][n] = crc; - } - } -} - -/* Reverse the bytes in a 64-bit word. */ -static inline uint64_t rev8(uint64_t a) { -#if defined(__GNUC__) || defined(__clang__) - return __builtin_bswap64(a); -#else - uint64_t m; - - m = UINT64_C(0xff00ff00ff00ff); - a = ((a >> 8) & m) | (a & m) << 8; - m = UINT64_C(0xffff0000ffff); - a = ((a >> 16) & m) | (a & m) << 16; - return a >> 32 | a << 32; -#endif -} - -/* This function is called once to initialize the CRC table for use on a - big-endian architecture. */ -void crcspeed64big_init(crcfn64 fn, uint64_t big_table[8][256]) { - /* Create the little endian table then reverse all the entires. */ - crcspeed64little_init(fn, big_table); - for (int k = 0; k < 8; k++) { - for (int n = 0; n < 256; n++) { - big_table[k][n] = rev8(big_table[k][n]); - } - } -} - -void crcspeed16big_init(crcfn16 fn, uint16_t big_table[8][256]) { - /* Create the little endian table then reverse all the entires. */ - crcspeed16little_init(fn, big_table); - for (int k = 0; k < 8; k++) { - for (int n = 0; n < 256; n++) { - big_table[k][n] = (uint16_t)rev8(big_table[k][n]); - } - } -} - -/* Calculate a non-inverted CRC multiple bytes at a time on a little-endian - * architecture. If you need inverted CRC, invert *before* calling and invert - * *after* calling. - * 64 bit crc = process 8 bytes at once; - */ -uint64_t crcspeed64little(uint64_t little_table[8][256], uint64_t crc, - void *buf, size_t len) { - unsigned char *next = buf; - - /* process individual bytes until we reach an 8-byte aligned pointer */ - while (len && ((uintptr_t)next & 7) != 0) { - crc = little_table[0][(crc ^ *next++) & 0xff] ^ (crc >> 8); - len--; - } - - /* fast middle processing, 8 bytes (aligned!) per loop */ - while (len >= 8) { - crc ^= *(uint64_t *)next; - crc = little_table[7][crc & 0xff] ^ - little_table[6][(crc >> 8) & 0xff] ^ - little_table[5][(crc >> 16) & 0xff] ^ - little_table[4][(crc >> 24) & 0xff] ^ - little_table[3][(crc >> 32) & 0xff] ^ - little_table[2][(crc >> 40) & 0xff] ^ - little_table[1][(crc >> 48) & 0xff] ^ - little_table[0][crc >> 56]; - next += 8; - len -= 8; - } - - /* process remaining bytes (can't be larger than 8) */ - while (len) { - crc = little_table[0][(crc ^ *next++) & 0xff] ^ (crc >> 8); - len--; - } - - return crc; -} - -uint16_t crcspeed16little(uint16_t little_table[8][256], uint16_t crc, - void *buf, size_t len) { - unsigned char *next = buf; - - /* process individual bytes until we reach an 8-byte aligned pointer */ - while (len && ((uintptr_t)next & 7) != 0) { - crc = little_table[0][((crc >> 8) ^ *next++) & 0xff] ^ (crc << 8); - len--; - } - - /* fast middle processing, 8 bytes (aligned!) per loop */ - while (len >= 8) { - uint64_t n = *(uint64_t *)next; - crc = little_table[7][(n & 0xff) ^ ((crc >> 8) & 0xff)] ^ - little_table[6][((n >> 8) & 0xff) ^ (crc & 0xff)] ^ - little_table[5][(n >> 16) & 0xff] ^ - little_table[4][(n >> 24) & 0xff] ^ - little_table[3][(n >> 32) & 0xff] ^ - little_table[2][(n >> 40) & 0xff] ^ - little_table[1][(n >> 48) & 0xff] ^ - little_table[0][n >> 56]; - next += 8; - len -= 8; - } - - /* process remaining bytes (can't be larger than 8) */ - while (len) { - crc = little_table[0][((crc >> 8) ^ *next++) & 0xff] ^ (crc << 8); - len--; - } - - return crc; -} - -/* Calculate a non-inverted CRC eight bytes at a time on a big-endian - * architecture. - */ -uint64_t crcspeed64big(uint64_t big_table[8][256], uint64_t crc, void *buf, - size_t len) { - unsigned char *next = buf; - - crc = rev8(crc); - while (len && ((uintptr_t)next & 7) != 0) { - crc = big_table[0][(crc >> 56) ^ *next++] ^ (crc << 8); - len--; - } - - while (len >= 8) { - crc ^= *(uint64_t *)next; - crc = big_table[0][crc & 0xff] ^ - big_table[1][(crc >> 8) & 0xff] ^ - big_table[2][(crc >> 16) & 0xff] ^ - big_table[3][(crc >> 24) & 0xff] ^ - big_table[4][(crc >> 32) & 0xff] ^ - big_table[5][(crc >> 40) & 0xff] ^ - big_table[6][(crc >> 48) & 0xff] ^ - big_table[7][crc >> 56]; - next += 8; - len -= 8; - } - - while (len) { - crc = big_table[0][(crc >> 56) ^ *next++] ^ (crc << 8); - len--; - } - - return rev8(crc); -} - -/* WARNING: Completely untested on big endian architecture. Possibly broken. */ -uint16_t crcspeed16big(uint16_t big_table[8][256], uint16_t crc_in, void *buf, - size_t len) { - unsigned char *next = buf; - uint64_t crc = crc_in; - - crc = rev8(crc); - while (len && ((uintptr_t)next & 7) != 0) { - crc = big_table[0][((crc >> (56 - 8)) ^ *next++) & 0xff] ^ (crc >> 8); - len--; - } - - while (len >= 8) { - uint64_t n = *(uint64_t *)next; - crc = big_table[0][(n & 0xff) ^ ((crc >> (56 - 8)) & 0xff)] ^ - big_table[1][((n >> 8) & 0xff) ^ (crc & 0xff)] ^ - big_table[2][(n >> 16) & 0xff] ^ - big_table[3][(n >> 24) & 0xff] ^ - big_table[4][(n >> 32) & 0xff] ^ - big_table[5][(n >> 40) & 0xff] ^ - big_table[6][(n >> 48) & 0xff] ^ - big_table[7][n >> 56]; - next += 8; - len -= 8; - } - - while (len) { - crc = big_table[0][((crc >> (56 - 8)) ^ *next++) & 0xff] ^ (crc >> 8); - len--; - } - - return (uint16_t)rev8(crc); -} - -/* Return the CRC of buf[0..len-1] with initial crc, processing eight bytes - at a time using passed-in lookup table. - This selects one of two routines depending on the endianess of - the architecture. */ -uint64_t crcspeed64native(uint64_t table[8][256], uint64_t crc, void *buf, - size_t len) { - uint64_t n = 1; - - return *(char *)&n ? crcspeed64little(table, crc, buf, len) - : crcspeed64big(table, crc, buf, len); -} - -uint16_t crcspeed16native(uint16_t table[8][256], uint16_t crc, void *buf, - size_t len) { - uint64_t n = 1; - - return *(char *)&n ? crcspeed16little(table, crc, buf, len) - : crcspeed16big(table, crc, buf, len); -} - -/* Initialize CRC lookup table in architecture-dependent manner. */ -void crcspeed64native_init(crcfn64 fn, uint64_t table[8][256]) { - uint64_t n = 1; - - *(char *)&n ? crcspeed64little_init(fn, table) - : crcspeed64big_init(fn, table); -} - -void crcspeed16native_init(crcfn16 fn, uint16_t table[8][256]) { - uint64_t n = 1; - - *(char *)&n ? crcspeed16little_init(fn, table) - : crcspeed16big_init(fn, table); -} diff --git a/src/crcspeed/crcspeed.h b/src/crcspeed/crcspeed.h deleted file mode 100644 index d7ee95e..0000000 --- a/src/crcspeed/crcspeed.h +++ /dev/null @@ -1,60 +0,0 @@ -/* Copyright (c) 2014, Matt Stancliff - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Redis nor the names of its contributors may be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. */ - -#ifndef CRCSPEED_H -#define CRCSPEED_H - -#include -#include - -typedef uint64_t (*crcfn64)(uint64_t, const void *, const uint64_t); -typedef uint16_t (*crcfn16)(uint16_t, const void *, const uint64_t); - -/* CRC-64 */ -void crcspeed64little_init(crcfn64 fn, uint64_t table[8][256]); -void crcspeed64big_init(crcfn64 fn, uint64_t table[8][256]); -void crcspeed64native_init(crcfn64 fn, uint64_t table[8][256]); - -uint64_t crcspeed64little(uint64_t table[8][256], uint64_t crc, void *buf, - size_t len); -uint64_t crcspeed64big(uint64_t table[8][256], uint64_t crc, void *buf, - size_t len); -uint64_t crcspeed64native(uint64_t table[8][256], uint64_t crc, void *buf, - size_t len); - -/* CRC-16 */ -void crcspeed16little_init(crcfn16 fn, uint16_t table[8][256]); -void crcspeed16big_init(crcfn16 fn, uint16_t table[8][256]); -void crcspeed16native_init(crcfn16 fn, uint16_t table[8][256]); - -uint16_t crcspeed16little(uint16_t table[8][256], uint16_t crc, void *buf, - size_t len); -uint16_t crcspeed16big(uint16_t table[8][256], uint16_t crc, void *buf, - size_t len); -uint16_t crcspeed16native(uint16_t table[8][256], uint16_t crc, void *buf, - size_t len); -#endif diff --git a/src/emu.h b/src/emu.h index 6df1a0d..6a9bfa4 100644 --- a/src/emu.h +++ b/src/emu.h @@ -8,7 +8,7 @@ * * Main include file for the application. * - * Version: @(#)emu.h 1.0.20 2018/04/28 + * Version: @(#)emu.h 1.0.21 2018/05/05 * * Author: Fred N. van Kempen, * @@ -163,8 +163,8 @@ extern void pclog(const char *fmt, ...); extern void fatal(const char *fmt, ...); extern void pc_version(const char *platform); extern void pc_path(wchar_t *dest, int dest_sz, const wchar_t *src); -extern int pc_init(int argc, wchar_t *argv[]); -extern int pc_init_modules(void); +extern int pc_setup(int argc, wchar_t *argv[]); +extern int pc_init(void); extern void pc_close(void *threadid); extern void pc_reset_hard_close(void); extern void pc_reset_hard_init(void); diff --git a/src/pc.c b/src/pc.c index ad9c550..ab648e1 100644 --- a/src/pc.c +++ b/src/pc.c @@ -8,7 +8,7 @@ * * Main emulator module where most things are controlled. * - * Version: @(#)pc.c 1.0.34 2018/05/04 + * Version: @(#)pc.c 1.0.35 2018/05/05 * * Authors: Fred N. van Kempen, * Miran Grca, @@ -376,14 +376,14 @@ pc_path(wchar_t *dst, int sz, const wchar_t *src) /* - * Perform initial startup of the PC. + * Perform initial setup of the PC. * * This is the platform-indepenent part of the startup, * where we check commandline arguments and load a * configuration file. */ int -pc_init(int argc, wchar_t *argv[]) +pc_setup(int argc, wchar_t *argv[]) { wchar_t path[1024]; wchar_t *cfg = NULL, *p; @@ -704,9 +704,9 @@ pc_reload(const wchar_t *fn) } -/* Initialize modules, ran once, after pc_init. */ +/* Initialize the configured PC. Run once, after pc_setup() is done. */ int -pc_init_modules(void) +pc_init(void) { wchar_t temp[1024]; wchar_t name[128]; @@ -788,6 +788,60 @@ pc_init_modules(void) } +/* Close down a running machine. */ +void +pc_close(thread_t *ptr) +{ + int i; + + /* Wait a while so things can shut down. */ + plat_delay_ms(200); + + /* Claim the video blitter. */ + startblit(); + + /* Terminate the main thread. */ + if (ptr != NULL) { + thread_kill(ptr); + + /* Wait some more. */ + plat_delay_ms(200); + } + + nvr_save(); + + machine_close(); + + config_save(); + + plat_mouse_capture(0); + + for (i=0; iexit(i); + + floppy_close(); + + if (dump_on_exit) + dumppic(); + dumpregs(0); + + video_close(); + + device_close_all(); + + network_close(); + + sound_close(); + + ide_destroy_buffers(); + + cdrom_destroy_drives(); +} + + void pc_reset_hard_close(void) { @@ -919,59 +973,6 @@ pc_reset(int hard) } -void -pc_close(thread_t *ptr) -{ - int i; - - /* Wait a while so things can shut down. */ - plat_delay_ms(200); - - /* Claim the video blitter. */ - startblit(); - - /* Terminate the main thread. */ - if (ptr != NULL) { - thread_kill(ptr); - - /* Wait some more. */ - plat_delay_ms(200); - } - - nvr_save(); - - machine_close(); - - config_save(); - - plat_mouse_capture(0); - - for (i=0; iexit(i); - - floppy_close(); - - if (dump_on_exit) - dumppic(); - dumpregs(0); - - video_close(); - - device_close_all(); - - network_close(); - - sound_close(); - - ide_destroy_buffers(); - - cdrom_destroy_drives(); -} - - /* * The main thread runs the actual emulator code. * diff --git a/src/win/mingw/Makefile.MinGW b/src/win/mingw/Makefile.MinGW index 125ec52..1f5d72e 100644 --- a/src/win/mingw/Makefile.MinGW +++ b/src/win/mingw/Makefile.MinGW @@ -475,7 +475,7 @@ endif # Final versions of the toolchain flags. CFLAGS := $(WX_FLAGS) $(OPTS) $(DFLAGS) $(COPTIM) $(AOPTIM) \ $(AFLAGS) -fomit-frame-pointer -mstackrealign \ - -Wall -Wundef #-Wunused-parameter -Wmissing-declarations + -Wall -Wundef #-Wshadow #-Wunused-parameter -Wmissing-declarations CXXFLAGS := $(WX_FLAGS) $(OPTS) $(DFLAGS) $(COPTIM) $(AOPTIM) \ $(AFLAGS) -fno-strict-aliasing -fvisibility=hidden \ diff --git a/src/win/win.c b/src/win/win.c index 7cfa116..e518f1f 100644 --- a/src/win/win.c +++ b/src/win/win.c @@ -8,7 +8,7 @@ * * Platform main support module for Windows. * - * Version: @(#)win.c 1.0.16 2018/05/03 + * Version: @(#)win.c 1.0.17 2018/05/05 * * Authors: Fred N. van Kempen, * Miran Grca, @@ -301,7 +301,7 @@ WinMain(HINSTANCE hInst, HINSTANCE hPrev, LPSTR lpszArg, int nCmdShow) argc = ProcessCommandLine(&argw); /* Pre-initialize the system, this loads the config file. */ - if (! pc_init(argc, argw)) { + if (! pc_setup(argc, argw)) { /* Detach from console. */ plat_console(0); return(1); diff --git a/src/win/win_ui.c b/src/win/win_ui.c index 8eccfce..a399fc1 100644 --- a/src/win/win_ui.c +++ b/src/win/win_ui.c @@ -8,7 +8,7 @@ * * Implement the user Interface module. * - * Version: @(#)win_ui.c 1.0.18 2018/05/03 + * Version: @(#)win_ui.c 1.0.19 2018/05/05 * * Authors: Fred N. van Kempen, * Miran Grca, @@ -535,7 +535,7 @@ ui_init(int nCmdShow) #endif if (settings_only) { - if (! pc_init_modules()) { + if (! pc_init()) { /* Dang, no ROMs found at all! */ ui_msgbox(MBX_ERROR, (wchar_t *)IDS_2056); return(6); @@ -635,7 +635,7 @@ ui_init(int nCmdShow) NULL); /* That looks good, now continue setting up the machine. */ - switch (pc_init_modules()) { + switch (pc_init()) { case -1: /* General failure during init, give up. */ return(6);