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Upstream fixes for AT keyboard (disables Mode1, needed for TSX-32.)

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Upstream fixes for ET4000* cards (also for TSX-32, and others) with scrolling issues.
Upstream fixes for mem.c (fixes remapping issues for ET4000 et al.)
This commit is contained in:
waltje
2018-08-25 17:29:25 -04:00
parent f6eae8c658
commit 28cc2ac6c2
5 changed files with 798 additions and 273 deletions
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71
src/devices/input/keyboard_at.c
View File

@@ -8,7 +8,10 @@
* *
* Intel 8042 (AT keyboard controller) emulation. * Intel 8042 (AT keyboard controller) emulation.
* *
* Version: @(#)keyboard_at.c 1.0.14 2018/06/27 * NOTE: Several changes to disable Mode1 for now, as this breaks
* the TSX32 operating system. More cleanups needed..
*
* Version: @(#)keyboard_at.c 1.0.15 2018/08/25
* *
* Authors: Fred N. van Kempen, <decwiz@yahoo.com> * Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -202,6 +205,7 @@ static const uint8_t nont_to_t[256] = {
0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff
}; };
#if 0
static const scancode scancode_set1[512] = { static const scancode scancode_set1[512] = {
{ { -1},{ -1} }, { { 0x01,-1},{ 0x81,-1} }, { { 0x02,-1},{ 0x82,-1} }, { { 0x03,-1},{ 0x83,-1} }, /*000*/ { { -1},{ -1} }, { { 0x01,-1},{ 0x81,-1} }, { { 0x02,-1},{ 0x82,-1} }, { { 0x03,-1},{ 0x83,-1} }, /*000*/
{ { 0x04,-1},{ 0x84,-1} }, { { 0x05,-1},{ 0x85,-1} }, { { 0x06,-1},{ 0x86,-1} }, { { 0x07,-1},{ 0x87,-1} }, /*004*/ { { 0x04,-1},{ 0x84,-1} }, { { 0x05,-1},{ 0x85,-1} }, { { 0x06,-1},{ 0x86,-1} }, { { 0x07,-1},{ 0x87,-1} }, /*004*/
@@ -331,6 +335,7 @@ static const scancode scancode_set1[512] = {
{ { -1},{ -1} }, { { -1},{ -1} }, { { -1},{ -1} }, { { -1},{ -1} }, /*1f8*/ { { -1},{ -1} }, { { -1},{ -1} }, { { -1},{ -1} }, { { -1},{ -1} }, /*1f8*/
{ { -1},{ -1} }, { { -1},{ -1} }, { {0xe0,0xfe,-1},{ -1} }, { {0xe0,0xff,-1},{ -1} } /*1fc*/ { { -1},{ -1} }, { { -1},{ -1} }, { {0xe0,0xfe,-1},{ -1} }, { {0xe0,0xff,-1},{ -1} } /*1fc*/
}; };
#endif
static const scancode scancode_set2[512] = { static const scancode scancode_set2[512] = {
{ { -1},{ -1} }, { { 0x76,-1},{ 0xF0,0x76,-1} }, { { 0x16,-1},{ 0xF0,0x16,-1} }, { { 0x1E,-1},{ 0xF0,0x1E,-1} }, /*000*/ { { -1},{ -1} }, { { 0x76,-1},{ 0xF0,0x76,-1} }, { { 0x16,-1},{ 0xF0,0x16,-1} }, { { 0x1E,-1},{ 0xF0,0x1E,-1} }, /*000*/
@@ -597,11 +602,14 @@ static void
kbd_setmap(atkbd_t *kbd) kbd_setmap(atkbd_t *kbd)
{ {
switch (keyboard_mode & 3) { switch (keyboard_mode & 3) {
#if 0
case 1: case 1:
default: default:
keyboard_set_table(scancode_set1); keyboard_set_table(scancode_set1);
break; break;
#else
default:
#endif
case 2: case 2:
keyboard_set_table(scancode_set2); keyboard_set_table(scancode_set2);
break; break;
@@ -612,7 +620,11 @@ kbd_setmap(atkbd_t *kbd)
} }
if (keyboard_mode & 0x20) if (keyboard_mode & 0x20)
#if 0
keyboard_set_table(scancode_set1); keyboard_set_table(scancode_set1);
#else
keyboard_set_table(scancode_set2);
#endif
} }
@@ -689,11 +701,19 @@ kbd_adddata(uint8_t val)
static void static void
kbd_adddata_vals(uint8_t *val, uint8_t len) kbd_adddata_vals(uint8_t *val, uint8_t len)
{ {
int translate = (keyboard_mode & 0x40) && !(keyboard_mode & 0x20); int xt_mode = (keyboard_mode & 0x20) && ((CurrentKbd->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_1);
int translate = (keyboard_mode & 0x40);
int i; int i;
uint8_t or = 0; uint8_t or = 0;
uint8_t send; uint8_t send;
#if 0
translate = translate || (keyboard_mode & 0x40) && !xt_mode;
#else
translate = translate || (keyboard_mode & 0x40) || xt_mode;
translate = translate || ((CurrentKbd->flags & KBC_TYPE_MASK) == KBC_TYPE_PS2_2);
#endif
for (i = 0; i < len; i++) { for (i = 0; i < len; i++) {
if (translate) { if (translate) {
if (val[i] == 0xf0) { if (val[i] == 0xf0) {
@@ -731,11 +751,18 @@ kbd_adddata_vals(uint8_t *val, uint8_t len)
static void static void
kbd_adddata_keyboard(uint16_t val) kbd_adddata_keyboard(uint16_t val)
{ {
int translate = (keyboard_mode & 0x40) && !(keyboard_mode & 0x20); int xt_mode = (keyboard_mode & 0x20) && ((CurrentKbd->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_1);
int translate = (keyboard_mode & 0x40);
uint8_t fake_shift[4]; uint8_t fake_shift[4];
uint8_t num_lock = 0, shift_states = 0; uint8_t num_lock = 0, shift_states = 0;
#if 0
translate = translate || (keyboard_mode & 0x40) && !xt_mode;
#else
translate = translate || (keyboard_mode & 0x40) || xt_mode;
translate = translate || ((CurrentKbd->flags & KBC_TYPE_MASK) == KBC_TYPE_PS2_2);
#endif
keyboard_get_states(NULL, &num_lock, NULL); keyboard_get_states(NULL, &num_lock, NULL);
shift_states = keyboard_get_shift() & STATE_SHIFT_MASK; shift_states = keyboard_get_shift() & STATE_SHIFT_MASK;
@@ -1020,6 +1047,8 @@ kbd_cmd_write(atkbd_t *kbd, uint8_t val)
kbd_log("ATkbd: mouse interrupt is now %s\n", (val & 0x02) ? "enabled" : "disabled"); kbd_log("ATkbd: mouse interrupt is now %s\n", (val & 0x02) ? "enabled" : "disabled");
#endif #endif
} }
kbd_log("Command byte now: %02X (%02X)\n", kbd->mem[0], val);
} }
@@ -1698,18 +1727,23 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
kbd->key_wantdata = 0; kbd->key_wantdata = 0;
switch (kbd->key_command) { switch (kbd->key_command) {
case 0xed: /*Set/reset LEDs*/ case 0xed: /*Set/reset LEDs*/
/* Command ED does command if command is recognized. */
if (val & 0xf8)
goto do_command;
kbd_adddata_keyboard(0xfa); kbd_adddata_keyboard(0xfa);
break; break;
case 0xf0: /*Get/set scancode set*/ case 0xf0: /*Get/set scancode set*/
kbd_adddata_keyboard(0xfa);
if (val == 0) { if (val == 0) {
kbd_log("ATkbd: get scan code set: %02X\n", keyboard_mode & 3);
kbd_adddata_keyboard(keyboard_mode & 3); kbd_adddata_keyboard(keyboard_mode & 3);
} else { } else {
if (val <= 3) { if ((val <= 3) && (val != 1)) {
keyboard_mode &= 0xFC; keyboard_mode &= 0xfc;
keyboard_mode |= (val & 3); keyboard_mode |= (val & 3);
kbd_log("ATkbd: scan code set now: %02X\n", val);
} }
kbd_adddata_keyboard(0xfa);
kbd_setmap(kbd); kbd_setmap(kbd);
} }
break; break;
@@ -1728,6 +1762,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
/* Keyboard command is now done. */ /* Keyboard command is now done. */
kbd->key_command = 0x00; kbd->key_command = 0x00;
} else { } else {
do_command:
/* No keyboard command in progress. */ /* No keyboard command in progress. */
kbd->key_command = 0x00; kbd->key_command = 0x00;
@@ -1793,8 +1828,10 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
kbd_log("ATkbd: read keyboard id\n"); kbd_log("ATkbd: read keyboard id\n");
#endif #endif
kbd_adddata_keyboard(0xfa); kbd_adddata_keyboard(0xfa);
#if 0
kbd_adddata_keyboard(0xab); kbd_adddata_keyboard(0xab);
kbd_adddata_keyboard(0x83); kbd_adddata_keyboard(0x83);
#endif
break; break;
case 0xf3: /*Set typematic rate/delay*/ case 0xf3: /*Set typematic rate/delay*/
@@ -1820,7 +1857,13 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
#endif #endif
kbd_adddata_keyboard(0xfa); kbd_adddata_keyboard(0xfa);
keyboard_scan = 0; keyboard_scan = 0;
break;
/*
* Disabling the keyboard also
* resets it to the default
* values.
*/
/*FALLTHROUGH*/
case 0xf6: /*Set defaults*/ case 0xf6: /*Set defaults*/
#ifdef ENABLE_KEYBOARD_LOG #ifdef ENABLE_KEYBOARD_LOG
@@ -1883,9 +1926,8 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
kbd_adddata_keyboard(0xfa); kbd_adddata_keyboard(0xfa);
kbd_adddata_keyboard(0xaa); kbd_adddata_keyboard(0xaa);
/* Set system flag to 1 and scan code set to 2. */ /* Set scan code set to 2. */
keyboard_mode &= 0xFC; keyboard_mode = (keyboard_mode & 0xfc) | 0x02;
keyboard_mode |= 2;
kbd_setmap(kbd); kbd_setmap(kbd);
break; break;
@@ -2193,13 +2235,16 @@ kbd_init(const device_t *info)
timer_add(kbd_poll, &keyboard_delay, TIMER_ALWAYS_ENABLED, kbd); timer_add(kbd_poll, &keyboard_delay, TIMER_ALWAYS_ENABLED, kbd);
if ((kbd->flags & KBC_TYPE_MASK) != KBC_TYPE_ISA) { if ((kbd->flags & KBC_TYPE_MASK) != KBC_TYPE_ISA) {
#if 0
if ((kbd->flags & KBC_TYPE_MASK) == KBC_TYPE_PS2_2) { if ((kbd->flags & KBC_TYPE_MASK) == KBC_TYPE_PS2_2) {
/* /*
* These machines force translation off, so the * These machines force translation off, so the
* the keyboard must start in scan code set 0. * the keyboard must start in scan code set 1.
*/ */
keyboard_mode &= ~0x03; keyboard_mode &= ~0x03;
keyboard_mode |= 0x01;
} }
#endif
timer_add(kbd_refresh, timer_add(kbd_refresh,
&kbd->refresh_time, TIMER_ALWAYS_ENABLED, kbd); &kbd->refresh_time, TIMER_ALWAYS_ENABLED, kbd);

508
src/devices/video/vid_et4000.c
View File

@@ -8,7 +8,7 @@
* *
* Emulation of the Tseng Labs ET4000. * Emulation of the Tseng Labs ET4000.
* *
* Version: @(#)vid_et4000.c 1.0.7 2018/05/06 * Version: @(#)vid_et4000.c 1.0.8 2018/08/25
* *
* Authors: Fred N. van Kempen, <decwiz@yahoo.com> * Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -46,26 +46,39 @@
#include "../../mem.h" #include "../../mem.h"
#include "../../rom.h" #include "../../rom.h"
#include "../../device.h" #include "../../device.h"
#include "../system/mca.h"
#include "video.h" #include "video.h"
#include "vid_svga.h" #include "vid_svga.h"
#include "vid_sc1502x_ramdac.h" #include "vid_sc1502x_ramdac.h"
#define BIOS_ROM_PATH L"video/tseng/et4000/et4000.bin" #define BIOS_ROM_PATH L"video/tseng/et4000/et4000.bin"
#define KOREAN_BIOS_ROM_PATH L"roms/video/et4000/tgkorvga.bin"
#define KOREAN_FONT_ROM_PATH L"roms/video/et4000/tg_ksc5601.rom"
typedef struct et4000_t typedef struct et4000_t {
{
svga_t svga; svga_t svga;
sc1502x_ramdac_t ramdac; sc1502x_ramdac_t ramdac;
rom_t bios_rom; rom_t bios_rom;
uint8_t banking; uint8_t banking;
uint8_t pos_regs[8];
int is_mca;
uint8_t port_22cb_val;
uint8_t port_32cb_val;
int get_korean_font_enabled;
int get_korean_font_index;
uint16_t get_korean_font_base;
uint32_t vram_mask;
} et4000_t; } et4000_t;
static uint8_t crtc_mask[0x40] = { static const uint8_t crtc_mask[0x40] = {
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
@@ -77,61 +90,27 @@ static uint8_t crtc_mask[0x40] = {
}; };
void et4000_out(uint16_t addr, uint8_t val, void *p) static uint8_t
et4000_in(uint16_t addr, void *p)
{ {
et4000_t *et4000 = (et4000_t *)p; et4000_t *et4000 = (et4000_t *)p;
svga_t *svga = &et4000->svga; svga_t *svga = &et4000->svga;
uint8_t old;
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1)) if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1))
addr ^= 0x60; addr ^= 0x60;
switch (addr) switch (addr)
{ {
case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9: case 0x3c2:
sc1502x_ramdac_out(addr, val, &et4000->ramdac, svga); if (et4000->is_mca)
return;
case 0x3CD: /*Banking*/
svga->write_bank = (val & 0xf) * 0x10000;
svga->read_bank = ((val >> 4) & 0xf) * 0x10000;
et4000->banking = val;
return;
case 0x3D4:
svga->crtcreg = val & 0x3f;
return;
case 0x3D5:
if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80))
return;
if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80))
val = (svga->crtc[7] & ~0x10) | (val & 0x10);
old = svga->crtc[svga->crtcreg];
val &= crtc_mask[svga->crtcreg];
svga->crtc[svga->crtcreg] = val;
if (old != val)
{ {
if (svga->crtcreg < 0xE || svga->crtcreg > 0x10) if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x4e)
{ return 0;
svga->fullchange = changeframecount; else
svga_recalctimings(svga); return 0x10;
}
} }
break; break;
}
svga_out(addr, val, svga);
}
uint8_t et4000_in(uint16_t addr, void *p)
{
et4000_t *et4000 = (et4000_t *)p;
svga_t *svga = &et4000->svga;
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1))
addr ^= 0x60;
switch (addr)
{
case 0x3C5: case 0x3C5:
if ((svga->seqaddr & 0xf) == 7) return svga->seqregs[svga->seqaddr & 0xf] | 4; if ((svga->seqaddr & 0xf) == 7) return svga->seqregs[svga->seqaddr & 0xf] | 4;
break; break;
@@ -149,7 +128,227 @@ uint8_t et4000_in(uint16_t addr, void *p)
return svga_in(addr, svga); return svga_in(addr, svga);
} }
void et4000_recalctimings(svga_t *svga)
static void
et4000_out(uint16_t addr, uint8_t val, void *p)
{
et4000_t *et4000 = (et4000_t *)p;
svga_t *svga = &et4000->svga;
uint8_t old;
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1))
addr ^= 0x60;
switch (addr)
{
case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9:
sc1502x_ramdac_out(addr, val, &et4000->ramdac, svga);
return;
case 0x3CD: /*Banking*/
if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) {
svga->write_bank = (val & 0xf) * 0x10000;
svga->read_bank = ((val >> 4) & 0xf) * 0x10000;
}
et4000->banking = val;
return;
case 0x3D4:
svga->crtcreg = val & 0x3f;
return;
case 0x3D5:
if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80))
return;
if ((svga->crtcreg == 0x35) && (svga->crtc[0x11] & 0x80))
return;
if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80))
val = (svga->crtc[7] & ~0x10) | (val & 0x10);
old = svga->crtc[svga->crtcreg];
val &= crtc_mask[svga->crtcreg];
svga->crtc[svga->crtcreg] = val;
if (old != val)
{
if (svga->crtcreg < 0xE || svga->crtcreg > 0x10)
{
svga->fullchange = changeframecount;
svga_recalctimings(svga);
}
}
/*Note - Silly hack to determine video memory size automatically by ET4000 BIOS.*/
if ((svga->crtcreg == 0x37) && !et4000->is_mca)
{
switch(val & 0x0B)
{
case 0x00:
case 0x01:
if(svga->vram_max == 64 * 1024)
mem_mapping_enable(&svga->mapping);
else
mem_mapping_disable(&svga->mapping);
break;
case 0x02:
if(svga->vram_max == 128 * 1024)
mem_mapping_enable(&svga->mapping);
else
mem_mapping_disable(&svga->mapping);
break;
case 0x03:
case 0x08:
case 0x09:
if (svga->vram_max == 256 * 1024)
mem_mapping_enable(&svga->mapping);
else
mem_mapping_disable(&svga->mapping);
break;
case 0x0A:
if (svga->vram_max == 512 * 1024)
mem_mapping_enable(&svga->mapping);
else
mem_mapping_disable(&svga->mapping);
break;
case 0x0B:
if (svga->vram_max == 1024 * 1024)
mem_mapping_enable(&svga->mapping);
else
mem_mapping_disable(&svga->mapping);
break;
default:
mem_mapping_enable(&svga->mapping);
break;
}
}
break;
}
svga_out(addr, val, svga);
}
static void
et4000k_out(uint16_t addr, uint8_t val, void *p)
{
et4000_t *et4000 = (et4000_t *)p;
// pclog("ET4000k out %04X %02X\n", addr, val);
switch (addr)
{
case 0x22CB:
et4000->port_22cb_val = (et4000->port_22cb_val & 0xF0) | (val & 0x0F);
et4000->get_korean_font_enabled = val & 7;
if (et4000->get_korean_font_enabled == 3)
et4000->get_korean_font_index = 0;
break;
case 0x22CF:
switch(et4000->get_korean_font_enabled)
{
case 1:
et4000->get_korean_font_base = ((val & 0x7F) << 7) | (et4000->get_korean_font_base & 0x7F);
break;
case 2:
et4000->get_korean_font_base = (et4000->get_korean_font_base & 0x3F80) | (val & 0x7F) | (((val ^ 0x80) & 0x80) << 8);
break;
case 3:
if((et4000->port_32cb_val & 0x30) == 0x20 && (et4000->get_korean_font_base & 0x7F) > 0x20 && (et4000->get_korean_font_base & 0x7F) < 0x7F)
{
switch(et4000->get_korean_font_base & 0x3F80)
{
case 0x2480:
if(et4000->get_korean_font_index < 16)
fontdatksc5601_user[(et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index] = val;
else if(et4000->get_korean_font_index >= 24 && et4000->get_korean_font_index < 40)
fontdatksc5601_user[(et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index - 8] = val;
break;
case 0x3F00:
if(et4000->get_korean_font_index < 16)
fontdatksc5601_user[96 + (et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index] = val;
else if(et4000->get_korean_font_index >= 24 && et4000->get_korean_font_index < 40)
fontdatksc5601_user[96 + (et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index - 8] = val;
break;
default:
break;
}
et4000->get_korean_font_index++;
}
break;
default:
break;
}
break;
case 0x32CB:
et4000->port_32cb_val = val;
svga_recalctimings(&et4000->svga);
break;
default:
et4000_out(addr, val, p);
break;
}
}
static uint8_t
et4000k_in(uint16_t addr, void *p)
{
uint8_t val = 0xFF;
et4000_t *et4000 = (et4000_t *)p;
// if (addr != 0x3da) pclog("IN ET4000 %04X\n", addr);
switch (addr)
{
case 0x22CB:
return et4000->port_22cb_val;
case 0x22CF:
val = 0;
switch(et4000->get_korean_font_enabled)
{
case 3:
if((et4000->port_32cb_val & 0x30) == 0x30)
{
val = fontdatksc5601[et4000->get_korean_font_base].chr[et4000->get_korean_font_index++];
et4000->get_korean_font_index &= 0x1F;
}
else if((et4000->port_32cb_val & 0x30) == 0x20 && (et4000->get_korean_font_base & 0x7F) > 0x20 && (et4000->get_korean_font_base & 0x7F) < 0x7F)
{
switch(et4000->get_korean_font_base & 0x3F80)
{
case 0x2480:
if(et4000->get_korean_font_index < 16)
val = fontdatksc5601_user[(et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index];
else if(et4000->get_korean_font_index >= 24 && et4000->get_korean_font_index < 40)
val = fontdatksc5601_user[(et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index - 8];
break;
case 0x3F00:
if(et4000->get_korean_font_index < 16)
val = fontdatksc5601_user[96 + (et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index];
else if(et4000->get_korean_font_index >= 24 && et4000->get_korean_font_index < 40)
val = fontdatksc5601_user[96 + (et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index - 8];
break;
default:
break;
}
et4000->get_korean_font_index++;
et4000->get_korean_font_index %= 72;
}
break;
case 4:
val = 0x0F;
break;
default:
break;
}
return val;
case 0x32CB:
return et4000->port_32cb_val;
default:
return et4000_in(addr, p);
}
}
static void
et4000_recalctimings(svga_t *svga)
{ {
svga->ma_latch |= (svga->crtc[0x33]&3)<<16; svga->ma_latch |= (svga->crtc[0x33]&3)<<16;
if (svga->crtc[0x35] & 1) svga->vblankstart += 0x400; if (svga->crtc[0x35] & 1) svga->vblankstart += 0x400;
@@ -180,30 +379,147 @@ void et4000_recalctimings(svga_t *svga)
} }
} }
void *et4000_init(const device_t *info)
static void
et4000k_recalctimings(svga_t *svga)
{
et4000_t *et4000 = (et4000_t *)svga->p;
et4000_recalctimings(svga);
#if NOT_YET
if (svga->render == svga_render_text_80 && ((svga->crtc[0x37] & 0x0A) == 0x0A))
{
if((et4000->port_32cb_val & 0xB4) == ((svga->crtc[0x37] & 3) == 2 ? 0xB4 : 0xB0))
{
svga->render = svga_render_text_80_ksc5601;
}
}
#endif
}
static void *
et4000_isa_init(const device_t *info)
{ {
et4000_t *et4000 = malloc(sizeof(et4000_t)); et4000_t *et4000 = malloc(sizeof(et4000_t));
memset(et4000, 0, sizeof(et4000_t)); memset(et4000, 0, sizeof(et4000_t));
et4000->is_mca = 0;
rom_init(&et4000->bios_rom, BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); rom_init(&et4000->bios_rom, BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
io_sethandler(0x03c0, 0x0020, et4000_in, NULL, NULL, et4000_out, NULL, NULL, et4000); io_sethandler(0x03c0, 0x0020, et4000_in, NULL, NULL, et4000_out, NULL, NULL, et4000);
svga_init(&et4000->svga, et4000, device_get_config_int("memory") << 10, /*1mb default*/
et4000_recalctimings,
et4000_in, et4000_out,
NULL,
NULL);
et4000->vram_mask = (device_get_config_int("memory") << 10) - 1;
return et4000;
}
static void *
et4000k_isa_init(const device_t *info)
{
et4000_t *et4000 = malloc(sizeof(et4000_t));
memset(et4000, 0, sizeof(et4000_t));
rom_init(&et4000->bios_rom, KOREAN_BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
loadfont(KOREAN_FONT_ROM_PATH, 6);
io_sethandler(0x03c0, 0x0020, et4000_in, NULL, NULL, et4000_out, NULL, NULL, et4000);
io_sethandler(0x22cb, 0x0001, et4000k_in, NULL, NULL, et4000k_out, NULL, NULL, et4000);
io_sethandler(0x22cf, 0x0001, et4000k_in, NULL, NULL, et4000k_out, NULL, NULL, et4000);
io_sethandler(0x32cb, 0x0001, et4000k_in, NULL, NULL, et4000k_out, NULL, NULL, et4000);
et4000->port_22cb_val = 0x60;
et4000->port_32cb_val = 0;
svga_init(&et4000->svga, et4000, device_get_config_int("memory") << 10,
et4000k_recalctimings,
et4000k_in, et4000k_out,
NULL,
NULL);
et4000->vram_mask = (device_get_config_int("memory") << 10) - 1;
#if NOT_YET
et4000->svga.ksc5601_sbyte_mask = 0x80;
#endif
return et4000;
}
static uint8_t
et4000_mca_read(int port, void *priv)
{
et4000_t *et4000 = (et4000_t *)priv;
return(et4000->pos_regs[port & 7]);
}
static void
et4000_mca_write(int port, uint8_t val, void *priv)
{
et4000_t *et4000 = (et4000_t *)priv;
/* MCA does not write registers below 0x0100. */
if (port < 0x0102) return;
/* Save the MCA register value. */
et4000->pos_regs[port & 7] = val;
}
static void *
et4000_mca_init(const device_t *info)
{
et4000_t *et4000 = malloc(sizeof(et4000_t));
memset(et4000, 0, sizeof(et4000_t));
et4000->is_mca = 1;
/* Enable MCA. */
et4000->pos_regs[0] = 0xF2; /* ET4000 MCA board ID */
et4000->pos_regs[1] = 0x80;
mca_add(et4000_mca_read, et4000_mca_write, et4000);
rom_init(&et4000->bios_rom, BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
svga_init(&et4000->svga, et4000, 1 << 20, /*1mb*/ svga_init(&et4000->svga, et4000, 1 << 20, /*1mb*/
et4000_recalctimings, et4000_recalctimings,
et4000_in, et4000_out, et4000_in, et4000_out,
NULL, NULL,
NULL); NULL);
et4000->vram_mask = (1 << 20) - 1;
io_sethandler(0x03c0, 0x0020, et4000_in, NULL, NULL, et4000_out, NULL, NULL, et4000);
return et4000; return et4000;
} }
static int et4000_available(void)
static int
et4000_available(void)
{ {
return rom_present(BIOS_ROM_PATH); return rom_present(BIOS_ROM_PATH);
} }
void et4000_close(void *p)
static int
et4000k_available(void)
{
return rom_present(KOREAN_BIOS_ROM_PATH) && rom_present(KOREAN_FONT_ROM_PATH);
}
static void
et4000_close(void *p)
{ {
et4000_t *et4000 = (et4000_t *)p; et4000_t *et4000 = (et4000_t *)p;
@@ -212,35 +528,101 @@ void et4000_close(void *p)
free(et4000); free(et4000);
} }
void et4000_speed_changed(void *p)
static void
et4000_speed_changed(void *p)
{ {
et4000_t *et4000 = (et4000_t *)p; et4000_t *et4000 = (et4000_t *)p;
svga_recalctimings(&et4000->svga); svga_recalctimings(&et4000->svga);
} }
void et4000_force_redraw(void *p)
static void
et4000_force_redraw(void *p)
{ {
et4000_t *et4000 = (et4000_t *)p; et4000_t *et4000 = (et4000_t *)p;
et4000->svga.fullchange = changeframecount; et4000->svga.fullchange = changeframecount;
} }
void et4000_add_status_info(char *s, int max_len, void *p)
{
et4000_t *et4000 = (et4000_t *)p;
svga_add_status_info(s, max_len, &et4000->svga); static device_config_t et4000_config[] =
}
const device_t et4000_device =
{ {
"Tseng Labs ET4000AX", {
DEVICE_ISA, 0, .name = "memory",
et4000_init, et4000_close, NULL, .description = "Memory size",
.type = CONFIG_SELECTION,
.selection =
{
{
.description = "256 kB",
.value = 256
},
{
.description = "512 kB",
.value = 512
},
{
.description = "1 MB",
.value = 1024
},
{
.description = ""
}
},
.default_int = 1024
},
{
.type = -1
}
};
const device_t et4000_isa_device =
{
"Tseng Labs ET4000AX (ISA)",
DEVICE_ISA,
0,
et4000_isa_init, et4000_close, NULL,
et4000_available,
et4000_speed_changed,
et4000_force_redraw,
et4000_config
};
const device_t et4000k_isa_device =
{
"Trigem Korean VGA (Tseng Labs ET4000AX Korean)",
DEVICE_ISA,
0,
et4000k_isa_init, et4000_close, NULL,
et4000k_available,
et4000_speed_changed,
et4000_force_redraw,
et4000_config
};
const device_t et4000k_tg286_isa_device =
{
"Trigem Korean VGA (Trigem 286M)",
DEVICE_ISA,
0,
et4000k_isa_init, et4000_close, NULL,
et4000k_available,
et4000_speed_changed,
et4000_force_redraw,
et4000_config
};
const device_t et4000_mca_device =
{
"Tseng Labs ET4000AX (MCA)",
DEVICE_MCA,
0,
et4000_mca_init, et4000_close, NULL,
et4000_available, et4000_available,
et4000_speed_changed, et4000_speed_changed,
et4000_force_redraw, et4000_force_redraw,
et4000_add_status_info,
NULL NULL
}; };

408
src/devices/video/vid_et4000w32.c
View File

@@ -10,7 +10,7 @@
* *
* Known bugs: Accelerator doesn't work in planar modes * Known bugs: Accelerator doesn't work in planar modes
* *
* Version: @(#)vid_et4000w32.c 1.0.10 2018/05/06 * Version: @(#)vid_et4000w32.c 1.0.11 2018/08/25
* *
* Authors: Fred N. van Kempen, <decwiz@yahoo.com> * Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -114,6 +114,7 @@ typedef struct et4000w32p_t
int pci; int pci;
uint8_t regs[256]; uint8_t regs[256];
uint32_t linearbase, linearbase_old; uint32_t linearbase, linearbase_old;
uint32_t vram_mask;
uint8_t banking, banking2; uint8_t banking, banking2;
@@ -167,205 +168,15 @@ typedef struct et4000w32p_t
int type; int type;
} et4000w32p_t; } et4000w32p_t;
void et4000w32p_recalcmapping(et4000w32p_t *et4000);
uint8_t et4000w32p_mmu_read(uint32_t addr, void *p); uint8_t et4000w32p_mmu_read(uint32_t addr, void *p);
void et4000w32p_mmu_write(uint32_t addr, uint8_t val, void *p); void et4000w32p_mmu_write(uint32_t addr, uint8_t val, void *p);
void et4000w32_blit_start(et4000w32p_t *et4000); void et4000w32_blit_start(et4000w32p_t *et4000);
void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et4000w32p_t *et4000); void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et4000w32p_t *et4000);
void et4000w32p_out(uint16_t addr, uint8_t val, void *p)
{
et4000w32p_t *et4000 = (et4000w32p_t *)p;
svga_t *svga = &et4000->svga;
uint8_t old;
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) static void
addr ^= 0x60; et4000w32p_recalcmapping(et4000w32p_t *et4000)
switch (addr)
{
#if defined(DEV_BRANCH) && defined(USE_STEALTH32)
case 0x3c2:
if (et4000->type == ET4000W32_DIAMOND)
icd2061_write(&et4000->icd2061, (val >> 2) & 3);
break;
#endif
case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9:
stg_ramdac_out(addr, val, &et4000->ramdac, svga);
return;
case 0x3CB: /*Banking extension*/
svga->write_bank = (svga->write_bank & 0xfffff) | ((val & 1) << 20);
svga->read_bank = (svga->read_bank & 0xfffff) | ((val & 0x10) << 16);
et4000->banking2 = val;
return;
case 0x3CD: /*Banking*/
svga->write_bank = (svga->write_bank & 0x100000) | ((val & 0xf) * 65536);
svga->read_bank = (svga->read_bank & 0x100000) | (((val >> 4) & 0xf) * 65536);
et4000->banking = val;
return;
case 0x3CF:
switch (svga->gdcaddr & 15)
{
case 6:
svga->gdcreg[svga->gdcaddr & 15] = val;
et4000w32p_recalcmapping(et4000);
return;
}
break;
case 0x3D4:
svga->crtcreg = val & 63;
return;
case 0x3D5:
if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80))
return;
if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80))
val = (svga->crtc[7] & ~0x10) | (val & 0x10);
old = svga->crtc[svga->crtcreg];
svga->crtc[svga->crtcreg] = val;
if (old != val)
{
if (svga->crtcreg < 0xe || svga->crtcreg > 0x10)
{
svga->fullchange = changeframecount;
svga_recalctimings(svga);
}
}
if (svga->crtcreg == 0x30)
{
if (et4000->pci)
{
et4000->linearbase &= 0xc0000000;
et4000->linearbase = (val & 0xfc) << 22;
}
else
{
et4000->linearbase = val << 22;
}
et4000w32p_recalcmapping(et4000);
}
if (svga->crtcreg == 0x32 || svga->crtcreg == 0x36)
et4000w32p_recalcmapping(et4000);
break;
case 0x210A: case 0x211A: case 0x212A: case 0x213A:
case 0x214A: case 0x215A: case 0x216A: case 0x217A:
et4000->index=val;
return;
case 0x210B: case 0x211B: case 0x212B: case 0x213B:
case 0x214B: case 0x215B: case 0x216B: case 0x217B:
et4000->regs[et4000->index] = val;
svga->hwcursor.x = et4000->regs[0xE0] | ((et4000->regs[0xE1] & 7) << 8);
svga->hwcursor.y = et4000->regs[0xE4] | ((et4000->regs[0xE5] & 7) << 8);
svga->hwcursor.addr = (et4000->regs[0xE8] | (et4000->regs[0xE9] << 8) | ((et4000->regs[0xEA] & 7) << 16)) << 2;
svga->hwcursor.addr += (et4000->regs[0xE6] & 63) * 16;
svga->hwcursor.ena = et4000->regs[0xF7] & 0x80;
svga->hwcursor.xoff = et4000->regs[0xE2] & 63;
svga->hwcursor.yoff = et4000->regs[0xE6] & 63;
return;
}
svga_out(addr, val, svga);
}
uint8_t et4000w32p_in(uint16_t addr, void *p)
{
et4000w32p_t *et4000 = (et4000w32p_t *)p;
svga_t *svga = &et4000->svga;
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
switch (addr)
{
case 0x3c5:
if ((svga->seqaddr & 0xf) == 7)
return svga->seqregs[svga->seqaddr & 0xf] | 4;
break;
case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9:
return stg_ramdac_in(addr, &et4000->ramdac, svga);
case 0x3CB:
return et4000->banking2;
case 0x3CD:
return et4000->banking;
case 0x3D4:
return svga->crtcreg;
case 0x3D5:
return svga->crtc[svga->crtcreg];
case 0x210A: case 0x211A: case 0x212A: case 0x213A:
case 0x214A: case 0x215A: case 0x216A: case 0x217A:
return et4000->index;
case 0x210B: case 0x211B: case 0x212B: case 0x213B:
case 0x214B: case 0x215B: case 0x216B: case 0x217B:
if (et4000->index==0xec)
return (et4000->regs[0xec] & 0xf) | 0x60; /*ET4000/W32p rev D*/
if (et4000->index == 0xee) /*Preliminary implementation*/
{
if (svga->bpp == 8)
return 3;
else if (svga->bpp == 16)
return 4;
else
break;
}
if (et4000->index == 0xef)
{
if (et4000->pci) return et4000->regs[0xef] | 0xe0; /*PCI*/
else return et4000->regs[0xef] | 0x60; /*VESA local bus*/
}
return et4000->regs[et4000->index];
}
return svga_in(addr, svga);
}
void et4000w32p_recalctimings(svga_t *svga)
{
et4000w32p_t *et4000 = (et4000w32p_t *)svga->p;
svga->ma_latch |= (svga->crtc[0x33] & 0x7) << 16;
if (svga->crtc[0x35] & 0x01) svga->vblankstart += 0x400;
if (svga->crtc[0x35] & 0x02) svga->vtotal += 0x400;
if (svga->crtc[0x35] & 0x04) svga->dispend += 0x400;
if (svga->crtc[0x35] & 0x08) svga->vsyncstart += 0x400;
if (svga->crtc[0x35] & 0x10) svga->split += 0x400;
if (svga->crtc[0x3F] & 0x80) svga->rowoffset += 0x100;
if (svga->crtc[0x3F] & 0x01) svga->htotal += 256;
if (svga->attrregs[0x16] & 0x20) svga->hdisp <<= 1;
#if defined(DEV_BRANCH) && defined(USE_STEALTH32)
if (et4000->type == ET4000W32_DIAMOND)
{
switch ((svga->miscout >> 2) & 3)
{
case 0: case 1: break;
case 2: case 3: svga->clock = cpuclock / icd2061_getfreq(&et4000->icd2061, 2); break;
}
}
else
{
#endif
svga->clock = cpuclock / stg_getclock((svga->miscout >> 2) & 3, &et4000->ramdac);
#if defined(DEV_BRANCH) && defined(USE_STEALTH32)
}
#endif
switch (svga->bpp)
{
case 15: case 16:
svga->hdisp >>= 1;
break;
case 24:
svga->hdisp /= 3;
break;
}
}
void et4000w32p_recalcmapping(et4000w32p_t *et4000)
{ {
svga_t *svga = &et4000->svga; svga_t *svga = &et4000->svga;
@@ -436,6 +247,215 @@ void et4000w32p_recalcmapping(et4000w32p_t *et4000)
mem_mapping_disable(&svga->mapping); mem_mapping_disable(&svga->mapping);
} }
static void
et4000w32p_recalctimings(svga_t *svga)
{
et4000w32p_t *et4000 = (et4000w32p_t *)svga->p;
svga->ma_latch |= (svga->crtc[0x33] & 0x7) << 16;
if (svga->crtc[0x35] & 0x01) svga->vblankstart += 0x400;
if (svga->crtc[0x35] & 0x02) svga->vtotal += 0x400;
if (svga->crtc[0x35] & 0x04) svga->dispend += 0x400;
if (svga->crtc[0x35] & 0x08) svga->vsyncstart += 0x400;
if (svga->crtc[0x35] & 0x10) svga->split += 0x400;
if (svga->crtc[0x3F] & 0x80) svga->rowoffset += 0x100;
if (svga->crtc[0x3F] & 0x01) svga->htotal += 256;
if (svga->attrregs[0x16] & 0x20) svga->hdisp <<= 1;
#if defined(DEV_BRANCH) && defined(USE_STEALTH32)
if (et4000->type == ET4000W32_DIAMOND)
{
switch ((svga->miscout >> 2) & 3)
{
case 0: case 1: break;
case 2: case 3: svga->clock = cpuclock / icd2061_getfreq(&et4000->icd2061, 2); break;
}
}
else
{
#endif
svga->clock = cpuclock / stg_getclock((svga->miscout >> 2) & 3, &et4000->ramdac);
#if defined(DEV_BRANCH) && defined(USE_STEALTH32)
}
#endif
switch (svga->bpp)
{
case 15: case 16:
svga->hdisp >>= 1;
break;
case 24:
svga->hdisp /= 3;
break;
}
}
static uint8_t
et4000w32p_in(uint16_t addr, void *p)
{
et4000w32p_t *et4000 = (et4000w32p_t *)p;
svga_t *svga = &et4000->svga;
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
switch (addr)
{
case 0x3c5:
if ((svga->seqaddr & 0xf) == 7)
return svga->seqregs[svga->seqaddr & 0xf] | 4;
break;
case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9:
return stg_ramdac_in(addr, &et4000->ramdac, svga);
case 0x3CB:
return et4000->banking2;
case 0x3CD:
return et4000->banking;
case 0x3D4:
return svga->crtcreg;
case 0x3D5:
return svga->crtc[svga->crtcreg];
case 0x210A: case 0x211A: case 0x212A: case 0x213A:
case 0x214A: case 0x215A: case 0x216A: case 0x217A:
return et4000->index;
case 0x210B: case 0x211B: case 0x212B: case 0x213B:
case 0x214B: case 0x215B: case 0x216B: case 0x217B:
if (et4000->index==0xec)
return (et4000->regs[0xec] & 0xf) | 0x60; /*ET4000/W32p rev D*/
if (et4000->index == 0xee) /*Preliminary implementation*/
{
if (svga->bpp == 8)
return 3;
else if (svga->bpp == 16)
return 4;
else
break;
}
if (et4000->index == 0xef)
{
if (et4000->pci) return et4000->regs[0xef] | 0xe0; /*PCI*/
else return et4000->regs[0xef] | 0x60; /*VESA local bus*/
}
return et4000->regs[et4000->index];
}
return svga_in(addr, svga);
}
static void
et4000w32p_out(uint16_t addr, uint8_t val, void *p)
{
et4000w32p_t *et4000 = (et4000w32p_t *)p;
svga_t *svga = &et4000->svga;
uint8_t old;
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
switch (addr)
{
#if defined(DEV_BRANCH) && defined(USE_STEALTH32)
case 0x3c2:
if (et4000->type == ET4000W32_DIAMOND)
icd2061_write(&et4000->icd2061, (val >> 2) & 3);
break;
#endif
case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9:
stg_ramdac_out(addr, val, &et4000->ramdac, svga);
return;
case 0x3CB: /*Banking extension*/
if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) {
svga->write_bank = (svga->write_bank & 0xfffff) | ((val & 1) << 20);
svga->read_bank = (svga->read_bank & 0xfffff) | ((val & 0x10) << 16);
}
et4000->banking2 = val;
return;
case 0x3CD: /*Banking*/
if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) {
svga->write_bank = (svga->write_bank & 0x100000) | ((val & 0xf) * 65536);
svga->read_bank = (svga->read_bank & 0x100000) | (((val >> 4) & 0xf) * 65536);
}
et4000->banking = val;
return;
case 0x3CF:
switch (svga->gdcaddr & 15)
{
case 6:
svga->gdcreg[svga->gdcaddr & 15] = val;
et4000w32p_recalcmapping(et4000);
return;
}
break;
case 0x3D4:
svga->crtcreg = val & 63;
return;
case 0x3D5:
if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80))
return;
if ((svga->crtcreg == 0x35) && (svga->crtc[0x11] & 0x80))
return;
if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80))
val = (svga->crtc[7] & ~0x10) | (val & 0x10);
old = svga->crtc[svga->crtcreg];
svga->crtc[svga->crtcreg] = val;
if (svga->crtcreg == 0x36) {
if (!(val & 0x10)) {
svga->write_bank = ((et4000->banking2 & 1) << 20) | ((et4000->banking & 0xf) * 65536);
svga->read_bank = ((et4000->banking2 & 0x10) << 16) | (((et4000->banking >> 4) & 0xf) * 65536);
}
}
if (old != val)
{
if (svga->crtcreg < 0xe || svga->crtcreg > 0x10)
{
svga->fullchange = changeframecount;
svga_recalctimings(svga);
}
}
if (svga->crtcreg == 0x30)
{
if (et4000->pci)
{
et4000->linearbase &= 0xc0000000;
et4000->linearbase = (val & 0xfc) << 22;
}
else
{
et4000->linearbase = val << 22;
}
et4000w32p_recalcmapping(et4000);
}
if (svga->crtcreg == 0x32 || svga->crtcreg == 0x36)
et4000w32p_recalcmapping(et4000);
break;
case 0x210A: case 0x211A: case 0x212A: case 0x213A:
case 0x214A: case 0x215A: case 0x216A: case 0x217A:
et4000->index=val;
return;
case 0x210B: case 0x211B: case 0x212B: case 0x213B:
case 0x214B: case 0x215B: case 0x216B: case 0x217B:
et4000->regs[et4000->index] = val;
svga->hwcursor.x = et4000->regs[0xE0] | ((et4000->regs[0xE1] & 7) << 8);
svga->hwcursor.y = et4000->regs[0xE4] | ((et4000->regs[0xE5] & 7) << 8);
svga->hwcursor.addr = (et4000->regs[0xE8] | (et4000->regs[0xE9] << 8) | ((et4000->regs[0xEA] & 7) << 16)) << 2;
svga->hwcursor.addr += (et4000->regs[0xE6] & 63) * 16;
svga->hwcursor.ena = et4000->regs[0xF7] & 0x80;
svga->hwcursor.xoff = et4000->regs[0xE2] & 63;
svga->hwcursor.yoff = et4000->regs[0xE6] & 63;
return;
}
svga_out(addr, val, svga);
}
#define ACL_WRST 1 #define ACL_WRST 1
#define ACL_RDST 2 #define ACL_RDST 2
#define ACL_XYST 4 #define ACL_XYST 4
@@ -1101,6 +1121,7 @@ void et4000w32p_hwcursor_draw(svga_t *svga, int displine)
static void et4000w32p_io_remove(et4000w32p_t *et4000) static void et4000w32p_io_remove(et4000w32p_t *et4000)
{ {
io_removehandler(0x03c0, 0x0020, et4000w32p_in, NULL, NULL, et4000w32p_out, NULL, NULL, et4000); io_removehandler(0x03c0, 0x0020, et4000w32p_in, NULL, NULL, et4000w32p_out, NULL, NULL, et4000);
io_removehandler(0x210A, 0x0002, et4000w32p_in, NULL, NULL, et4000w32p_out, NULL, NULL, et4000); io_removehandler(0x210A, 0x0002, et4000w32p_in, NULL, NULL, et4000w32p_out, NULL, NULL, et4000);
@@ -1234,6 +1255,7 @@ void *et4000w32p_init(const device_t *info)
et4000w32p_in, et4000w32p_out, et4000w32p_in, et4000w32p_out,
et4000w32p_hwcursor_draw, et4000w32p_hwcursor_draw,
NULL); NULL);
et4000->vram_mask = (vram_size << 20) - 1;
et4000->type = info->local; et4000->type = info->local;

6
src/devices/video/video_dev.c
View File

@@ -12,7 +12,7 @@
* an "extern" reference to its device into this file, and * an "extern" reference to its device into this file, and
* add an entry for it into the table. * add an entry for it into the table.
* *
* Version: @(#)video_dev.c 1.0.18 2018/05/06 * Version: @(#)video_dev.c 1.0.19 2018/08/25
* *
* Authors: Fred N. van Kempen, <decwiz@yahoo.com> * Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -122,7 +122,7 @@ extern const device_t cpqega_device;
extern const device_t sega_device; extern const device_t sega_device;
/* Tseng Labs ET4000 series cards. */ /* Tseng Labs ET4000 series cards. */
extern const device_t et4000_device; extern const device_t et4000_isa_device;
/* Tseng Labs ET4000-W32 series cards. */ /* Tseng Labs ET4000-W32 series cards. */
#if defined(DEV_BRANCH) && defined(USE_STEALTH32) #if defined(DEV_BRANCH) && defined(USE_STEALTH32)
@@ -258,7 +258,7 @@ static vidcard_t video_cards[] = {
{"[ISA] TI CF62011 SVGA", "ti_cf62011", &ti_cf62011_device, VID_TICF62011, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, {"[ISA] TI CF62011 SVGA", "ti_cf62011", &ti_cf62011_device, VID_TICF62011, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
#endif #endif
{"[ISA] Trident TVGA8900D", "tvga8900d", &tvga8900d_device, VID_TVGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, {"[ISA] Trident TVGA8900D", "tvga8900d", &tvga8900d_device, VID_TVGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}},
{"[ISA] Tseng ET4000AX", "et4000ax", &et4000_device, VID_ET4000, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, {"[ISA] Tseng ET4000AX", "et4000ax", &et4000_isa_device, VID_ET4000, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}},
{"[ISA] VGA", "vga", &vga_device, VID_VGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, {"[ISA] VGA", "vga", &vga_device, VID_VGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{"[ISA] Wyse 700", "wy700", &wy700_device, VID_WY700, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, {"[ISA] Wyse 700", "wy700", &wy700_device, VID_WY700, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_pci", &mach64gx_pci_device, VID_MACH64GX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, {"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_pci", &mach64gx_pci_device, VID_MACH64GX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}},

92
src/mem.c
View File

@@ -12,7 +12,7 @@
* the DYNAMIC_TABLES=1 enables this. Will eventually go * the DYNAMIC_TABLES=1 enables this. Will eventually go
* away, either way... * away, either way...
* *
* Version: @(#)mem.c 1.0.18 2018/08/22 * Version: @(#)mem.c 1.0.19 2018/08/25
* *
* Authors: Fred N. van Kempen, <decwiz@yahoo.com> * Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -1136,6 +1136,75 @@ mem_write_raml(uint32_t addr, uint32_t val, void *priv)
} }
static uint8_t
mem_read_remapped(uint32_t addr, void *priv)
{
if (addr >= (1024UL * mem_size) && addr < (1024UL * (mem_size + 384)))
addr = 0xA0000 + (addr - (mem_size * 1024));
addreadlookup(mem_logical_addr, addr);
return ram[addr];
}
static uint16_t
mem_read_remappedw(uint32_t addr, void *priv)
{
if ((addr >= (1024UL * mem_size)) && (addr < (1024UL * (mem_size + 384))))
addr = 0xA0000 + (addr - (mem_size * 1024));
addreadlookup(mem_logical_addr, addr);
return *(uint16_t *)&ram[addr];
}
static uint32_t
mem_read_remappedl(uint32_t addr, void *priv)
{
if ((addr >= (1024UL * mem_size)) && (addr < (1024UL * (mem_size + 384))))
addr = 0xA0000 + (addr - (mem_size * 1024));
addreadlookup(mem_logical_addr, addr);
return *(uint32_t *)&ram[addr];
}
static void
mem_write_remapped(uint32_t addr, uint8_t val, void *priv)
{
uint32_t oldaddr = addr;
if ((addr >= (1024UL * mem_size)) && (addr < (1024UL * (mem_size + 384))))
addr = 0xA0000 + (addr - (mem_size * 1024));
addwritelookup(mem_logical_addr, addr);
mem_write_ramb_page(addr, val, &pages[oldaddr >> 12]);
}
static void
mem_write_remappedw(uint32_t addr, uint16_t val, void *priv)
{
uint32_t oldaddr = addr;
if ((addr >= (1024UL * mem_size)) && (addr < (1024UL * (mem_size + 384))))
addr = 0xA0000 + (addr - (mem_size * 1024));
addwritelookup(mem_logical_addr, addr);
mem_write_ramw_page(addr, val, &pages[oldaddr >> 12]);
}
static void
mem_write_remappedl(uint32_t addr, uint32_t val, void *priv)
{
uint32_t oldaddr = addr;
if ((addr >= (1024UL * mem_size)) && (addr < (1024UL * (mem_size + 384))))
addr = 0xA0000 + (addr - (mem_size * 1024));
addwritelookup(mem_logical_addr, addr);
mem_write_raml_page(addr, val, &pages[oldaddr >> 12]);
}
uint8_t uint8_t
mem_read_bios(uint32_t addr, void *priv) mem_read_bios(uint32_t addr, void *priv)
{ {
@@ -1606,7 +1675,7 @@ mem_reset(void)
if (mem_size < 16384) if (mem_size < 16384)
m = 1024UL * 16384; m = 1024UL * 16384;
else else
m = 1024UL * (mem_size + 384); /* 386 extra kB for top remapping */ m = 1024UL * mem_size;
if (ram != NULL) free(ram); if (ram != NULL) free(ram);
ram = (uint8_t *)malloc(m); /* allocate and clear the RAM block */ ram = (uint8_t *)malloc(m); /* allocate and clear the RAM block */
memset(ram, 0x00, m); memset(ram, 0x00, m);
@@ -1668,6 +1737,15 @@ pclog("MEM: reset: new pages=%08lx, pages_sz=%i\n", pages, pages_sz);
pages[c].write_l = mem_write_raml_page; pages[c].write_l = mem_write_raml_page;
} }
if (pages_sz > 256) {
for (c = ((1024UL * mem_size) >> 12); c < ((1024UL * (mem_size + 256)) >> 12); c++) {
pages[c].mem = &ram[0xA0000 + ((c - ((mem_size * 1024) >> 12)) << 12)];
pages[c].write_b = mem_write_ramb_page;
pages[c].write_w = mem_write_ramw_page;
pages[c].write_l = mem_write_raml_page;
}
}
/* Initialize the tables. */ /* Initialize the tables. */
resetreadlookup(); resetreadlookup();
@@ -1714,23 +1792,21 @@ pclog("MEM: reset: new pages=%08lx, pages_sz=%i\n", pages, pages_sz);
} }
} }
#if 1
if (mem_size > 768) if (mem_size > 768)
mem_mapping_add(&ram_mid_mapping, 0xc0000, 0x40000, mem_mapping_add(&ram_mid_mapping, 0xc0000, 0x40000,
mem_read_ram,mem_read_ramw,mem_read_raml, mem_read_ram,mem_read_ramw,mem_read_raml,
mem_write_ram,mem_write_ramw,mem_write_raml, mem_write_ram,mem_write_ramw,mem_write_raml,
ram + 0xc0000, MEM_MAPPING_INTERNAL, NULL); ram + 0xc0000, MEM_MAPPING_INTERNAL, NULL);
#endif
if (romset == ROM_IBMPS1_2011) if (romset == ROM_IBMPS1_2011)
mem_mapping_add(&romext_mapping, 0xc8000, 0x08000, mem_mapping_add(&romext_mapping, 0xc8000, 0x08000,
mem_read_romext,mem_read_romextw,mem_read_romextl, mem_read_romext,mem_read_romextw,mem_read_romextl,
NULL,NULL, NULL, romext, 0, NULL); NULL,NULL, NULL, romext, 0, NULL);
mem_mapping_add(&ram_remapped_mapping, mem_size * 1024, 384 * 1024, mem_mapping_add(&ram_remapped_mapping, mem_size * 1024, 256 * 1024,
mem_read_ram,mem_read_ramw,mem_read_raml, mem_read_remapped,mem_read_remappedw,mem_read_remappedl,
mem_write_ram,mem_write_ramw,mem_write_raml, mem_write_remapped,mem_write_remappedw,mem_write_remappedl,
ram + (1 << 20), MEM_MAPPING_INTERNAL, NULL); ram + 0xa0000, MEM_MAPPING_INTERNAL, NULL);
mem_mapping_disable(&ram_remapped_mapping); mem_mapping_disable(&ram_remapped_mapping);
mem_a20_init(); mem_a20_init();