diff --git a/src/disk/hdc_esdi_mca.c b/src/disk/hdc_esdi_mca.c index df1cec5..0ee1fd8 100644 --- a/src/disk/hdc_esdi_mca.c +++ b/src/disk/hdc_esdi_mca.c @@ -52,7 +52,7 @@ * however, are auto-configured by the system software as * shown above. * - * Version: @(#)hdc_esdi_mca.c 1.0.7 2018/04/23 + * Version: @(#)hdc_esdi_mca.c 1.0.8 2018/04/24 * * Authors: Fred N. van Kempen, * Sarah Walker, @@ -102,8 +102,8 @@ #define ESDI_IOADDR_SEC 0x3518 #define ESDI_IRQCHAN 14 -#define BIOS_FILE_L L"disk/esdi_mca/90x8969.bin" -#define BIOS_FILE_H L"disk/esdi_mca/90x8970.bin" +#define BIOS_FILE_L L"disk/esdi/mca/90x8969.bin" +#define BIOS_FILE_H L"disk/esdi/mca/90x8970.bin" #define ESDI_TIME (200LL*TIMER_USEC) diff --git a/src/disk/hdc_xtide.c b/src/disk/hdc_xtide.c index af77223..ec9a4f7 100644 --- a/src/disk/hdc_xtide.c +++ b/src/disk/hdc_xtide.c @@ -21,7 +21,7 @@ * already on their way out, the newer IDE standard based on the * PC/AT controller and 16b design became the IDE we now know. * - * Version: @(#)hdc_xtide.c 1.0.6 2018/04/23 + * Version: @(#)hdc_xtide.c 1.0.7 2018/04/23 * * Authors: Fred N. van Kempen, * Miran Grca, @@ -64,7 +64,7 @@ #define ROM_PATH_XT L"disk/xtide/ide_xt.bin" #define ROM_PATH_AT L"disk/xtide/ide_at.bin" #define ROM_PATH_PS2 L"disk/xtide/side1v12.bin" -#define ROM_PATH_PS2AT L"disk/xtide/ide_at_1_1_5.bin" +#define ROM_PATH_PS2_AT L"disk/xtide/ide_at_1_1_5.bin" typedef struct { @@ -78,27 +78,27 @@ hdc_write(uint16_t port, uint8_t val, void *priv) { hdc_t *dev = (hdc_t *)priv; - switch (port & 0xf) { - case 0x0: + switch (port & 0x0f) { + case 0: writeidew(4, val | (dev->data_high << 8)); return; - case 0x1: - case 0x2: - case 0x3: - case 0x4: - case 0x5: - case 0x6: - case 0x7: - writeide(4, (port & 0xf) | 0x1f0, val); + case 1: + case 2: + case 3: + case 4: + case 5: + case 6: + case 7: + writeide(4, 0x01f0 | (port & 0x0f), val); return; - case 0x8: + case 8: dev->data_high = val; return; - case 0xe: - writeide(4, 0x3f6, val); + case 14: + writeide(4, 0x03f6, val); return; } } @@ -110,28 +110,28 @@ hdc_read(uint16_t port, void *priv) hdc_t *dev = (hdc_t *)priv; uint16_t tempw = 0xffff; - switch (port & 0xf) { - case 0x0: + switch (port & 0x0f) { + case 0: tempw = readidew(4); dev->data_high = tempw >> 8; break; - case 0x1: - case 0x2: - case 0x3: - case 0x4: - case 0x5: - case 0x6: - case 0x7: - tempw = readide(4, (port & 0xf) | 0x1f0); + case 1: + case 2: + case 3: + case 4: + case 5: + case 6: + case 7: + tempw = readide(4, 0x01f0 | (port & 0x0f)); break; - case 0x8: + case 8: tempw = dev->data_high; break; - case 0xe: - tempw = readide(4, 0x3f6); + case 14: + tempw = readide(4, 0x03f6); break; default: @@ -172,23 +172,22 @@ xtide_init(const device_t *info) case 2: fn = ROM_PATH_PS2; - rom_sz = 0x8000; + rom_sz = 0x8000; //FIXME: file is 8KB ? io = 0x360; ide_xtide_init(); break; case 3: - fn = ROM_PATH_PS2AT; - rom_sz = 0x4000; + fn = ROM_PATH_PS2_AT; + rom_sz = 0x4000; //FIXME: no I/O address? device_add(&ide_isa_2ch_device); break; } - if (fn != NULL) - rom_init(&dev->bios_rom, fn, - 0xc8000, rom_sz, rom_sz-1, 0, MEM_MAPPING_EXTERNAL); + rom_init(&dev->bios_rom, fn, + 0xc8000, rom_sz, rom_sz-1, 0, MEM_MAPPING_EXTERNAL); if (io != 0) io_sethandler(io, 16, @@ -228,7 +227,7 @@ xtide_acculogic_available(void) static int xtide_at_ps2_available(void) { - return(rom_present(ROM_PATH_PS2AT)); + return(rom_present(ROM_PATH_PS2_AT)); } diff --git a/src/machine/m_ps1_hdc.c b/src/machine/m_ps1_hdc.c index 808a2a5..602bf11 100644 --- a/src/machine/m_ps1_hdc.c +++ b/src/machine/m_ps1_hdc.c @@ -43,7 +43,7 @@ * Type table with the main code, so the user can only select * items from that list... * - * Version: @(#)m_ps1_hdc.c 1.0.4 2018/04/23 + * Version: @(#)m_ps1_hdc.c 1.0.4 2018/04/24 * * Author: Fred N. van Kempen, * @@ -105,7 +105,7 @@ #define HDC_TIME (200*TIMER_USEC) #define HDC_TYPE_USER 47 /* user drive type */ -#define XTA_NUM 1 /* we support 1 drive */ +#define PS1_HDD_NUM 1 /* we support 1 drive */ enum { @@ -406,7 +406,7 @@ typedef struct { sector; /* requested sector# */ int count; /* requested sector count */ - drive_t drives[XTA_NUM]; /* the attached drive(s) */ + drive_t drives[PS1_HDD_NUM]; /* the attached drive(s) */ uint8_t data[512]; /* data buffer */ uint8_t sector_buf[512]; /* sector buffer */ @@ -909,8 +909,8 @@ do_send: /* Copy from sector to data. */ memcpy(dev->data, - dev->sector_buf, - (128<ssb.sect_size)); + dev->sector_buf, + dev->buf_len); dev->buf_ptr = dev->data; } } @@ -1090,8 +1090,9 @@ do_recv: case STATE_RDONE: /* Copy from data to sector if PIO. */ if (! (dev->ctrl & ACR_DMA_EN)) - memcpy(dev->sector_buf, dev->data, - (128<ssb.sect_size)); + memcpy(dev->sector_buf, + dev->data, + dev->buf_len); /* Get address of sector to write. */ if (get_sector(dev, drive, &addr)) { @@ -1271,6 +1272,7 @@ hdc_read(uint16_t port, void *priv) } +/* Write to one of the controller registers. */ static void hdc_write(uint16_t port, uint8_t val, void *priv) { @@ -1398,7 +1400,7 @@ ps1_hdc_init(const device_t *info) /* Load any disks for this device class. */ c = 0; for (i = 0; i < HDD_NUM; i++) { - if ((hdd[i].bus == HDD_BUS_IDE) && (hdd[i].id.ide_channel < XTA_NUM)) { + if ((hdd[i].bus == HDD_BUS_IDE) && (hdd[i].id.ide_channel < PS1_HDD_NUM)) { drive = &dev->drives[hdd[i].id.ide_channel]; if (! hdd_image_load(i)) { @@ -1425,7 +1427,7 @@ ps1_hdc_init(const device_t *info) hdd[i].id.ide_channel, drive->type, drive->tracks, drive->hpc, drive->spt, i); - if (++c > XTA_NUM) break; + if (++c > PS1_HDD_NUM) break; } } @@ -1455,7 +1457,7 @@ ps1_hdc_close(void *priv) hdc_read,NULL,NULL, hdc_write,NULL,NULL, dev); /* Close all disks and their images. */ - for (d = 0; d < XTA_NUM; d++) { + for (d = 0; d < PS1_HDD_NUM; d++) { drive = &dev->drives[d]; if (drive->present)