Updated the memregs driver to be more flexible.

Updated several machines to use the new memregs devices.
Updated io.c to better handle I/O catching, and to allocate the array on the heap.

src/device.c

@@ -11,7 +11,7 @@
  *
  * **TODO**	Merge the various 'add' variants, its getting too messy.
  *
- * Version:	@(#)device.c	1.0.26	2019/05/15
+ * Version:	@(#)device.c	1.0.27	2019/05/15
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -92,6 +92,98 @@ device_reset(void)
 
 
 #ifdef _DEBUG
+static char *
+device_flags(uint32_t flags)
+{
+    static char buff[80];
+    char *sp = buff;
+    char *p = NULL;
+
+    if (flags == DEVICE_ROOT)
+	return("[ROOT]");
+
+    strcpy(sp, "[ "); sp += strlen(sp);
+
+    /* System types. */
+    switch(flags & 0x000f) {
+	case DEVICE_ALL:		/* any/all system */
+		p = "ANY";
+		break;
+
+	case DEVICE_PCJR:		/* requires an IBM PCjr */
+		p = "PCjr";
+		break;
+
+	case DEVICE_AT:			/* requires an AT-compatible system */
+		p = "AT";
+		break;
+
+	case DEVICE_PS2:		/* requires a PS/1 or PS/2 system */
+		p = "PS/2";
+		break;
+    }
+    strcat(sp, p); sp += strlen(sp);
+
+    /* Buses. */
+    if (flags & 0xff00) {
+	strcat(sp, ", ");
+	sp += strlen(sp);
+
+	switch(flags & 0xff00) {
+		case DEVICE_S100:	/* requires an S100 bus slot */
+			p = "S-100";
+			break;
+
+		case DEVICE_ISA:	/* requires an ISA bus slot */
+			p = "ISA";
+			break;
+
+		case DEVICE_EISA:	/* requires an EISA bus slot */
+			p = "EISA";
+			break;
+
+		case DEVICE_VLB:	/* requires a VLB bus slot */
+			p = "VLB";
+			break;
+
+		case DEVICE_PCI:	/* requires a PCI bus slot */
+			p = "PCI";
+			break;
+
+		case DEVICE_AGP:	/* requires an AGP bus slot */
+			p = "AGP";
+			break;
+
+		case DEVICE_MCA:	/* requires an MCA bus slot */
+			p = "MCA";
+			break;
+
+		case DEVICE_CBUS:	/* requires a C-BUS bus slot (PC98) */
+			p = "CBUS";
+			break;
+	}
+	strcat(sp, p); sp += strlen(sp);
+    }
+
+    /* Options. */
+    if (flags & 0xffff0000) switch(flags & 0xffff0000) {
+	case DEVICE_UNSTABLE:		/* unstable device, be cautious */
+		strcat(sp, ", <UNS>");
+		sp += strlen(sp);
+		break;
+
+	default:
+		flags &= DEVICE_VIDTYPE;
+		flags >>= 30;
+		sprintf(sp, ", VID=%i", flags);
+    }
+
+    strcat(sp, " ]");
+
+    return(buff);
+}
+
+
 void
 device_dump(void)
 {
@@ -100,8 +192,9 @@ device_dump(void)
     for (c = 0; c < DEVICE_MAX; c++) {
 	if (devices[c] == NULL) continue;
 
-	INFO("DEVICE [%3i] = '%s' flags=%08lx local=%08lx\n",
+	INFO("DEV[%2i] = '%s' flags=%s local=%08lx\n",
-		c, devices[c]->name, devices[c]->flags, devices[c]->local);
+		c, devices[c]->name,
+		device_flags(devices[c]->flags), devices[c]->local);
     }
 }
 #endif

src/device.h

@@ -8,7 +8,7 @@
  *
  *		Definitions for the device handler.
  *
- * Version:	@(#)device.h	1.0.13	2019/05/15
+ * Version:	@(#)device.h	1.0.14	2019/05/15
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -54,17 +54,18 @@
 
 enum {
     DEVICE_ALL = 0x00000000,		/* any/all device */
-    DEVICE_UNSTABLE = 0x00000001,	/* unstable device, be cautious */
+    DEVICE_PCJR = 0x00000001,		/* requires an IBM PCjr */
-    DEVICE_PCJR = 0x00000002,		/* requires an IBM PCjr */
+    DEVICE_AT = 0x00000002,		/* requires an AT-compatible system */
-    DEVICE_AT = 0x00000004,		/* requires an AT-compatible system */
+    DEVICE_PS2 = 0x00000004,		/* requires a PS/1 or PS/2 system */
-    DEVICE_PS2 = 0x00000008,		/* requires a PS/1 or PS/2 system */
+    DEVICE_S100 = 0x0000100,		/* requires an S-100 bus slot */
-    DEVICE_ISA = 0x00000100,		/* requires the ISA bus */
+    DEVICE_ISA = 0x00000200,		/* requires an ISA bus slot */
-    DEVICE_EISA = 0x00000200,		/* requires the EISA bus */
+    DEVICE_EISA = 0x00000400,		/* requires an EISA bus slot */
-    DEVICE_VLB = 0x00000400,		/* requires the VLB bus */
+    DEVICE_MCA = 0x00000800,		/* requires an MCA bus slot */
-    DEVICE_PCI = 0x00000800,		/* requires the PCI bus */
+    DEVICE_VLB = 0x00001000,		/* requires a VLB bus slot */
-    DEVICE_AGP = 0x00001000,		/* requires the AGP bus */
+    DEVICE_PCI = 0x00002000,		/* requires a PCI bus slot */
-    DEVICE_MCA = 0x00002000,		/* requires the MCA bus */
+    DEVICE_AGP = 0x00004000,		/* requires an AGP bus slot */
-    DEVICE_CBUS = 0x00004000,		/* requires the C-BUS bus (PC98) */
+    DEVICE_CBUS = 0x00008000,		/* requires a C-BUS bus slot (PC98) */
+    DEVICE_UNSTABLE = 0x20000000,	/* unstable device, be cautious */
     DEVICE_VIDTYPE = 0xc0000000,	/* video type bits in device flags */
     DEVICE_ROOT = 0xffffffff		/* machine root device */
 };

src/devices/system/memregs.c

@@ -9,7 +9,7 @@
  *		Emulation of the memory I/O scratch registers on ports 0xE1
  *		and 0xE2, used by just about any emulated machine.
  *
- * Version:	@(#)memregs.c	1.0.4	2019/05/13
+ * Version:	@(#)memregs.c	1.0.5	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -74,7 +74,7 @@ memregs_read(uint16_t port, priv_t priv)
     if (port == 0xffff)
 	return dev->reg_ffff;
 
-    return dev->regs[port & 0xf];
+    return dev->regs[port & 0x0f];
 }
 
 
@@ -94,25 +94,34 @@ memregs_init(const device_t *info, UNUSED(void *parent))
 
     dev = (memregs_t *)mem_alloc(sizeof(memregs_t));
     memset(dev, 0xff, sizeof(memregs_t));
-    dev->reg_ffff = 0;
 
     switch(info->local) {
-	case 0:		/* default */
+	case 0:		/* e1 */
+	case 1:		/* e1 + ffff */
 		io_sethandler(0x00e1, 2,
 			      memregs_read,NULL,NULL,
 			      memregs_write,NULL,NULL, dev);
 		break;
 
-	case 1:		/* powermate */
+	case 2:		/* eb */
-		io_sethandler(0x00ed, 2,
+	case 3:		/* eb + ffff */
+		io_sethandler(0x00eb, 1,
 			      memregs_read,NULL,NULL,
 			      memregs_write,NULL,NULL, dev);
-		io_sethandler(0xffff, 1,
+		break;
+
+	case 4:		/* ed */
+	case 5:		/* ed + ffff */
+		io_sethandler(0x00ed, 1,
 			      memregs_read,NULL,NULL,
 			      memregs_write,NULL,NULL, dev);
 		break;
     }
 
+    if (info->local & 1)
+	io_sethandler(0xffff, 1,
+		      memregs_read,NULL,NULL, memregs_write,NULL,NULL, dev);
+
     return((priv_t)dev);
 }
 
@@ -125,10 +134,42 @@ const device_t memregs_device = {
     NULL
 };
 
-const device_t memregs_powermate_device = {
+const device_t memregs_ffff_device = {
-    "Memory Registers (PowerMate)",
+    "Memory Registers (FFFF)",
     0, 1, NULL,
     memregs_init, memregs_close, NULL,
     NULL, NULL, NULL, NULL,
     NULL
 };
+
+const device_t memregs_eb_device = {
+    "Memory Registers (EB)",
+    0, 2, NULL,
+    memregs_init, memregs_close, NULL,
+    NULL, NULL, NULL, NULL,
+    NULL
+};
+
+const device_t memregs_eb_ffff_device = {
+    "Memory Registers (EB,FFFF)",
+    0, 3, NULL,
+    memregs_init, memregs_close, NULL,
+    NULL, NULL, NULL, NULL,
+    NULL
+};
+
+const device_t memregs_ed_device = {
+    "Memory Registers (ED)",
+    0, 4, NULL,
+    memregs_init, memregs_close, NULL,
+    NULL, NULL, NULL, NULL,
+    NULL
+};
+
+const device_t memregs_ed_ffff_device = {
+    "Memory Registers (ED,FFFF)",
+    0, 5, NULL,
+    memregs_init, memregs_close, NULL,
+    NULL, NULL, NULL, NULL,
+    NULL
+};

src/devices/system/memregs.h

@@ -8,7 +8,7 @@
  *
  *		Definitions for the memory control module.
  *
- * Version:	@(#)memregs.h	1.0.2	2019/05/13
+ * Version:	@(#)memregs.h	1.0.3	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -39,7 +39,13 @@
 
 
 extern const device_t	memregs_device;
-extern const device_t	memregs_powermate_device;
+extern const device_t	memregs_ffff_device;
+
+extern const device_t	memregs_eb_device;
+extern const device_t	memregs_eb_ffff_device;
+
+extern const device_t	memregs_ed_device;
+extern const device_t	memregs_ed_ffff_device;
 
 
 #endif	/*EMU_MEMREGS_H*/

src/io.c

@@ -8,7 +8,7 @@
  *
  *		Implement I/O ports and their operations.
  *
- * Version:	@(#)io.c	1.0.5	2019/05/13
+ * Version:	@(#)io.c	1.0.6	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -50,13 +50,14 @@
 
 
 typedef struct _io_ {
-    uint8_t  (*inb)(uint16_t addr, priv_t);
+    uint8_t	(*inb)(uint16_t, priv_t);
-    uint16_t (*inw)(uint16_t addr, priv_t);
+    void	(*outb)(uint16_t, uint8_t, priv_t);
-    uint32_t (*inl)(uint16_t addr, priv_t);
 
-    void     (*outb)(uint16_t addr, uint8_t  val, priv_t);
+    uint16_t	(*inw)(uint16_t, priv_t);
-    void     (*outw)(uint16_t addr, uint16_t val, priv_t);
+    void	(*outw)(uint16_t, uint16_t, priv_t);
-    void     (*outl)(uint16_t addr, uint32_t val, priv_t);
+
+    uint32_t	(*inl)(uint16_t, priv_t);
+    void	(*outl)(uint16_t, uint32_t, priv_t);
 
     priv_t	priv;
 
@@ -64,18 +65,118 @@ typedef struct _io_ {
 } io_t;
 
 
-static int	initialized = 0;
+static io_t	**io = NULL,
-static io_t	*io[NPORTS],
+		**io_last = NULL;
-		*io_last[NPORTS];
+  
+
+/* Add an I/O handler to the chain. */
+static void
+io_insert(int c, io_t *q)
+{
+    io_t *p;
+
+    p = io_last[c];
+    if (p != NULL) {
+	p->next = q;
+	q->prev = p;
+    } else {
+	io[c] = q;
+	q->prev = NULL;
+    }
+    io_last[c] = q;
+}
+
+
+/* Remove I/O handler from the chain. */
+static void
+io_unlink(int c)
+{
+    io_t *p = io[c];
+
+    if (p->prev != NULL)
+	p->prev->next = p->next;
+    else
+	io[c] = p->next;
+
+    if (p->next != NULL)
+	p->next->prev = p->prev;
+    else
+	io_last[c] = p->prev;
+
+    free(p);
+}
 
 
 #ifdef IO_CATCH
-static uint8_t null_inb(uint16_t addr, priv_t p) { DEBUG("IO: read(%04x)\n"); return(0xff); }
+static uint8_t
-static uint16_t null_inw(uint16_t addr, priv_t p) { DEBUG("IO: readw(%04x)\n"); return(0xffff); }
+catch_inb(uint16_t addr, priv_t p)
-static uint32_t null_inl(uint16_t addr, priv_t p) { DEBUG("IO: readl(%04x)\n"); return(0xffffffff); }
+{
-static void null_outb(uint16_t addr, uint8_t val, priv_t p) { DEBUG("IO: write(%04x, %02x)\n", val); }
+    DEBUG("IO: inb(%04x)\n", addr);
-static void null_outw(uint16_t addr, uint16_t val, priv_t p) { DEBUG("IO: writew(%04x, %04x)\n", val); }
+    return(0xff);
-static void null_outl(uint16_t addr, uint32_t val, priv_t p) { DEBUG("IO: writel(%04x, %08lx)\n", val); }
+}
+
+static uint16_t
+catch_inw(uint16_t addr, priv_t p)
+{
+    DEBUG("IO: inw(%04x)\n", addr);
+    return(0xffff);
+}
+
+static uint32_t
+catch_inl(uint16_t addr, priv_t p)
+{
+    DEBUG("IO: inl(%04x)\n", addr);
+    return(0xffffffff);
+}
+
+
+static void
+catch_outb(uint16_t addr, uint8_t val, priv_t p)
+{
+    DEBUG("IO: outb(%04x, %02x)\n", addr, val);
+}
+
+static void
+catch_outw(uint16_t addr, uint16_t val, priv_t p)
+{
+    DEBUG("IO: outw(%04x, %04x)\n", addr, val);
+}
+
+static void
+catch_outl(uint16_t addr, uint32_t val, priv_t p)
+{
+    DEBUG("IO: outl(%04x, %08lx)\n", addr, val);
+}
+
+
+/* Add a catch handler to a port. */
+static void
+catch_add(int port)
+{
+    io_t *p;
+
+    /* Create new handler. */
+    p = (io_t *)mem_alloc(sizeof(io_t));
+    memset(p, 0x00, sizeof(io_t));
+    p->inb  = catch_inb;
+    p->outb = catch_outb;
+    p->inw  = catch_inw;
+    p->outw = catch_outw;
+    p->inl  = catch_inl;
+    p->outl = catch_outl;
+
+    /* Add to chain. */
+    io_insert(port, p);
+}
+
+
+/* If the only handler is the catcher, remove it. */
+static void
+catch_del(int port)
+{
+    if ((io[port] != NULL) && (io[port]->inb == catch_inb))
+	io_unlink(port);
+}
 #endif
 
 
@@ -86,40 +187,33 @@ io_reset(void)
     int c;
 
     INFO("IO: initializing\n");
-    if (! initialized) {
+    if (io == NULL) {
-	for (c = 0; c < NPORTS; c++)
+	/* Allocate the arrays, one-time only. */
-		io[c] = io_last[c] = NULL;
+	c = sizeof(io_t **) * NPORTS;
-	initialized = 1;
+	io = (io_t **)mem_alloc(c);
+	memset(io, 0x00, c);
+	io_last = (io_t **)mem_alloc(c);
+	memset(io_last, 0x00, c);
     }
 
+    /* Clear both arrays. */
     for (c = 0; c < NPORTS; c++) {
        	if (io_last[c] != NULL) {
-		/* Port has at least one handler. */
+		/* At least one handler, free all handlers. */
 		p = io_last[c];
 		while (p != NULL) {
 			q = p->prev;
 			free(p);
 			p = q;
 		}
-		p = NULL;
 	}
 
-#ifdef IO_CATCH
+	/* Reset handler. */
-	/* Set up a default (catch) handler. */
-	p = (io_t *)mem_alloc(sizeof(io_t));
-	memset(p, 0x00, sizeof(io_t));
-	io[c] = io_last[c] = p;
-	p->next = NULL;
-	p->prev = NULL;
-	p->inb  = null_inb;
-	p->outb = null_outb;
-	p->inw  = null_inw;
-	p->outw = null_outw;
-	p->inl  = null_inl;
-	p->outl = null_outl;
-	p->priv = NULL;
-#else
 	io[c] = io_last[c] = NULL;
+
+#ifdef IO_CATCH
+	/* Add a default (catch) handler. */
+	catch_add(c);
 #endif
     }
 }
@@ -135,29 +229,25 @@ io_sethandler(uint16_t base, int size,
 	      void (*f_outl)(uint16_t addr, uint32_t val, priv_t priv),
 	      priv_t priv)
 {
-    io_t *p, *q = NULL;
+    io_t *p;
     int c;
 
     for (c = 0; c < size; c++) {
-	p = io_last[base + c];
+	/* Create entry for the new handler. */
-	q = (io_t *)mem_alloc(sizeof(io_t));
+	p = (io_t *)mem_alloc(sizeof(io_t));
-	memset(q, 0x00, sizeof(io_t));
+	memset(p, 0x00, sizeof(io_t));
-	if (p != NULL) {
+	p->inb = f_inb; p->inw = f_inw; p->inl = f_inl;
-		p->next = q;
+	p->outb = f_outb; p->outw = f_outw; p->outl = f_outl;
-		q->prev = p;
+	p->priv = priv;
-	} else {
-		io[base + c] = q;
-		q->prev = NULL;
-	}
 
-	q->inb = f_inb; q->inw = f_inw; q->inl = f_inl;
+#ifdef IO_CATCH
+	/* Unlink the catcher if that is the only handler. */
+	if (log_level < LOG_DETAIL)
+		catch_del(base + c);
+#endif
 
-	q->outb = f_outb; q->outw = f_outw; q->outl = f_outl;
+	/* Insert this new handler. */
-
+	io_insert(base + c, p);
-	q->priv = priv;
-	q->next = NULL;
-
-	io_last[base + c] = q;
     }
 }
 
@@ -179,24 +269,16 @@ io_removehandler(uint16_t base, int size,
 	p = io[base + c];
 	if (p == NULL)
 		continue;
-	while (p != NULL) {
+
+	for (; p != NULL; p = p->next) {
 		if ((p->inb == f_inb) && (p->inw == f_inw) &&
 		    (p->inl == f_inl) && (p->outb == f_outb) &&
 		    (p->outw == f_outw) && (p->outl == f_outl) &&
 		    (p->priv == priv)) {
-			if (p->prev != NULL)
+			io_unlink(base + c);
-				p->prev->next = p->next;
-			  else
-				io[base + c] = p->next;
-			if (p->next != NULL)
-				p->next->prev = p->prev;
-			  else
-				io_last[base + c] = p->prev;
-			free(p);
 			p = NULL;
 			break;
 		}
-		p = p->next;
 	}
     }
 }
@@ -290,7 +372,7 @@ inb(uint16_t port)
 
 #ifdef IO_TRACE
     if (CS == IO_TRACE)
-	DEBUG("IOTRACE(%04X): inb(%04x)=%02x\n", IO_TRACE, port, r);
+	DEBUG("IOTRACE(%04x): inb(%04x)=%02x\n", IO_TRACE, port, r);
 #endif
 
     return(r);

src/machines/m_acer.c

@@ -8,7 +8,7 @@
  *
  *		Implementation of the Intel 430xx-based Acer machines.
  *
- * Version:	@(#)m_acer.c	1.0.4	2019/05/13
+ * Version:	@(#)m_acer.c	1.0.5	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -128,7 +128,7 @@ acer_init(const device_t *info, void *arg)
 		pci_register_slot(0x1F, PCI_CARD_NORMAL, 4, 1, 2, 3);
 		pci_register_slot(0x10, PCI_CARD_ONBOARD, 4, 0, 0, 0);
 
-		device_add(&memregs_powermate_device);
+		device_add(&memregs_ed_device);
 
 		device_add(&i430hx_device);
 		device_add(&piix3_device);
@@ -151,7 +151,7 @@ acer_init(const device_t *info, void *arg)
 		pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
 		pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
 
-		device_add(&memregs_powermate_device);
+		device_add(&memregs_ed_device);
 
 		device_add(&i430hx_device);
 		device_add(&piix3_device);
@@ -174,7 +174,7 @@ acer_init(const device_t *info, void *arg)
 		pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
 		pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
 
-		device_add(&memregs_powermate_device);
+		device_add(&memregs_ed_device);
 
 		device_add(&i430fx_device);
 		device_add(&piix3_device);

src/machines/m_aopen.c

@@ -8,7 +8,7 @@
  *
  *		Implementation of various A/Open mainboards.
  *
- * Version:	@(#)m_aopen.c	1.0.2	2019/05/13
+ * Version:	@(#)m_aopen.c	1.0.3	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -81,12 +81,10 @@ common_init(const device_t *info, void *arg)
 		pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
 		pci_register_slot(0x06, PCI_CARD_ONBOARD, 1, 2, 3, 4);
 
-		device_add(&memregs_device);
-		device_add(&memregs_powermate_device);
-
 		device_add(&i430hx_device);
 		device_add(&piix3_device);
 		device_add(&intel_flash_bxt_device);
+		device_add(&memregs_eb_device);
 
 		m_at_common_init();
 

src/machines/m_asus.c

@@ -8,7 +8,7 @@
  *
  *		Implementation of several ASUS mainboards.
  *
- * Version:	@(#)m_asus.c	1.0.2	2019/05/13
+ * Version:	@(#)m_asus.c	1.0.3	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -77,11 +77,10 @@ common_init(const device_t *info, void *arg)
 		pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
 		pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
 
-		device_add(&memregs_device);
-
 		device_add(&i430fx_device);
 		device_add(&piix_device);
 		device_add(&intel_flash_bxt_device);
+		device_add(&memregs_ffff_device);
 
 		m_at_common_init();
 
@@ -99,11 +98,10 @@ common_init(const device_t *info, void *arg)
 		pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
 		pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
 
-		device_add(&memregs_device);
-
 		device_add(&i430hx_device);
 		device_add(&piix3_device);
 		device_add(&intel_flash_bxt_device);
+		device_add(&memregs_ffff_device);
 
 		m_at_common_init();
 
@@ -121,11 +119,10 @@ common_init(const device_t *info, void *arg)
 		pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
 		pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
 
-		device_add(&memregs_device);
-
 		device_add(&i430vx_device);
 		device_add(&piix3_device);
 		device_add(&intel_flash_bxt_device);
+		device_add(&memregs_ffff_device);
 
 		m_at_common_init();
 

src/machines/m_misc.c

@@ -8,7 +8,7 @@
  *
  *		Implementation of various systems and mainboards.
  *
- * Version:	@(#)m_misc.c	1.0.2	2019/05/13
+ * Version:	@(#)m_misc.c	1.0.3	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -80,12 +80,12 @@ common_init(const device_t *info, void *arg)
 		pci_register_slot(0x13, PCI_CARD_NORMAL, 4, 1, 2, 3);
 		pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
 
-		device_add(&memregs_device);
-
 		device_add(&i430vx_device);
 		device_add(&piix3_device);
 		device_add(&intel_flash_bxt_device);
 
+		device_add(&memregs_eb_device);
+
 		m_at_common_init();
 
 		device_add(&um8669f_device);
@@ -106,6 +106,8 @@ common_init(const device_t *info, void *arg)
 		device_add(&piix_device);
 		device_add(&intel_flash_bxt_device);
 
+		device_add(&memregs_eb_device);
+
 		m_at_common_init();
 
 		device_add(&fdc37c665_device);
@@ -122,7 +124,7 @@ common_init(const device_t *info, void *arg)
 		pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
 		pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
 
-		device_add(&memregs_device);
+		device_add(&memregs_eb_device);
 
 		device_add(&i430fx_device);
 		device_add(&piix_device);
@@ -148,6 +150,8 @@ common_init(const device_t *info, void *arg)
 		device_add(&piix3_device);
 		device_add(&intel_flash_bxt_device);
 
+		device_add(&memregs_eb_device);
+
 		m_at_common_init();
 
 		device_add(&fdc37c932fr_device);
@@ -167,6 +171,8 @@ common_init(const device_t *info, void *arg)
 		device_add(&piix3_device);
 		device_add(&intel_flash_bxt_device);
 
+		device_add(&memregs_eb_device);
+
 		m_at_common_init();
 
 		device_add(&fdc37c669_device);
@@ -183,8 +189,7 @@ common_init(const device_t *info, void *arg)
 		pci_register_slot(0x11, PCI_CARD_NORMAL, 2, 3, 4, 1);
 		pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
 
-		device_add(&memregs_device);
+		device_add(&memregs_eb_device);
-		device_add(&memregs_powermate_device);
 
 		device_add(&i430hx_device);
 		device_add(&piix3_device);

src/machines/m_opti495.c

@@ -8,7 +8,7 @@
  *
  *		Implementation of the Opti 82C495 based machines.
  *
- * Version:	@(#)m_opti495.c	1.0.12	2019/05/13
+ * Version:	@(#)m_opti495.c	1.0.13	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -46,6 +46,7 @@
 #include "../mem.h"
 #include "../rom.h"
 #include "../device.h"
+#include "../devices/system/memregs.h"
 #include "../devices/chipsets/opti495.h"
 #include "../devices/input/keyboard.h"
 #include "../devices/floppy/fdd.h"
@@ -71,6 +72,7 @@ common_init(const device_t *info, void *arg)
 		break;
 
 	case 1:		/* Generic with Award BIOS */
+		device_add(&memregs_device);
 		device_add(&keyboard_at_device);
 		break;
 

src/machines/m_pbell.c

@@ -15,7 +15,7 @@
  *		_MUST_ enable the Internal mouse, or the PS/2 mouse as
  *		this is onboard. There is a jumper for this as well.
  *
- * Version:	@(#)m_pbell.c	1.0.4	2019/05/13
+ * Version:	@(#)m_pbell.c	1.0.5	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -104,7 +104,7 @@ common_init(const device_t *info, void *arg)
 		device_add(&acc2168_device);
 		io_sethandler(0x0078, 1,
 			      port78_read,NULL,NULL, NULL,NULL,NULL, NULL);	
-		device_add(&memregs_device);
+		device_add(&memregs_ed_device);
 		m_at_common_ide_init();
 		device_add(&keyboard_ps2_device);
 		device_add(&acc3221_device);

src/machines/m_ps1.c

@@ -22,7 +22,7 @@
  *		The reserved 384K is remapped to the top of extended memory.
  *		If this is not done then you get an error on startup.
  *
- * Version:	@(#)m_ps1.c	1.0.29	2019/05/13
+ * Version:	@(#)m_ps1.c	1.0.30	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -68,6 +68,7 @@
 #include "../devices/system/pic.h"
 #include "../devices/system/pit.h"
 #include "../devices/system/nmi.h"
+#include "../devices/system/memregs.h"
 #include "../devices/ports/game.h"
 #include "../devices/ports/parallel.h"
 #include "../devices/ports/serial.h"
@@ -568,6 +569,8 @@ ps1_init(const device_t *info, void *arg)
 	/* Enable the builtin IDE port. */
 	device_add(&ide_isa_device);
 
+	device_add(&memregs_ed_device);
+
 	nmi_mask = 0x80;
     }
 

src/machines/m_sis471.c

@@ -8,7 +8,7 @@
  *
  *		Emulation of the SiS 85c471 based machines.
  *
- * Version:	@(#)m_sis471.c	1.0.15	2019/05/13
+ * Version:	@(#)m_sis471.c	1.0.16	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -57,6 +57,8 @@ common_init(const device_t *info, void *arg)
 
     device_add(&sis_85c471_device);
 
+    device_add(&memregs_device);
+
     switch(info->local) {
 	default:
 		m_at_ide_init();
@@ -65,8 +67,6 @@ common_init(const device_t *info, void *arg)
 
     device_add(&fdc_at_device);
 
-    device_add(&memregs_device);
-
     return((priv_t)arg);
 }
 

src/machines/m_sis496.c

@@ -8,7 +8,7 @@
  *
  *		Implementation of the SiS 85C496/497 based machines.
  *
- * Version:	@(#)m_sis49x.c	1.0.12	2019/05/13
+ * Version:	@(#)m_sis49x.c	1.0.13	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -99,9 +99,8 @@ common_init(const device_t *info, void *arg)
 		pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
 		pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
 
-		device_add(&memregs_device);
-
 		device_add(&sis_85c496_device);
+		device_add(&memregs_eb_device);
 		m_at_common_init();
 		device_add(&keyboard_ps2_pci_device);
 		device_add(&ide_pci_device);

src/machines/m_tyan.c

@@ -27,7 +27,7 @@
  *		As stated above, it is hoped that by re-adding these, more
  *		testing will get done so they can be 'completed' sometime.
  *
- * Version:	@(#)m_tyan.c	1.0.2	2019/05/13
+ * Version:	@(#)m_tyan.c	1.0.3	2019/05/17
  *
  * Authors:	Fred N. van Kempen, <decwiz@yahoo.com>
  *		Miran Grca, <mgrca8@gmail.com>
@@ -100,9 +100,9 @@ common_init(const device_t *info, void *arg)
 		device_add(&i440fx_device);
 		device_add(&piix3_device);
 		device_add(&intel_flash_bxt_device);
+		device_add(&memregs_eb_ffff_device);
 		m_at_common_init();
 		device_add(&keyboard_ps2_pci_device);
-		device_add(&memregs_device);
 
 		device_add(&fdc37c669_device);
 		break;
@@ -121,9 +121,9 @@ common_init(const device_t *info, void *arg)
 		device_add(&i440fx_device);
 		device_add(&piix3_device);
 		device_add(&intel_flash_bxt_device);
+		device_add(&memregs_eb_ffff_device);
 		m_at_common_init();
 		device_add(&keyboard_ps2_ami_pci_device);
-		device_add(&memregs_device);
 
 		device_add(&fdc37c665_device);
 		break;