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Updated the HT216 video driver.

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Changed the NVR code [again]- main code no longer clears, the AT side initializes the RAM bytes to FFs.
This commit is contained in:
waltje
2019-05-06 15:53:50 -05:00
parent 9cd057bf9e
commit 683b72c974
3 changed files with 31 additions and 27 deletions
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6
src/devices/system/nvr_at.c
View File

@@ -640,6 +640,9 @@ nvr_start(nvr_t *nvr)
nvr_time_set(&tm); nvr_time_set(&tm);
} }
/* Mark the battery as Good. */
nvr->regs[RTC_REGD] |= REGD_VRT;
/* Start the RTC. */ /* Start the RTC. */
nvr->regs[RTC_REGA] = (REGA_RS2|REGA_RS1); nvr->regs[RTC_REGA] = (REGA_RS2|REGA_RS1);
nvr->regs[RTC_REGB] = REGB_2412; nvr->regs[RTC_REGB] = REGB_2412;
@@ -693,6 +696,9 @@ nvr_at_init(const device_t *info, UNUSED(void *parent))
break; break;
} }
/* Clear the RAM bytes to FF (per DS12885/887/887A spec.) */
memset(&nvr->regs[RTC_REGS], 0xff, nvr->size - RTC_REGS);
/* Set up any local handlers here. */ /* Set up any local handlers here. */
nvr->reset = nvr_reset; nvr->reset = nvr_reset;
nvr->start = nvr_start; nvr->start = nvr_start;

45
src/devices/video/vid_ht216.c
View File

@@ -97,9 +97,12 @@ typedef struct {
int ext_reg_enable; int ext_reg_enable;
int clk_sel; int clk_sel;
uint8_t read_bank_reg[2], write_bank_reg[2]; uint8_t read_bank_reg[2],
uint32_t read_bank[2], write_bank[2]; write_bank_reg[2];
uint8_t misc, pad; uint32_t read_bank[2],
write_bank[2];
uint8_t misc,
pad;
uint16_t id; uint16_t id;
uint8_t bg_latch[8]; uint8_t bg_latch[8];
@@ -108,7 +111,7 @@ typedef struct {
} ht216_t; } ht216_t;
static video_timings_t timing_v7vga = {VID_ISA,5,5,9,20,20,30}; static const video_timings_t v7vga_timings = {VID_ISA,5,5,9,20,20,30};
@@ -412,8 +415,6 @@ ht216_out(uint16_t addr, uint8_t val, void *priv)
break; break;
case 0x46e8: case 0x46e8:
if (dev->id != 0x7861) break;
io_removehandler(0x03c0, 32, io_removehandler(0x03c0, 32,
ht216_in,NULL,NULL, ht216_out,NULL,NULL, dev); ht216_in,NULL,NULL, ht216_out,NULL,NULL, dev);
mem_map_disable(&dev->svga.mapping); mem_map_disable(&dev->svga.mapping);
@@ -631,7 +632,7 @@ ht216_write(uint32_t addr, uint8_t val, void *priv)
if (dev->ht_regs[0xcd]) if (dev->ht_regs[0xcd])
write_common(dev, addr, val); write_common(dev, addr, val);
else else
svga_write_linear(addr, val, &dev->svga); svga_write_linear(addr, val, svga);
} }
@@ -648,7 +649,7 @@ ht216_writew(uint32_t addr, uint16_t val, void *priv)
write_common(dev, addr, val & 0xff); write_common(dev, addr, val & 0xff);
write_common(dev, addr+1, val >> 8); write_common(dev, addr+1, val >> 8);
} else } else
svga_writew_linear(addr, val, &dev->svga); svga_writew_linear(addr, val, svga);
} }
@@ -662,12 +663,12 @@ ht216_writel(uint32_t addr, uint32_t val, void *priv)
addr = (addr & 0x7fff) + dev->write_bank[(addr >> 15) & 1]; addr = (addr & 0x7fff) + dev->write_bank[(addr >> 15) & 1];
if (dev->ht_regs[0xcd]) { if (dev->ht_regs[0xcd]) {
write_common(dev, addr, val); write_common(dev, addr, val & 0xff);
write_common(dev, addr+1, val >> 8); write_common(dev, addr+1, val >> 8);
write_common(dev, addr+2, val >> 16); write_common(dev, addr+2, val >> 16);
write_common(dev, addr+3, val >> 24); write_common(dev, addr+3, val >> 24);
} else } else
svga_writel_linear(addr, val, &dev->svga); svga_writel_linear(addr, val, svga);
} }
@@ -683,7 +684,7 @@ write_linear(uint32_t addr, uint8_t val, void *priv)
if (dev->ht_regs[0xcd]) if (dev->ht_regs[0xcd])
write_common(dev, addr, val); write_common(dev, addr, val);
else else
svga_write_linear(addr, val, &dev->svga); svga_write_linear(addr, val, svga);
} }
@@ -700,7 +701,7 @@ writew_linear(uint32_t addr, uint16_t val, void *priv)
write_common(dev, addr, val & 0xff); write_common(dev, addr, val & 0xff);
write_common(dev, addr+1, val >> 8); write_common(dev, addr+1, val >> 8);
} else } else
svga_writew_linear(addr, val, &dev->svga); svga_writew_linear(addr, val, svga);
} }
@@ -714,12 +715,12 @@ writel_linear(uint32_t addr, uint32_t val, void *priv)
addr = (addr & 0xffff) | ((addr & 0xc0000) >> 2); addr = (addr & 0xffff) | ((addr & 0xc0000) >> 2);
if (dev->ht_regs[0xcd]) { if (dev->ht_regs[0xcd]) {
write_common(dev, addr, val); write_common(dev, addr, val & 0xff);
write_common(dev, addr+1, val >> 8); write_common(dev, addr+1, val >> 8);
write_common(dev, addr+2, val >> 16); write_common(dev, addr+2, val >> 16);
write_common(dev, addr+3, val >> 24); write_common(dev, addr+3, val >> 24);
} else } else
svga_writel_linear(addr, val, &dev->svga); svga_writel_linear(addr, val, svga);
} }
@@ -882,8 +883,6 @@ ht216_init(const device_t *info, UNUSED(void *parent))
break; break;
case 0x7861: /* Packard-Bell 410A On-Board */ case 0x7861: /* Packard-Bell 410A On-Board */
io_sethandler(0x46e8, 1,
ht216_in,NULL,NULL, ht216_out,NULL,NULL, dev);
vram_sz = (1 << 20); vram_sz = (1 << 20);
break; break;
} }
@@ -893,6 +892,8 @@ ht216_init(const device_t *info, UNUSED(void *parent))
io_sethandler(0x03c0, 32, io_sethandler(0x03c0, 32,
ht216_in,NULL,NULL, ht216_out,NULL,NULL, dev); ht216_in,NULL,NULL, ht216_out,NULL,NULL, dev);
io_sethandler(0x46e8, 1,
ht216_in,NULL,NULL, ht216_out,NULL,NULL, dev);
if (info->path != NULL) if (info->path != NULL)
rom_init(&dev->bios_rom, info->path, rom_init(&dev->bios_rom, info->path,
@@ -906,17 +907,17 @@ ht216_init(const device_t *info, UNUSED(void *parent))
svga->bpp = 8; svga->bpp = 8;
svga->miscout = 1; svga->miscout = 1;
mem_map_set_handler(&dev->svga.mapping, mem_map_set_handler(&svga->mapping,
ht216_read,NULL,NULL, ht216_read,NULL,NULL,
ht216_write,ht216_writew,ht216_writel); ht216_write,ht216_writew,ht216_writel);
mem_map_set_p(&dev->svga.mapping, dev); mem_map_set_p(&svga->mapping, dev);
mem_map_add(&dev->linear_mapping, 0, 0, mem_map_add(&dev->linear_mapping, 0, 0,
read_linear,NULL,NULL, read_linear,NULL,NULL,
write_linear,writew_linear,writel_linear, write_linear,writew_linear,writel_linear,
NULL, 0, &dev->svga); NULL, 0, svga);
video_inform(VID_TYPE_SPEC, &timing_v7vga); video_inform(VID_TYPE_SPEC, &v7vga_timings);
return(dev); return(dev);
} }
@@ -963,7 +964,7 @@ static const device_config_t v7_vga_1024i_config[] = {
const device_t video7_vga_1024i_device = { const device_t video7_vga_1024i_device = {
"Video7 VGA 1024i", "Video7 VGA 1024i",
DEVICE_ISA, DEVICE_VIDEO(VID_TYPE_SPEC) | DEVICE_ISA,
0x7010, 0x7010,
BIOS_VIDEO7_VGA_1024I_PATH, BIOS_VIDEO7_VGA_1024I_PATH,
ht216_init, ht216_close, NULL, ht216_init, ht216_close, NULL,
@@ -976,7 +977,7 @@ const device_t video7_vga_1024i_device = {
const device_t ht216_32_pb410a_device = { const device_t ht216_32_pb410a_device = {
"Headland HT216-32 (Packard Bell PB410A)", "Headland HT216-32 (Packard Bell PB410A)",
DEVICE_ISA, DEVICE_VIDEO(VID_TYPE_SPEC) | DEVICE_ISA,
0x7861, /*HT216-32*/ 0x7861, /*HT216-32*/
NULL, NULL,
ht216_init, ht216_close, NULL, ht216_init, ht216_close, NULL,

7
src/nvr.c
View File

@@ -8,7 +8,7 @@
* *
* Implement a generic NVRAM/CMOS/RTC device. * Implement a generic NVRAM/CMOS/RTC device.
* *
* Version: @(#)nvr.c 1.0.18 2019/05/03 * Version: @(#)nvr.c 1.0.19 2019/05/05
* *
* Author: Fred N. van Kempen, <decwiz@yahoo.com> * Author: Fred N. van Kempen, <decwiz@yahoo.com>
* *
@@ -137,7 +137,6 @@ onesec_timer(void *priv)
} }
/* Get current time from internal clock. */
/* Initialize the generic NVRAM/RTC device. */ /* Initialize the generic NVRAM/RTC device. */
void void
nvr_init(nvr_t *nvr) nvr_init(nvr_t *nvr)
@@ -275,9 +274,6 @@ nvr_load(void)
/* Make sure we have been initialized. */ /* Make sure we have been initialized. */
if (saved_nvr == NULL) return(0); if (saved_nvr == NULL) return(0);
/* Clear out any old data. NVR is RAM, so zero it. */
memset(saved_nvr->regs, 0x00, sizeof(saved_nvr->regs));
/* Set the defaults. */ /* Set the defaults. */
if (saved_nvr->reset != NULL) if (saved_nvr->reset != NULL)
saved_nvr->reset(saved_nvr); saved_nvr->reset(saved_nvr);
@@ -330,6 +326,7 @@ nvr_save(void)
} }
/* Get current time from internal clock. */
void void
nvr_time_get(struct tm *tm) nvr_time_get(struct tm *tm)
{ {