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waltje
288
src/disk/hdc_xtide.c
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288
src/disk/hdc_xtide.c
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/*
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* VARCem Virtual Archaelogical Computer EMulator.
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* An emulator of (mostly) x86-based PC systems and devices,
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* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
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* spanning the era between 1981 and 1995.
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*
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* This file is part of the VARCem Project.
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*
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* XT-IDE controller emulation.
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*
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* The XT-IDE project is intended to allow 8-bit ("XT") systems
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* to use regular IDE drives. IDE is a standard based on the
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* 16b PC/AT design, and so a special board (with its own BIOS)
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* had to be created for this.
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*
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* XT-IDE is *NOT* the same as XTA, or X-IDE, which is an older
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* standard where the actual MFM/RLL controller for the PC/XT
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* was placed on the hard drive (hard drives where its drive
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* type would end in "X" or "XT", such as the 8425XT.) This was
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* more or less the original IDE, but since those systems were
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* already on their way out, the newer IDE standard based on the
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* PC/AT controller and 16b design became the IDE we now know.
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*
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* Version: @(#)hdc_xtide.c 1.0.1 2018/02/14
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*
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* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
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* Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2017,2018 Fred N. van Kempen.
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* Copyright 2016-2018 Miran Grca.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the:
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*
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* Free Software Foundation, Inc.
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* 59 Temple Place - Suite 330
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* Boston, MA 02111-1307
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* USA.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <stdlib.h>
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#include <wchar.h>
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#include "../emu.h"
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#include "../io.h"
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#include "../mem.h"
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#include "../rom.h"
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#include "../device.h"
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#include "hdc.h"
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#include "hdc_ide.h"
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#define ROM_PATH_XT L"roms/hdd/xtide/ide_xt.bin"
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#define ROM_PATH_AT L"roms/hdd/xtide/ide_at.bin"
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#define ROM_PATH_PS2 L"roms/hdd/xtide/SIDE1V12.BIN"
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#define ROM_PATH_PS2AT L"roms/hdd/xtide/ide_at_1_1_5.bin"
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typedef struct {
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uint8_t data_high;
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rom_t bios_rom;
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} xtide_t;
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static void
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xtide_write(uint16_t port, uint8_t val, void *priv)
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{
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xtide_t *xtide = (xtide_t *)priv;
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switch (port & 0xf) {
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case 0x0:
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writeidew(4, val | (xtide->data_high << 8));
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return;
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case 0x1:
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case 0x2:
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case 0x3:
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case 0x4:
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case 0x5:
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case 0x6:
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case 0x7:
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writeide(4, (port & 0xf) | 0x1f0, val);
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return;
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case 0x8:
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xtide->data_high = val;
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return;
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case 0xe:
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writeide(4, 0x3f6, val);
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return;
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}
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}
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static uint8_t
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xtide_read(uint16_t port, void *priv)
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{
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xtide_t *xtide = (xtide_t *)priv;
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uint16_t tempw = 0xffff;
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switch (port & 0xf) {
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case 0x0:
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tempw = readidew(4);
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xtide->data_high = tempw >> 8;
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break;
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case 0x1:
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case 0x2:
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case 0x3:
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case 0x4:
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case 0x5:
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case 0x6:
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case 0x7:
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tempw = readide(4, (port & 0xf) | 0x1f0);
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break;
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case 0x8:
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tempw = xtide->data_high;
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break;
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case 0xe:
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tempw = readide(4, 0x3f6);
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break;
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default:
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break;
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}
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return(tempw & 0xff);
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}
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static void *
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xtide_init(device_t *info)
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{
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xtide_t *xtide = malloc(sizeof(xtide_t));
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memset(xtide, 0x00, sizeof(xtide_t));
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rom_init(&xtide->bios_rom, ROM_PATH_XT,
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0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
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ide_xtide_init();
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io_sethandler(0x0300, 16,
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xtide_read, NULL, NULL,
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xtide_write, NULL, NULL, xtide);
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return(xtide);
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}
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static int
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xtide_available(void)
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{
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return(rom_present(ROM_PATH_XT));
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}
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static void *
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xtide_at_init(device_t *info)
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{
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xtide_t *xtide = malloc(sizeof(xtide_t));
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memset(xtide, 0x00, sizeof(xtide_t));
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rom_init(&xtide->bios_rom, ROM_PATH_AT,
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0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
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device_add(&ide_isa_2ch_device);
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return(xtide);
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}
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static int
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xtide_at_available(void)
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{
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return(rom_present(ROM_PATH_AT));
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}
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static void *
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xtide_acculogic_init(device_t *info)
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{
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xtide_t *xtide = malloc(sizeof(xtide_t));
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memset(xtide, 0x00, sizeof(xtide_t));
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rom_init(&xtide->bios_rom, ROM_PATH_PS2,
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0xc8000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
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ide_xtide_init();
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io_sethandler(0x0360, 16,
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xtide_read, NULL, NULL,
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xtide_write, NULL, NULL, xtide);
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return(xtide);
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}
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static int
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xtide_acculogic_available(void)
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{
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return(rom_present(ROM_PATH_PS2));
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}
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static void *
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xtide_at_ps2_init(device_t *info)
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{
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xtide_t *xtide = malloc(sizeof(xtide_t));
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memset(xtide, 0x00, sizeof(xtide_t));
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rom_init(&xtide->bios_rom, ROM_PATH_PS2AT,
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0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
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device_add(&ide_isa_2ch_device);
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return(xtide);
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}
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static int
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xtide_at_ps2_available(void)
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{
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return(rom_present(ROM_PATH_PS2AT));
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}
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static void
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xtide_close(void *priv)
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{
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xtide_t *xtide = (xtide_t *)priv;
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free(xtide);
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}
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device_t xtide_device = {
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"XTIDE",
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DEVICE_ISA,
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0,
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xtide_init, xtide_close, NULL,
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xtide_available, NULL, NULL, NULL,
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NULL
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};
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device_t xtide_at_device = {
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"XTIDE (AT)",
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DEVICE_ISA | DEVICE_AT,
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0,
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xtide_at_init, xtide_close, NULL,
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xtide_at_available, NULL, NULL, NULL,
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NULL
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};
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device_t xtide_acculogic_device = {
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"XTIDE (Acculogic)",
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DEVICE_ISA,
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0,
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xtide_acculogic_init, xtide_close, NULL,
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xtide_acculogic_available, NULL, NULL, NULL,
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NULL
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};
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device_t xtide_at_ps2_device = {
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"XTIDE (AT) (1.1.5)",
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DEVICE_ISA | DEVICE_PS2,
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0,
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xtide_at_ps2_init, xtide_close, NULL,
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xtide_at_ps2_available, NULL, NULL, NULL,
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NULL
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};
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