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waltje
282
src/mem.h
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282
src/mem.h
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/*
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* VARCem Virtual Archaelogical Computer EMulator.
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* An emulator of (mostly) x86-based PC systems and devices,
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* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
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* spanning the era between 1981 and 1995.
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*
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* This file is part of the VARCem Project.
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*
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* Definitions for the memory interface.
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*
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* Version: @(#)mem.h 1.0.1 2018/02/14
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*
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* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
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* Sarah Walker, <tommowalker@tommowalker.co.uk>
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*
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* Copyright 2017,2018 Fred N. van Kempen.
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* Copyright 2008-2018 Sarah Walker.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the:
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*
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* Free Software Foundation, Inc.
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* 59 Temple Place - Suite 330
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* Boston, MA 02111-1307
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* USA.
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*/
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#ifndef EMU_MEM_H
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# define EMU_MEM_H
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extern uint8_t *ram;
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extern uint32_t rammask;
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extern int readlookup[256],readlookupp[256];
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extern uintptr_t *readlookup2;
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extern int readlnext;
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extern int writelookup[256],writelookupp[256];
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extern uintptr_t *writelookup2;
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extern int writelnext;
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extern int mmu_perm;
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#define readmemb(a) ((readlookup2[(a)>>12]==-1)?readmembl(a):*(uint8_t *)(readlookup2[(a) >> 12] + (a)))
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#define readmemw(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a)) & 1))?readmemwl(s,a):*(uint16_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a))))
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#define readmeml(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a)) & 3))?readmemll(s,a):*(uint32_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a))))
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extern uint8_t readmembl(uint32_t addr);
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extern void writemembl(uint32_t addr, uint8_t val);
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extern uint8_t readmemb386l(uint32_t seg, uint32_t addr);
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extern void writememb386l(uint32_t seg, uint32_t addr, uint8_t val);
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extern uint16_t readmemwl(uint32_t seg, uint32_t addr);
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extern void writememwl(uint32_t seg, uint32_t addr, uint16_t val);
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extern uint32_t readmemll(uint32_t seg, uint32_t addr);
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extern void writememll(uint32_t seg, uint32_t addr, uint32_t val);
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extern uint64_t readmemql(uint32_t seg, uint32_t addr);
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extern void writememql(uint32_t seg, uint32_t addr, uint64_t val);
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extern uint8_t *getpccache(uint32_t a);
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extern uint32_t mmutranslatereal(uint32_t addr, int rw);
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extern void addreadlookup(uint32_t virt, uint32_t phys);
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extern void addwritelookup(uint32_t virt, uint32_t phys);
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extern int shadowbios,shadowbios_write;
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extern int readlnum,writelnum;
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typedef struct mem_mapping_t
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{
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struct mem_mapping_t *prev, *next;
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int enable;
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uint32_t base;
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uint32_t size;
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uint8_t (*read_b)(uint32_t addr, void *priv);
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uint16_t (*read_w)(uint32_t addr, void *priv);
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uint32_t (*read_l)(uint32_t addr, void *priv);
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void (*write_b)(uint32_t addr, uint8_t val, void *priv);
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void (*write_w)(uint32_t addr, uint16_t val, void *priv);
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void (*write_l)(uint32_t addr, uint32_t val, void *priv);
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uint8_t *exec;
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uint32_t flags;
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void *p;
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} mem_mapping_t;
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/*Only present on external bus (ISA/PCI)*/
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#define MEM_MAPPING_EXTERNAL 1
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/*Only present on internal bus (RAM)*/
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#define MEM_MAPPING_INTERNAL 2
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extern uint8_t *ram,*rom;
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extern uint8_t romext[32768];
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extern int readlnum,writelnum;
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extern int memspeed[11];
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extern int nopageerrors;
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extern uint32_t biosmask;
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extern unsigned char isram[0x10000];
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#define MEM_MAP_TO_SHADOW_RAM_MASK 1
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#define MEM_MAP_TO_RAM_ADDR_MASK 2
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extern uint32_t ram_mapped_addr[64];
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void mem_mapping_add(mem_mapping_t *mapping,
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uint32_t base,
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uint32_t size,
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uint8_t (*read_b)(uint32_t addr, void *p),
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uint16_t (*read_w)(uint32_t addr, void *p),
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uint32_t (*read_l)(uint32_t addr, void *p),
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void (*write_b)(uint32_t addr, uint8_t val, void *p),
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void (*write_w)(uint32_t addr, uint16_t val, void *p),
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void (*write_l)(uint32_t addr, uint32_t val, void *p),
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uint8_t *exec,
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uint32_t flags,
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void *p);
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void mem_mapping_set_handler(mem_mapping_t *mapping,
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uint8_t (*read_b)(uint32_t addr, void *p),
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uint16_t (*read_w)(uint32_t addr, void *p),
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uint32_t (*read_l)(uint32_t addr, void *p),
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void (*write_b)(uint32_t addr, uint8_t val, void *p),
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void (*write_w)(uint32_t addr, uint16_t val, void *p),
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void (*write_l)(uint32_t addr, uint32_t val, void *p));
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void mem_mapping_set_p(mem_mapping_t *mapping, void *p);
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void mem_mapping_set_addr(mem_mapping_t *mapping, uint32_t base, uint32_t size);
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void mem_mapping_set_exec(mem_mapping_t *mapping, uint8_t *exec);
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void mem_mapping_disable(mem_mapping_t *mapping);
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void mem_mapping_enable(mem_mapping_t *mapping);
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void mem_set_mem_state(uint32_t base, uint32_t size, int state);
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#define MEM_READ_ANY 0x00
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#define MEM_READ_INTERNAL 0x10
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#define MEM_READ_EXTERNAL 0x20
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#define MEM_READ_MASK 0xf0
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#define MEM_WRITE_ANY 0x00
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#define MEM_WRITE_INTERNAL 0x01
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#define MEM_WRITE_EXTERNAL 0x02
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#define MEM_WRITE_DISABLED 0x03
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#define MEM_WRITE_MASK 0x0f
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extern int mem_a20_state;
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extern int mem_a20_alt;
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extern int mem_a20_key;
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void mem_a20_recalc();
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uint8_t mem_readb_phys(uint32_t addr);
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uint8_t mem_readb_phys_dma(uint32_t addr);
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uint16_t mem_readw_phys(uint32_t addr);
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void mem_writeb_phys(uint32_t addr, uint8_t val);
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void mem_writeb_phys_dma(uint32_t addr, uint8_t val);
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void mem_writew_phys(uint32_t addr, uint16_t val);
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uint8_t mem_read_ram(uint32_t addr, void *priv);
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uint16_t mem_read_ramw(uint32_t addr, void *priv);
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uint32_t mem_read_raml(uint32_t addr, void *priv);
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void mem_write_ram(uint32_t addr, uint8_t val, void *priv);
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void mem_write_ramw(uint32_t addr, uint16_t val, void *priv);
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void mem_write_raml(uint32_t addr, uint32_t val, void *priv);
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uint8_t mem_read_bios(uint32_t addr, void *priv);
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uint16_t mem_read_biosw(uint32_t addr, void *priv);
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uint32_t mem_read_biosl(uint32_t addr, void *priv);
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void mem_write_null(uint32_t addr, uint8_t val, void *p);
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void mem_write_nullw(uint32_t addr, uint16_t val, void *p);
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void mem_write_nulll(uint32_t addr, uint32_t val, void *p);
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mem_mapping_t bios_mapping[8];
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mem_mapping_t bios_high_mapping[8];
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mem_mapping_t romext_mapping;
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extern mem_mapping_t ram_high_mapping;
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typedef struct page_t
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{
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void (*write_b)(uint32_t addr, uint8_t val, struct page_t *p);
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void (*write_w)(uint32_t addr, uint16_t val, struct page_t *p);
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void (*write_l)(uint32_t addr, uint32_t val, struct page_t *p);
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uint8_t *mem;
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struct codeblock_t *block[4], *block_2[4];
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/*Head of codeblock tree associated with this page*/
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struct codeblock_t *head;
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uint64_t code_present_mask[4], dirty_mask[4];
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} page_t;
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extern page_t *pages;
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extern page_t **page_lookup;
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uint32_t mmutranslate_noabrt(uint32_t addr, int rw);
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extern uint32_t get_phys_virt,get_phys_phys;
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#ifdef EMU_CPU_H
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static __inline uint32_t get_phys(uint32_t addr)
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{
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if (!((addr ^ get_phys_virt) & ~0xfff))
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return get_phys_phys | (addr & 0xfff);
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get_phys_virt = addr;
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if (!(cr0 >> 31))
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{
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get_phys_phys = (addr & rammask) & ~0xfff;
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return addr & rammask;
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}
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get_phys_phys = (mmutranslatereal(addr, 0) & rammask) & ~0xfff;
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return get_phys_phys | (addr & 0xfff);
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/* return mmutranslatereal(addr, 0) & rammask; */
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}
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static __inline uint32_t get_phys_noabrt(uint32_t addr)
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{
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if (!(cr0 >> 31))
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return addr & rammask;
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return mmutranslate_noabrt(addr, 0) & rammask;
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}
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#endif
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void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr);
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extern uint32_t mem_logical_addr;
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void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p);
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void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p);
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void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p);
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void mem_flush_write_page(uint32_t addr, uint32_t virt);
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extern void mem_reset_page_blocks(void);
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extern mem_mapping_t ram_low_mapping;
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extern mem_mapping_t ram_mid_mapping;
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extern void mem_remap_top_256k(void);
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extern void mem_remap_top_384k(void);
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extern void flushmmucache(void);
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extern void flushmmucache_cr3(void);
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extern void flushmmucache_nopc(void);
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extern void mmu_invalidate(uint32_t addr);
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extern void mem_split_enable(int max_size, uint32_t addr);
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extern void mem_split_disable(int max_size, uint32_t addr);
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extern void mem_add_bios(void);
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extern void mem_init(void);
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extern void mem_resize(void);
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extern uint8_t port_92_read(uint16_t port, void *priv);
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extern void port_92_write(uint16_t port, uint8_t val, void *priv);
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extern void port_92_clear_reset(void);
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extern void port_92_add(void);
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extern void port_92_remove(void);
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extern void port_92_reset(void);
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#endif /*EMU_MEM_H*/
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