151 lines
4.4 KiB
C
151 lines
4.4 KiB
C
/*
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* VARCem Virtual ARchaeological Computer EMulator.
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* An emulator of (mostly) x86-based PC systems and devices,
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* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
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* spanning the era between 1981 and 1995.
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*
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* This file is part of the VARCem Project.
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*
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* Definitions for the SERIAL card.
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*
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* Version: @(#)serial.h 1.0.1 2018/02/14
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*
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* Author: Fred N. van Kempen, <decwiz@yahoo.com>
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*
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* Copyright 2017,2018 Fred N. van Kempen.
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*
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* Redistribution and use in source and binary forms, with
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* or without modification, are permitted provided that the
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* following conditions are met:
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*
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* 1. Redistributions of source code must retain the entire
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* above notice, this list of conditions and the following
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* disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the
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* following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names
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* of its contributors may be used to endorse or promote
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* products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef EMU_SERIAL_H
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# define EMU_SERIAL_H
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#ifdef WALTJE_SERIAL
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/* Default settings for the standard ports. */
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#define SERIAL1_ADDR 0x03f8
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#define SERIAL1_IRQ 4
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#define SERIAL2_ADDR 0x02f8
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#define SERIAL2_IRQ 3
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/* Supported UART types. */
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#define UART_TYPE_8250 0 /* standard NS8250 */
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#define UART_TYPE_8250A 1 /* updated NS8250(A) */
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#define UART_TYPE_16450 2 /* 16450 */
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#define UART_TYPE_16550 3 /* 16550 (broken fifo) */
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#define UART_TYPE_16550A 4 /* 16550a (working fifo) */
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#define UART_TYPE_16670 5 /* 16670 (64b fifo) */
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typedef struct _serial_ {
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int8_t port; /* port number (1,2,..) */
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int8_t irq; /* IRQ channel used */
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uint16_t addr; /* I/O address used */
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int8_t type; /* UART type */
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uint8_t int_status;
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uint8_t lsr, thr, mctrl, rcr, /* UART registers */
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iir, ier, lcr, msr;
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uint8_t dlab1, dlab2;
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uint8_t dat,
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hold;
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uint8_t scratch;
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uint8_t fcr;
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/* Data for the RTS-toggle callback. */
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void (*rts_callback)(void *);
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void *rts_callback_p;
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uint8_t fifo[256];
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int fifo_read, fifo_write;
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int64_t receive_delay;
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void *bh; /* BottomHalf handler */
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} SERIAL;
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/* Functions. */
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extern void serial_init(void);
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extern void serial_reset(void);
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extern void serial_setup(int port, uint16_t addr, int irq);
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extern void serial_remove(int port);
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extern SERIAL *serial_attach(int, void *, void *);
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extern int serial_link(int, char *);
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extern void serial_clear_fifo(SERIAL *);
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extern void serial_write_fifo(SERIAL *, uint8_t, int);
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#else
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void serial_remove(int port);
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void serial_setup(int port, uint16_t addr, int irq);
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void serial_init(void);
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void serial_reset();
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struct SERIAL;
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typedef struct
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{
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uint8_t lsr,thr,mctrl,rcr,iir,ier,lcr,msr;
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uint8_t dlab1,dlab2;
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uint8_t dat;
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uint8_t int_status;
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uint8_t scratch;
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uint8_t fcr;
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int irq;
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void (*rcr_callback)(struct SERIAL *serial, void *p);
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void *rcr_callback_p;
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uint8_t fifo[256];
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int fifo_read, fifo_write;
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int64_t recieve_delay;
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} SERIAL;
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void serial_clear_fifo(SERIAL *);
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void serial_write_fifo(SERIAL *serial, uint8_t dat);
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extern SERIAL serial1, serial2;
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/* Default settings for the standard ports. */
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#define SERIAL1_ADDR 0x03f8
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#define SERIAL1_IRQ 4
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#define SERIAL2_ADDR 0x02f8
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#define SERIAL2_IRQ 3
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#endif
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#endif /*EMU_SERIAL_H*/
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