Remove union data from FLAC__CPUInfo.

Before this patch it was possible to set or get data.ia32.sse3 value
from x86-64 code, etc which is a potential source of errors.

Patch-from: lvqcl <lvqcl.mail@gmail.com>
This commit is contained in:
Erik de Castro Lopo
2013-09-25 23:07:42 +10:00
parent 8fe2c23e31
commit 4a78cd4e4c
4 changed files with 88 additions and 84 deletions

View File

@@ -164,68 +164,68 @@ void FLAC__cpu_info(FLAC__CPUInfo *info)
info->type = FLAC__CPUINFO_TYPE_IA32; info->type = FLAC__CPUINFO_TYPE_IA32;
#if !defined FLAC__NO_ASM && defined FLAC__HAS_NASM #if !defined FLAC__NO_ASM && defined FLAC__HAS_NASM
info->use_asm = true; /* we assume a minimum of 80386 with FLAC__CPU_IA32 */ info->use_asm = true; /* we assume a minimum of 80386 with FLAC__CPU_IA32 */
info->data.ia32.cpuid = FLAC__cpu_have_cpuid_asm_ia32()? true : false; info->ia32.cpuid = FLAC__cpu_have_cpuid_asm_ia32()? true : false;
info->data.ia32.bswap = info->data.ia32.cpuid; /* CPUID => BSWAP since it came after */ info->ia32.bswap = info->ia32.cpuid; /* CPUID => BSWAP since it came after */
info->data.ia32.cmov = false; info->ia32.cmov = false;
info->data.ia32.mmx = false; info->ia32.mmx = false;
info->data.ia32.fxsr = false; info->ia32.fxsr = false;
info->data.ia32.sse = false; info->ia32.sse = false;
info->data.ia32.sse2 = false; info->ia32.sse2 = false;
info->data.ia32.sse3 = false; info->ia32.sse3 = false;
info->data.ia32.ssse3 = false; info->ia32.ssse3 = false;
info->data.ia32.sse41 = false; info->ia32.sse41 = false;
info->data.ia32.sse42 = false; info->ia32.sse42 = false;
info->data.ia32._3dnow = false; info->ia32._3dnow = false;
info->data.ia32.ext3dnow = false; info->ia32.ext3dnow = false;
info->data.ia32.extmmx = false; info->ia32.extmmx = false;
if(info->data.ia32.cpuid) { if(info->ia32.cpuid) {
/* http://www.sandpile.org/x86/cpuid.htm */ /* http://www.sandpile.org/x86/cpuid.htm */
FLAC__uint32 flags_edx, flags_ecx; FLAC__uint32 flags_edx, flags_ecx;
FLAC__cpu_info_asm_ia32(&flags_edx, &flags_ecx); FLAC__cpu_info_asm_ia32(&flags_edx, &flags_ecx);
info->data.ia32.cmov = (flags_edx & FLAC__CPUINFO_IA32_CPUID_CMOV )? true : false; info->ia32.cmov = (flags_edx & FLAC__CPUINFO_IA32_CPUID_CMOV )? true : false;
info->data.ia32.mmx = (flags_edx & FLAC__CPUINFO_IA32_CPUID_MMX )? true : false; info->ia32.mmx = (flags_edx & FLAC__CPUINFO_IA32_CPUID_MMX )? true : false;
info->data.ia32.fxsr = (flags_edx & FLAC__CPUINFO_IA32_CPUID_FXSR )? true : false; info->ia32.fxsr = (flags_edx & FLAC__CPUINFO_IA32_CPUID_FXSR )? true : false;
info->data.ia32.sse = (flags_edx & FLAC__CPUINFO_IA32_CPUID_SSE )? true : false; info->ia32.sse = (flags_edx & FLAC__CPUINFO_IA32_CPUID_SSE )? true : false;
info->data.ia32.sse2 = (flags_edx & FLAC__CPUINFO_IA32_CPUID_SSE2 )? true : false; info->ia32.sse2 = (flags_edx & FLAC__CPUINFO_IA32_CPUID_SSE2 )? true : false;
info->data.ia32.sse3 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE3 )? true : false; info->ia32.sse3 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE3 )? true : false;
info->data.ia32.ssse3 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSSE3)? true : false; info->ia32.ssse3 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSSE3)? true : false;
info->data.ia32.sse41 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE41)? true : false; info->ia32.sse41 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE41)? true : false;
info->data.ia32.sse42 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE42)? true : false; info->ia32.sse42 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE42)? true : false;
#ifdef FLAC__USE_3DNOW #ifdef FLAC__USE_3DNOW
flags_edx = FLAC__cpu_info_extended_amd_asm_ia32(); flags_edx = FLAC__cpu_info_extended_amd_asm_ia32();
info->data.ia32._3dnow = (flags_edx & FLAC__CPUINFO_IA32_CPUID_EXTENDED_AMD_3DNOW )? true : false; info->ia32._3dnow = (flags_edx & FLAC__CPUINFO_IA32_CPUID_EXTENDED_AMD_3DNOW )? true : false;
info->data.ia32.ext3dnow = (flags_edx & FLAC__CPUINFO_IA32_CPUID_EXTENDED_AMD_EXT3DNOW)? true : false; info->ia32.ext3dnow = (flags_edx & FLAC__CPUINFO_IA32_CPUID_EXTENDED_AMD_EXT3DNOW)? true : false;
info->data.ia32.extmmx = (flags_edx & FLAC__CPUINFO_IA32_CPUID_EXTENDED_AMD_EXTMMX )? true : false; info->ia32.extmmx = (flags_edx & FLAC__CPUINFO_IA32_CPUID_EXTENDED_AMD_EXTMMX )? true : false;
#else #else
info->data.ia32._3dnow = info->data.ia32.ext3dnow = info->data.ia32.extmmx = false; info->ia32._3dnow = info->ia32.ext3dnow = info->ia32.extmmx = false;
#endif #endif
#ifdef DEBUG #ifdef DEBUG
fprintf(stderr, "CPU info (IA-32):\n"); fprintf(stderr, "CPU info (IA-32):\n");
fprintf(stderr, " CPUID ...... %c\n", info->data.ia32.cpuid ? 'Y' : 'n'); fprintf(stderr, " CPUID ...... %c\n", info->ia32.cpuid ? 'Y' : 'n');
fprintf(stderr, " BSWAP ...... %c\n", info->data.ia32.bswap ? 'Y' : 'n'); fprintf(stderr, " BSWAP ...... %c\n", info->ia32.bswap ? 'Y' : 'n');
fprintf(stderr, " CMOV ....... %c\n", info->data.ia32.cmov ? 'Y' : 'n'); fprintf(stderr, " CMOV ....... %c\n", info->ia32.cmov ? 'Y' : 'n');
fprintf(stderr, " MMX ........ %c\n", info->data.ia32.mmx ? 'Y' : 'n'); fprintf(stderr, " MMX ........ %c\n", info->ia32.mmx ? 'Y' : 'n');
fprintf(stderr, " FXSR ....... %c\n", info->data.ia32.fxsr ? 'Y' : 'n'); fprintf(stderr, " FXSR ....... %c\n", info->ia32.fxsr ? 'Y' : 'n');
fprintf(stderr, " SSE ........ %c\n", info->data.ia32.sse ? 'Y' : 'n'); fprintf(stderr, " SSE ........ %c\n", info->ia32.sse ? 'Y' : 'n');
fprintf(stderr, " SSE2 ....... %c\n", info->data.ia32.sse2 ? 'Y' : 'n'); fprintf(stderr, " SSE2 ....... %c\n", info->ia32.sse2 ? 'Y' : 'n');
fprintf(stderr, " SSE3 ....... %c\n", info->data.ia32.sse3 ? 'Y' : 'n'); fprintf(stderr, " SSE3 ....... %c\n", info->ia32.sse3 ? 'Y' : 'n');
fprintf(stderr, " SSSE3 ...... %c\n", info->data.ia32.ssse3 ? 'Y' : 'n'); fprintf(stderr, " SSSE3 ...... %c\n", info->ia32.ssse3 ? 'Y' : 'n');
fprintf(stderr, " SSE41 ...... %c\n", info->data.ia32.sse41 ? 'Y' : 'n'); fprintf(stderr, " SSE41 ...... %c\n", info->ia32.sse41 ? 'Y' : 'n');
fprintf(stderr, " SSE42 ...... %c\n", info->data.ia32.sse42 ? 'Y' : 'n'); fprintf(stderr, " SSE42 ...... %c\n", info->ia32.sse42 ? 'Y' : 'n');
fprintf(stderr, " 3DNow! ..... %c\n", info->data.ia32._3dnow ? 'Y' : 'n'); fprintf(stderr, " 3DNow! ..... %c\n", info->ia32._3dnow ? 'Y' : 'n');
fprintf(stderr, " 3DNow!-ext . %c\n", info->data.ia32.ext3dnow? 'Y' : 'n'); fprintf(stderr, " 3DNow!-ext . %c\n", info->ia32.ext3dnow? 'Y' : 'n');
fprintf(stderr, " 3DNow!-MMX . %c\n", info->data.ia32.extmmx ? 'Y' : 'n'); fprintf(stderr, " 3DNow!-MMX . %c\n", info->ia32.extmmx ? 'Y' : 'n');
#endif #endif
/* /*
* now have to check for OS support of SSE/SSE2 * now have to check for OS support of SSE/SSE2
*/ */
if(info->data.ia32.fxsr || info->data.ia32.sse || info->data.ia32.sse2) { if(info->ia32.fxsr || info->ia32.sse || info->ia32.sse2) {
#if defined FLAC__NO_SSE_OS #if defined FLAC__NO_SSE_OS
/* assume user knows better than us; turn it off */ /* assume user knows better than us; turn it off */
info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = info->data.ia32.sse41 = info->data.ia32.sse42 = false; info->ia32.fxsr = info->ia32.sse = info->ia32.sse2 = info->ia32.sse3 = info->ia32.ssse3 = info->ia32.sse41 = info->ia32.sse42 = false;
#elif defined FLAC__SSE_OS #elif defined FLAC__SSE_OS
/* assume user knows better than us; leave as detected above */ /* assume user knows better than us; leave as detected above */
#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__APPLE__) #elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__APPLE__)
@@ -235,21 +235,21 @@ void FLAC__cpu_info(FLAC__CPUInfo *info)
len = sizeof(sse); sse = sse || (sysctlbyname("hw.instruction_sse", &sse, &len, NULL, 0) == 0 && sse); len = sizeof(sse); sse = sse || (sysctlbyname("hw.instruction_sse", &sse, &len, NULL, 0) == 0 && sse);
len = sizeof(sse); sse = sse || (sysctlbyname("hw.optional.sse" , &sse, &len, NULL, 0) == 0 && sse); /* __APPLE__ ? */ len = sizeof(sse); sse = sse || (sysctlbyname("hw.optional.sse" , &sse, &len, NULL, 0) == 0 && sse); /* __APPLE__ ? */
if(!sse) if(!sse)
info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = info->data.ia32.sse41 = info->data.ia32.sse42 = false; info->ia32.fxsr = info->ia32.sse = info->ia32.sse2 = info->ia32.sse3 = info->ia32.ssse3 = info->ia32.sse41 = info->ia32.sse42 = false;
#elif defined(__NetBSD__) || defined (__OpenBSD__) #elif defined(__NetBSD__) || defined (__OpenBSD__)
# if __NetBSD_Version__ >= 105250000 || (defined __OpenBSD__) # if __NetBSD_Version__ >= 105250000 || (defined __OpenBSD__)
int val = 0, mib[2] = { CTL_MACHDEP, CPU_SSE }; int val = 0, mib[2] = { CTL_MACHDEP, CPU_SSE };
size_t len = sizeof(val); size_t len = sizeof(val);
if(sysctl(mib, 2, &val, &len, NULL, 0) < 0 || !val) if(sysctl(mib, 2, &val, &len, NULL, 0) < 0 || !val)
info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = info->data.ia32.sse41 = info->data.ia32.sse42 = false; info->ia32.fxsr = info->ia32.sse = info->ia32.sse2 = info->ia32.sse3 = info->ia32.ssse3 = info->ia32.sse41 = info->ia32.sse42 = false;
else { /* double-check SSE2 */ else { /* double-check SSE2 */
mib[1] = CPU_SSE2; mib[1] = CPU_SSE2;
len = sizeof(val); len = sizeof(val);
if(sysctl(mib, 2, &val, &len, NULL, 0) < 0 || !val) if(sysctl(mib, 2, &val, &len, NULL, 0) < 0 || !val)
info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = info->data.ia32.sse41 = info->data.ia32.sse42 = false; info->ia32.sse2 = info->ia32.sse3 = info->ia32.ssse3 = info->ia32.sse41 = info->ia32.sse42 = false;
} }
# else # else
info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = info->data.ia32.sse41 = info->data.ia32.sse42 = false; info->ia32.fxsr = info->ia32.sse = info->ia32.sse2 = info->ia32.sse3 = info->ia32.ssse3 = info->ia32.sse41 = info->ia32.sse42 = false;
# endif # endif
#elif defined(__linux__) #elif defined(__linux__)
int sse = 0; int sse = 0;
@@ -288,7 +288,7 @@ void FLAC__cpu_info(FLAC__CPUInfo *info)
} }
if(!sse) if(!sse)
info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = info->data.ia32.sse41 = info->data.ia32.sse42 = false; info->ia32.fxsr = info->ia32.sse = info->ia32.sse2 = info->ia32.sse3 = info->ia32.ssse3 = info->ia32.sse41 = info->ia32.sse42 = false;
#elif defined(_MSC_VER) #elif defined(_MSC_VER)
# ifdef USE_TRY_CATCH_FLAVOR # ifdef USE_TRY_CATCH_FLAVOR
__try { __try {
@@ -298,7 +298,7 @@ void FLAC__cpu_info(FLAC__CPUInfo *info)
} }
__except(EXCEPTION_EXECUTE_HANDLER) { __except(EXCEPTION_EXECUTE_HANDLER) {
if (_exception_code() == STATUS_ILLEGAL_INSTRUCTION) if (_exception_code() == STATUS_ILLEGAL_INSTRUCTION)
info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = info->data.ia32.sse41 = info->data.ia32.sse42 = false; info->ia32.fxsr = info->ia32.sse = info->ia32.sse2 = info->ia32.sse3 = info->ia32.ssse3 = info->ia32.sse41 = info->ia32.sse42 = false;
} }
# else # else
int sse = 0; int sse = 0;
@@ -322,14 +322,14 @@ void FLAC__cpu_info(FLAC__CPUInfo *info)
} }
SetUnhandledExceptionFilter(save); SetUnhandledExceptionFilter(save);
if(!sse) if(!sse)
info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = info->data.ia32.sse41 = info->data.ia32.sse42 = false; info->ia32.fxsr = info->ia32.sse = info->ia32.sse2 = info->ia32.sse3 = info->ia32.ssse3 = info->ia32.sse41 = info->ia32.sse42 = false;
# endif # endif
#else #else
/* no way to test, disable to be safe */ /* no way to test, disable to be safe */
info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = info->data.ia32.sse41 = info->data.ia32.sse42 = false; info->ia32.fxsr = info->ia32.sse = info->ia32.sse2 = info->ia32.sse3 = info->ia32.ssse3 = info->ia32.sse41 = info->ia32.sse42 = false;
#endif #endif
#ifdef DEBUG #ifdef DEBUG
fprintf(stderr, " SSE OS sup . %c\n", info->data.ia32.sse ? 'Y' : 'n'); fprintf(stderr, " SSE OS sup . %c\n", info->ia32.sse ? 'Y' : 'n');
#endif #endif
} }
@@ -349,17 +349,17 @@ void FLAC__cpu_info(FLAC__CPUInfo *info)
/* http://www.sandpile.org/x86/cpuid.htm */ /* http://www.sandpile.org/x86/cpuid.htm */
FLAC__uint32 flags_edx, flags_ecx; FLAC__uint32 flags_edx, flags_ecx;
FLAC__cpu_info_x86(&flags_edx, &flags_ecx); FLAC__cpu_info_x86(&flags_edx, &flags_ecx);
info->data.x86_64.sse3 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE3 )? true : false; info->x86_64.sse3 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE3 )? true : false;
info->data.x86_64.ssse3 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSSE3)? true : false; info->x86_64.ssse3 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSSE3)? true : false;
info->data.x86_64.sse41 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE41)? true : false; info->x86_64.sse41 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE41)? true : false;
info->data.x86_64.sse42 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE42)? true : false; info->x86_64.sse42 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE42)? true : false;
} }
#ifdef DEBUG #ifdef DEBUG
fprintf(stderr, "CPU info (x86-64):\n"); fprintf(stderr, "CPU info (x86-64):\n");
fprintf(stderr, " SSE3 ....... %c\n", info->data.x86_64.sse3 ? 'Y' : 'n'); fprintf(stderr, " SSE3 ....... %c\n", info->x86_64.sse3 ? 'Y' : 'n');
fprintf(stderr, " SSSE3 ...... %c\n", info->data.x86_64.ssse3 ? 'Y' : 'n'); fprintf(stderr, " SSSE3 ...... %c\n", info->x86_64.ssse3 ? 'Y' : 'n');
fprintf(stderr, " SSE41 ...... %c\n", info->data.x86_64.sse41 ? 'Y' : 'n'); fprintf(stderr, " SSE41 ...... %c\n", info->x86_64.sse41 ? 'Y' : 'n');
fprintf(stderr, " SSE42 ...... %c\n", info->data.x86_64.sse42 ? 'Y' : 'n'); fprintf(stderr, " SSE42 ...... %c\n", info->x86_64.sse42 ? 'Y' : 'n');
#endif #endif
#else #else
@@ -378,7 +378,7 @@ void FLAC__cpu_info(FLAC__CPUInfo *info)
{ {
int val = 0, mib[2] = { CTL_HW, HW_VECTORUNIT }; int val = 0, mib[2] = { CTL_HW, HW_VECTORUNIT };
size_t len = sizeof(val); size_t len = sizeof(val);
info->data.ppc.altivec = !(sysctl(mib, 2, &val, &len, NULL, 0) || !val); info->ppc.altivec = !(sysctl(mib, 2, &val, &len, NULL, 0) || !val);
} }
{ {
host_basic_info_data_t hostInfo; host_basic_info_data_t hostInfo;
@@ -387,14 +387,14 @@ void FLAC__cpu_info(FLAC__CPUInfo *info)
infoCount = HOST_BASIC_INFO_COUNT; infoCount = HOST_BASIC_INFO_COUNT;
host_info(mach_host_self(), HOST_BASIC_INFO, (host_info_t)&hostInfo, &infoCount); host_info(mach_host_self(), HOST_BASIC_INFO, (host_info_t)&hostInfo, &infoCount);
info->data.ppc.ppc64 = (hostInfo.cpu_type == CPU_TYPE_POWERPC) && (hostInfo.cpu_subtype == CPU_SUBTYPE_POWERPC_970); info->ppc.ppc64 = (hostInfo.cpu_type == CPU_TYPE_POWERPC) && (hostInfo.cpu_subtype == CPU_SUBTYPE_POWERPC_970);
} }
# else /* FLAC__USE_ALTIVEC && !FLAC__SYS_DARWIN */ # else /* FLAC__USE_ALTIVEC && !FLAC__SYS_DARWIN */
{ {
/* no Darwin, do it the brute-force way */ /* no Darwin, do it the brute-force way */
/* @@@@@@ this is not thread-safe; replace with SSE OS method above or remove */ /* @@@@@@ this is not thread-safe; replace with SSE OS method above or remove */
info->data.ppc.altivec = 0; info->ppc.altivec = 0;
info->data.ppc.ppc64 = 0; info->ppc.ppc64 = 0;
signal (SIGILL, sigill_handler); signal (SIGILL, sigill_handler);
canjump = 0; canjump = 0;
@@ -408,7 +408,7 @@ void FLAC__cpu_info(FLAC__CPUInfo *info)
: "r" (-1) : "r" (-1)
); );
info->data.ppc.altivec = 1; info->ppc.altivec = 1;
} }
canjump = 0; canjump = 0;
if (!sigsetjmp (jmpbuf, 1)) { if (!sigsetjmp (jmpbuf, 1)) {
@@ -418,14 +418,14 @@ void FLAC__cpu_info(FLAC__CPUInfo *info)
/* PPC64 hardware implements the cntlzd instruction */ /* PPC64 hardware implements the cntlzd instruction */
asm volatile ("cntlzd %0, %1" : "=r" (x) : "r" (x) ); asm volatile ("cntlzd %0, %1" : "=r" (x) : "r" (x) );
info->data.ppc.ppc64 = 1; info->ppc.ppc64 = 1;
} }
signal (SIGILL, SIG_DFL); /*@@@@@@ should save and restore old signal */ signal (SIGILL, SIG_DFL); /*@@@@@@ should save and restore old signal */
} }
# endif # endif
# else /* !FLAC__USE_ALTIVEC */ # else /* !FLAC__USE_ALTIVEC */
info->data.ppc.altivec = 0; info->ppc.altivec = 0;
info->data.ppc.ppc64 = 0; info->ppc.ppc64 = 0;
# endif # endif
# else # else
info->use_asm = false; info->use_asm = false;

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@@ -46,6 +46,7 @@ typedef enum {
FLAC__CPUINFO_TYPE_UNKNOWN FLAC__CPUINFO_TYPE_UNKNOWN
} FLAC__CPUInfo_Type; } FLAC__CPUInfo_Type;
#if defined FLAC__CPU_IA32
typedef struct { typedef struct {
FLAC__bool cpuid; FLAC__bool cpuid;
FLAC__bool bswap; FLAC__bool bswap;
@@ -62,27 +63,30 @@ typedef struct {
FLAC__bool ext3dnow; FLAC__bool ext3dnow;
FLAC__bool extmmx; FLAC__bool extmmx;
} FLAC__CPUInfo_IA32; } FLAC__CPUInfo_IA32;
#elif defined FLAC__CPU_X86_64
typedef struct { typedef struct {
FLAC__bool sse3; FLAC__bool sse3;
FLAC__bool ssse3; FLAC__bool ssse3;
FLAC__bool sse41; FLAC__bool sse41;
FLAC__bool sse42; FLAC__bool sse42;
} FLAC__CPUInfo_x86_64; } FLAC__CPUInfo_x86_64;
#elif defined FLAC__CPU_PPC
typedef struct { typedef struct {
FLAC__bool altivec; FLAC__bool altivec;
FLAC__bool ppc64; FLAC__bool ppc64;
} FLAC__CPUInfo_PPC; } FLAC__CPUInfo_PPC;
#endif
typedef struct { typedef struct {
FLAC__bool use_asm; FLAC__bool use_asm;
FLAC__CPUInfo_Type type; FLAC__CPUInfo_Type type;
union { #if defined FLAC__CPU_IA32
FLAC__CPUInfo_IA32 ia32; FLAC__CPUInfo_IA32 ia32;
FLAC__CPUInfo_x86_64 x86_64; #elif defined FLAC__CPU_X86_64
FLAC__CPUInfo_PPC ppc; FLAC__CPUInfo_x86_64 x86_64;
} data; #elif defined FLAC__CPU_PPC
FLAC__CPUInfo_PPC ppc;
#endif
} FLAC__CPUInfo; } FLAC__CPUInfo;
void FLAC__cpu_info(FLAC__CPUInfo *info); void FLAC__cpu_info(FLAC__CPUInfo *info);
@@ -95,7 +99,7 @@ void FLAC__cpu_info_asm_ia32(FLAC__uint32 *flags_edx, FLAC__uint32 *flag
FLAC__uint32 FLAC__cpu_info_extended_amd_asm_ia32(void); FLAC__uint32 FLAC__cpu_info_extended_amd_asm_ia32(void);
#endif #endif
#if (defined FLAC__CPU_IA32 || defined FLAC__CPU_X86_64) && defined FLAC__HAS_X86INTRIN #if (defined FLAC__CPU_IA32 || defined FLAC__CPU_X86_64) && defined FLAC__HAS_X86INTRIN
void FLAC__cpu_info_x86(FLAC__uint32 *flags_edx, FLAC__uint32 *flags_ecx); void FLAC__cpu_info_x86(FLAC__uint32 *flags_edx, FLAC__uint32 *flags_ecx);
#endif #endif

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@@ -401,10 +401,10 @@ static FLAC__StreamDecoderInitStatus init_stream_internal_(
FLAC__ASSERT(decoder->private_->cpuinfo.type == FLAC__CPUINFO_TYPE_IA32); FLAC__ASSERT(decoder->private_->cpuinfo.type == FLAC__CPUINFO_TYPE_IA32);
#ifdef FLAC__HAS_NASM #ifdef FLAC__HAS_NASM
#if 0 /*@@@@@@ OPT: seems to be slower than FLAC__bitreader_read_rice_signed_block */ #if 0 /*@@@@@@ OPT: seems to be slower than FLAC__bitreader_read_rice_signed_block */
if(decoder->private_->cpuinfo.data.ia32.bswap) if(decoder->private_->cpuinfo.ia32.bswap)
decoder->private_->local_bitreader_read_rice_signed_block = FLAC__bitreader_read_rice_signed_block_asm_ia32_bswap; decoder->private_->local_bitreader_read_rice_signed_block = FLAC__bitreader_read_rice_signed_block_asm_ia32_bswap;
#endif #endif
if(decoder->private_->cpuinfo.data.ia32.mmx) { if(decoder->private_->cpuinfo.ia32.mmx) {
decoder->private_->local_lpc_restore_signal = FLAC__lpc_restore_signal_asm_ia32; decoder->private_->local_lpc_restore_signal = FLAC__lpc_restore_signal_asm_ia32;
decoder->private_->local_lpc_restore_signal_16bit = FLAC__lpc_restore_signal_asm_ia32_mmx; decoder->private_->local_lpc_restore_signal_16bit = FLAC__lpc_restore_signal_asm_ia32_mmx;
decoder->private_->local_lpc_restore_signal_16bit_order8 = FLAC__lpc_restore_signal_asm_ia32_mmx; decoder->private_->local_lpc_restore_signal_16bit_order8 = FLAC__lpc_restore_signal_asm_ia32_mmx;
@@ -417,7 +417,7 @@ static FLAC__StreamDecoderInitStatus init_stream_internal_(
#endif #endif
#elif defined FLAC__CPU_PPC #elif defined FLAC__CPU_PPC
FLAC__ASSERT(decoder->private_->cpuinfo.type == FLAC__CPUINFO_TYPE_PPC); FLAC__ASSERT(decoder->private_->cpuinfo.type == FLAC__CPUINFO_TYPE_PPC);
if(decoder->private_->cpuinfo.data.ppc.altivec) { if(decoder->private_->cpuinfo.ppc.altivec) {
decoder->private_->local_lpc_restore_signal_16bit = FLAC__lpc_restore_signal_asm_ppc_altivec_16; decoder->private_->local_lpc_restore_signal_16bit = FLAC__lpc_restore_signal_asm_ppc_altivec_16;
decoder->private_->local_lpc_restore_signal_16bit_order8 = FLAC__lpc_restore_signal_asm_ppc_altivec_16_order8; decoder->private_->local_lpc_restore_signal_16bit_order8 = FLAC__lpc_restore_signal_asm_ppc_altivec_16_order8;
} }

View File

@@ -888,7 +888,7 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
# ifdef FLAC__CPU_IA32 # ifdef FLAC__CPU_IA32
FLAC__ASSERT(encoder->private_->cpuinfo.type == FLAC__CPUINFO_TYPE_IA32); FLAC__ASSERT(encoder->private_->cpuinfo.type == FLAC__CPUINFO_TYPE_IA32);
# ifdef FLAC__HAS_NASM # ifdef FLAC__HAS_NASM
if(encoder->private_->cpuinfo.data.ia32.sse) { if(encoder->private_->cpuinfo.ia32.sse) {
if(encoder->protected_->max_lpc_order < 4) if(encoder->protected_->max_lpc_order < 4)
encoder->private_->local_lpc_compute_autocorrelation = FLAC__lpc_compute_autocorrelation_asm_ia32_sse_lag_4; encoder->private_->local_lpc_compute_autocorrelation = FLAC__lpc_compute_autocorrelation_asm_ia32_sse_lag_4;
else if(encoder->protected_->max_lpc_order < 8) else if(encoder->protected_->max_lpc_order < 8)
@@ -900,11 +900,11 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
else else
encoder->private_->local_lpc_compute_autocorrelation = FLAC__lpc_compute_autocorrelation_asm_ia32; encoder->private_->local_lpc_compute_autocorrelation = FLAC__lpc_compute_autocorrelation_asm_ia32;
} }
else if(encoder->private_->cpuinfo.data.ia32._3dnow) else if(encoder->private_->cpuinfo.ia32._3dnow)
encoder->private_->local_lpc_compute_autocorrelation = FLAC__lpc_compute_autocorrelation_asm_ia32_3dnow; encoder->private_->local_lpc_compute_autocorrelation = FLAC__lpc_compute_autocorrelation_asm_ia32_3dnow;
else else
encoder->private_->local_lpc_compute_autocorrelation = FLAC__lpc_compute_autocorrelation_asm_ia32; encoder->private_->local_lpc_compute_autocorrelation = FLAC__lpc_compute_autocorrelation_asm_ia32;
if(encoder->private_->cpuinfo.data.ia32.mmx) { if(encoder->private_->cpuinfo.ia32.mmx) {
encoder->private_->local_lpc_compute_residual_from_qlp_coefficients = FLAC__lpc_compute_residual_from_qlp_coefficients_asm_ia32; encoder->private_->local_lpc_compute_residual_from_qlp_coefficients = FLAC__lpc_compute_residual_from_qlp_coefficients_asm_ia32;
encoder->private_->local_lpc_compute_residual_from_qlp_coefficients_16bit = FLAC__lpc_compute_residual_from_qlp_coefficients_asm_ia32_mmx; encoder->private_->local_lpc_compute_residual_from_qlp_coefficients_16bit = FLAC__lpc_compute_residual_from_qlp_coefficients_asm_ia32_mmx;
} }
@@ -912,7 +912,7 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
encoder->private_->local_lpc_compute_residual_from_qlp_coefficients = FLAC__lpc_compute_residual_from_qlp_coefficients_asm_ia32; encoder->private_->local_lpc_compute_residual_from_qlp_coefficients = FLAC__lpc_compute_residual_from_qlp_coefficients_asm_ia32;
encoder->private_->local_lpc_compute_residual_from_qlp_coefficients_16bit = FLAC__lpc_compute_residual_from_qlp_coefficients_asm_ia32; encoder->private_->local_lpc_compute_residual_from_qlp_coefficients_16bit = FLAC__lpc_compute_residual_from_qlp_coefficients_asm_ia32;
} }
if(encoder->private_->cpuinfo.data.ia32.mmx && encoder->private_->cpuinfo.data.ia32.cmov) if(encoder->private_->cpuinfo.ia32.mmx && encoder->private_->cpuinfo.ia32.cmov)
encoder->private_->local_fixed_compute_best_predictor = FLAC__fixed_compute_best_predictor_asm_ia32_mmx_cmov; encoder->private_->local_fixed_compute_best_predictor = FLAC__fixed_compute_best_predictor_asm_ia32_mmx_cmov;
# endif /* FLAC__HAS_NASM */ # endif /* FLAC__HAS_NASM */
# elif defined FLAC__CPU_X86_64 # elif defined FLAC__CPU_X86_64