diff --git a/Marechai/Pages/Machines/View.razor b/Marechai/Pages/Machines/View.razor
index 513ae0f3..727ec35e 100644
--- a/Marechai/Pages/Machines/View.razor
+++ b/Marechai/Pages/Machines/View.razor
@@ -135,281 +135,285 @@
@{ counter = 0; }
@foreach (var processor in _machine.Processors)
{
+ int currentCounter = counter;
+
- @if (processor.Speed > 0)
- {
- @(processor.GprSize > 0 ? string.Format(L["{0} @ {1}MHz ({2} bits)"], processor.Name, processor.Speed, processor.GprSize) : string.Format(L["{0} @ {1}MHz"], processor.Name, processor.Speed))
- }
- else
- {
- @($"{processor.Name}")
- }
-
- @L["+info"]
-
-
-
-
- @if (processor.ModelCode != null &&
- processor.ModelCode != processor.Name)
- {
-
- | @L["Model"] |
- @processor.ModelCode |
-
- }
-
- | @L["Manufacturer"] |
-
-
- @processor.CompanyName
- |
-
- @if (processor.Introduced != null)
- {
-
- | @L["Introduction date"] |
- @($"{processor.Introduced:yyyy}") |
-
- }
- @if (processor.InstructionSet != null)
- {
-
- | @L["Instruction set"] |
- @processor.InstructionSet |
-
- }
- @if (processor.Speed > 0)
- {
-
- | @L["Nominal speed"] |
- @string.Format(L["{0} MHz"], processor.Speed) |
-
- }
- @if (processor.Gprs > 0 ||
- processor.Fprs > 0 ||
- processor.SimdRegisters > 0)
- {
-
- | Registers |
-
-
- @if (processor.Gprs > 0)
- {
-
- |
- @if (processor.FprSize > 0 &&
- processor.Fprs == 0 &&
- processor.SimdSize > 0 &&
- processor.SimdRegisters == 0)
- {
- @(string.Format(L["{0} general purpose registers of {1} bits that can be used as floating point registers of {2} bits and SIMD registers of {3} bits."],
- processor.Gprs, processor.GprSize, processor.FprSize, processor.SimdSize))
- }
- else if (processor.FprSize > 0 &&
- processor.Fprs == 0)
- {
- @(string.Format(L["{0} general purpose registers of {1} bits that can be used as floating point registers of {2} bits."],
- processor.Gprs, processor.GprSize, processor.FprSize))
- }
- else if (processor.FprSize == 0 &&
- processor.SimdSize > 0 &&
- processor.SimdRegisters == 0)
- {
- @(string.Format(L["{0} general purpose registers of {1} bits that can be used as SIMD registers of {2} bits."],
- processor.Gprs, processor.GprSize, processor.SimdSize))
- }
- else
- {
- @(string.Format(L["{0} general purpose registers of {1} bits."], processor.Gprs, processor.GprSize))
- }
- |
-
- }
- @if (processor.Fprs > 0)
- {
-
- |
- @if (processor.SimdSize > 0 &&
- processor.SimdRegisters == 0)
- {
- @(string.Format(L["{0} floating point registers of {1} bits that can be used as SIMD registers of {2} bits."],
- processor.Fprs, processor.FprSize, processor.SimdSize))
- }
- else
- {
- @(string.Format(L["{0} floating point registers of {1} bits."],
- processor.Fprs, processor.FprSize))
- }
- |
-
- }
- @if (processor.SimdRegisters > 0)
- {
-
- |
-
- @string.Format(L["{0} SIMD registers of {1} bits."], processor.SimdRegisters, processor.SimdSize)
-
- |
-
- }
-
- |
-
- }
- @if (processor.Cores > 1)
- {
-
- | @L["Multi-core"] |
- @string.Format(L["{0} cores."], processor.Cores) |
-
- }
- @if (processor.ThreadsPerCore > 1)
- {
-
- |
- SMT
- |
-
- @string.Format(processor.Cores > 1 ? L["{0} threads per core."] : L["{0} threads."], processor.ThreadsPerCore)
- |
-
- }
- @if (processor.DataBus > 0 ||
- processor.AddrBus > 0)
- {
-
- | @L["Bus"] |
-
-
- @if (processor.DataBus > 0)
- {
-
- |
- @string.Format(L["{0}-bit data."], processor.DataBus)
- |
-
- }
- @if (processor.AddrBus > 0)
- {
-
- |
- @string.Format(L["{0}-bit address."], processor.AddrBus)
- |
-
- }
-
- |
-
- }
-
- @if (processor.L1Instruction > 0 ||
- processor.L1Data > 0 ||
- processor.L2 > 0 ||
- processor.L2 > 0)
- {
-
- | @L["Cache"] |
-
-
- @if (processor.L1Instruction > 0)
- {
-
- |
- @string.Format(processor.L1Data < 0 ? L["{0}KiB combined instruction-data L1"] : L["{0}KiB instruction L1"], processor.L1Instruction)
- |
-
- }
- @if (processor.L1Data > 0)
- {
-
- |
- @string.Format(L["{0}KiB data L1"], processor.L1Data)
- |
-
- }
- @if (processor.L2 > 0)
- {
-
- |
- @string.Format(L["{0}KiB L2"], processor.L2)
- |
-
- }
- @if (processor.L3 > 0)
- {
-
- |
- @string.Format(L["{0}KiB L3"], processor.L3)
- |
-
- }
-
- |
-
- }
- @if (processor.Package != null)
- {
-
- | @L["Package"] |
- @processor.Package |
-
- }
- @if (processor.Process != null ||
- processor.ProcessNm > 0)
- {
-
- | @L["Manufacturing process"] |
-
- @if (processor.Process != null &&
- processor.ProcessNm > 0)
+
+
+ @if (processor.Speed > 0)
{
- if (processor.ProcessNm > 100)
- {
- @(string.Format(L["{0} @ {1}µm"], processor.Process, processor.ProcessNm / 100))
- }
- else
- {
- @(string.Format(L["{0} @ {1}nm"], processor.Process, processor.ProcessNm))
- }
- }
- else if (processor.ProcessNm > 0)
- {
- if (processor.ProcessNm > 100)
- {
- @(string.Format(L["{0}µm"], processor.ProcessNm / 100))
- }
- else
- {
- @(string.Format(L["{0}nm"], processor.ProcessNm))
- }
+ @(processor.GprSize > 0 ? string.Format(L["{0} @ {1}MHz ({2} bits)"], processor.Name, processor.Speed, processor.GprSize) : string.Format(L["{0} @ {1}MHz"], processor.Name, processor.Speed))
}
else
{
- @processor.Process
+ @($"{processor.Name}")
}
- |
-
- }
- @if (processor.DieSize > 0)
- {
-
- | @L["Die size"] |
- @string.Format(L["{0} mm²"], processor.DieSize) |
-
- }
- @if (processor.Transistors > 0)
- {
-
- | @L["Transistors"] |
- @processor.Transistors |
-
- }
-
-
-
+ _processorVisible[currentCounter] = !_processorVisible[currentCounter]">
+ @L["+info"]
+
+
+
+
+ @if (processor.ModelCode != null &&
+ processor.ModelCode != processor.Name)
+ {
+
+ | @L["Model"] |
+ @processor.ModelCode |
+
+ }
+
+ | @L["Manufacturer"] |
+
+
+ @processor.CompanyName
+ |
+
+ @if (processor.Introduced != null)
+ {
+
+ | @L["Introduction date"] |
+ @($"{processor.Introduced:yyyy}") |
+
+ }
+ @if (processor.InstructionSet != null)
+ {
+
+ | @L["Instruction set"] |
+ @processor.InstructionSet |
+
+ }
+ @if (processor.Speed > 0)
+ {
+
+ | @L["Nominal speed"] |
+ @string.Format(L["{0} MHz"], processor.Speed) |
+
+ }
+ @if (processor.Gprs > 0 ||
+ processor.Fprs > 0 ||
+ processor.SimdRegisters > 0)
+ {
+
+ | @L["Registers"] |
+
+
+ @if (processor.Gprs > 0)
+ {
+
+ |
+ @if (processor.FprSize > 0 &&
+ processor.Fprs == 0 &&
+ processor.SimdSize > 0 &&
+ processor.SimdRegisters == 0)
+ {
+ @(string.Format(L["{0} general purpose registers of {1} bits that can be used as floating point registers of {2} bits and SIMD registers of {3} bits."],
+ processor.Gprs, processor.GprSize, processor.FprSize, processor.SimdSize))
+ }
+ else if (processor.FprSize > 0 &&
+ processor.Fprs == 0)
+ {
+ @(string.Format(L["{0} general purpose registers of {1} bits that can be used as floating point registers of {2} bits."],
+ processor.Gprs, processor.GprSize, processor.FprSize))
+ }
+ else if (processor.FprSize == 0 &&
+ processor.SimdSize > 0 &&
+ processor.SimdRegisters == 0)
+ {
+ @(string.Format(L["{0} general purpose registers of {1} bits that can be used as SIMD registers of {2} bits."],
+ processor.Gprs, processor.GprSize, processor.SimdSize))
+ }
+ else
+ {
+ @(string.Format(L["{0} general purpose registers of {1} bits."], processor.Gprs, processor.GprSize))
+ }
+ |
+
+ }
+ @if (processor.Fprs > 0)
+ {
+
+ |
+ @if (processor.SimdSize > 0 &&
+ processor.SimdRegisters == 0)
+ {
+ @(string.Format(L["{0} floating point registers of {1} bits that can be used as SIMD registers of {2} bits."],
+ processor.Fprs, processor.FprSize, processor.SimdSize))
+ }
+ else
+ {
+ @(string.Format(L["{0} floating point registers of {1} bits."],
+ processor.Fprs, processor.FprSize))
+ }
+ |
+
+ }
+ @if (processor.SimdRegisters > 0)
+ {
+
+ |
+
+ @string.Format(L["{0} SIMD registers of {1} bits."], processor.SimdRegisters, processor.SimdSize)
+
+ |
+
+ }
+
+ |
+
+ }
+ @if (processor.Cores > 1)
+ {
+
+ | @L["Multi-core"] |
+ @string.Format(L["{0} cores."], processor.Cores) |
+
+ }
+ @if (processor.ThreadsPerCore > 1)
+ {
+
+ |
+ SMT
+ |
+
+ @string.Format(processor.Cores > 1 ? L["{0} threads per core."] : L["{0} threads."], processor.ThreadsPerCore)
+ |
+
+ }
+ @if (processor.DataBus > 0 ||
+ processor.AddrBus > 0)
+ {
+
+ | @L["Bus"] |
+
+
+ @if (processor.DataBus > 0)
+ {
+
+ |
+ @string.Format(L["{0}-bit data."], processor.DataBus)
+ |
+
+ }
+ @if (processor.AddrBus > 0)
+ {
+
+ |
+ @string.Format(L["{0}-bit address."], processor.AddrBus)
+ |
+
+ }
+
+ |
+
+ }
+
+ @if (processor.L1Instruction > 0 ||
+ processor.L1Data > 0 ||
+ processor.L2 > 0 ||
+ processor.L2 > 0)
+ {
+
+ | @L["Cache"] |
+
+
+ @if (processor.L1Instruction > 0)
+ {
+
+ |
+ @string.Format(processor.L1Data < 0 ? L["{0}KiB combined instruction-data L1"] : L["{0}KiB instruction L1"], processor.L1Instruction)
+ |
+
+ }
+ @if (processor.L1Data > 0)
+ {
+
+ |
+ @string.Format(L["{0}KiB data L1"], processor.L1Data)
+ |
+
+ }
+ @if (processor.L2 > 0)
+ {
+
+ |
+ @string.Format(L["{0}KiB L2"], processor.L2)
+ |
+
+ }
+ @if (processor.L3 > 0)
+ {
+
+ |
+ @string.Format(L["{0}KiB L3"], processor.L3)
+ |
+
+ }
+
+ |
+
+ }
+ @if (processor.Package != null)
+ {
+
+ | @L["Package"] |
+ @processor.Package |
+
+ }
+ @if (processor.Process != null ||
+ processor.ProcessNm > 0)
+ {
+
+ | @L["Manufacturing process"] |
+
+ @if (processor.Process != null &&
+ processor.ProcessNm > 0)
+ {
+ if (processor.ProcessNm > 100)
+ {
+ @(string.Format(L["{0} @ {1}µm"], processor.Process, processor.ProcessNm / 100))
+ }
+ else
+ {
+ @(string.Format(L["{0} @ {1}nm"], processor.Process, processor.ProcessNm))
+ }
+ }
+ else if (processor.ProcessNm > 0)
+ {
+ if (processor.ProcessNm > 100)
+ {
+ @(string.Format(L["{0}µm"], processor.ProcessNm / 100))
+ }
+ else
+ {
+ @(string.Format(L["{0}nm"], processor.ProcessNm))
+ }
+ }
+ else
+ {
+ @processor.Process
+ }
+ |
+
+ }
+ @if (processor.DieSize > 0)
+ {
+
+ | @L["Die size"] |
+ @string.Format(L["{0} mm²"], processor.DieSize) |
+
+ }
+ @if (processor.Transistors > 0)
+ {
+
+ | @L["Transistors"] |
+ @processor.Transistors |
+
+ }
+
+
+
|
@@ -497,29 +501,35 @@
@{ counter = 0; }
@foreach (var gpu in _machine.Gpus)
{
+ int currentCounter = counter;
+
if (gpu.Id == -2)
{