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96 lines
4.3 KiB
C#
96 lines
4.3 KiB
C#
/******************************************************************************
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// Canary Islands Computer Museum Website
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// ----------------------------------------------------------------------------
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//
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// Filename : Processor.cs
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// Author(s) : Natalia Portillo <claunia@claunia.com>
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//
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// --[ Description ] ----------------------------------------------------------
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//
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// High level representation of a processor .
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//
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// --[ License ] --------------------------------------------------------------
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as
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// published by the Free Software Foundation, either version 3 of the
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// License, or (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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// ----------------------------------------------------------------------------
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// Copyright © 2003-2018 Natalia Portillo
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*******************************************************************************/
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using System;
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namespace Cicm.Database.Schemas
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{
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/// <summary>Processor</summary>
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public class Processor
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{
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/// <summary>Size in bits of address bus with host (not interprocessor)</summary>
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public int AddressBus;
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/// <summary>Company</summary>
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public Company Company;
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/// <summary>How many processor cores per processor package</summary>
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public int Cores;
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/// <summary>Size in bits of data bus with host (not interprocessor)</summary>
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public int DataBus;
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/// <summary>Size of die in square milimeters</summary>
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public float DieSize;
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/// <summary>Number of available Floating Point Registers</summary>
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public int Fpr;
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/// <summary>Size in bits of FPRs</summary>
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public int FprSize;
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/// <summary>Number of available General Purpose Registers</summary>
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public int Gpr;
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/// <summary>Size in bits of GPRs</summary>
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public int GprSize;
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/// <summary>ID</summary>
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public int Id;
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/// <summary>Instruction set</summary>
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public InstructionSet InstructionSet;
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/// <summary>Extensions to the instruction set that are implemented in this processor</summary>
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public InstructionSetExtension[] InstructionSetExtensions;
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/// <summary>Datetime of introduction</summary>
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public DateTime Introduced;
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/// <summary>Size in kibibytes of L1 data cache. If -1, <see cref="L1Instruction" /> is size of L1 unified cache</summary>
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public float L1Data;
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/// <summary>Size in kibibytes of L1 instruction cache. If <see cref="L1Data" /> is -1, this is size of L1 unified cache</summary>
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public float L1Instruction;
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/// <summary>
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/// Size in kibibytes of L2 cache. It includes cache that's in same physical package but not in same chip die
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/// (e.g. Pentium II)
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/// </summary>
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public float L2;
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/// <summary>Size in kibibytes of L3 cache</summary>
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public float L3;
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/// <summary>Model/SKU code</summary>
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public string ModelCode;
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/// <summary>Name</summary>
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public string Name;
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/// <summary>Package</summary>
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public string Package;
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/// <summary>Name of litography process</summary>
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public string Process;
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/// <summary>Nanometers of litography process</summary>
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public float ProcessNm;
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/// <summary>Number of available SIMD registers</summary>
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public int Simd;
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/// <summary>Size in bits of SIMD registers</summary>
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public int SimdSize;
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/// <summary>Nominal speed, in MHz</summary>
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public double Speed;
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/// <summary>How many simultaneos threads can run on each processor core</summary>
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public int ThreadsPerCore;
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/// <summary>How many transistors in package</summary>
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public long Transistors;
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}
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} |