diff --git a/arch/arm/configs/mx51_efikamx_defconfig b/arch/arm/configs/mx51_efikamx_defconfig index 9a923e9af1d..dcf051c4d4b 100644 --- a/arch/arm/configs/mx51_efikamx_defconfig +++ b/arch/arm/configs/mx51_efikamx_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.31.14.28 -# Mon Dec 10 21:03:06 2012 +# Linux kernel version: 2.6.31.14.27 +# Tue Nov 20 12:15:11 2012 # CONFIG_ARM=y CONFIG_HAVE_PWM=y @@ -64,7 +64,7 @@ CONFIG_CGROUP_FREEZER=y # CONFIG_CGROUP_DEVICE is not set CONFIG_CPUSETS=y # CONFIG_PROC_PID_CPUSET is not set -CONFIG_CGROUP_CPUACCT=y +# CONFIG_CGROUP_CPUACCT is not set CONFIG_RESOURCE_COUNTERS=y # CONFIG_CGROUP_MEM_RES_CTLR is not set # CONFIG_SYSFS_DEPRECATED_V2 is not set diff --git a/drivers/mxc/amd-gpu/gsl_hal.c b/drivers/mxc/amd-gpu/gsl_hal.c index 0cb5b3651af..e3d2fb74b1a 100644 --- a/drivers/mxc/amd-gpu/gsl_hal.c +++ b/drivers/mxc/amd-gpu/gsl_hal.c @@ -1,4 +1,5 @@ /* Copyright (c) 2008-2010, Advanced Micro Devices. All rights reserved. + * Copyright (c) 2008-2011, Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -34,6 +35,8 @@ #include #include +#define DRVNAME "amd-gpu" + #define GSL_HAL_MEM1 0 #define GSL_HAL_MEM2 1 //#define GSL_HAL_MEM3 2 @@ -94,7 +97,7 @@ kgsl_hal_init(void) unsigned int va, pa; if (!gpu_reserved_mem || !gpu_reserved_mem_size) { - printk(KERN_ERR "%s: no GPU reserved memory! Cannot continue!\n", __func__); + printk(KERN_ERR "%s: no GPU reserved memory! Cannot continue!\n", DRVNAME); return GSL_FAILURE_SYSTEMERROR; } @@ -136,9 +139,9 @@ kgsl_hal_init(void) } #ifdef GSL_HAL_DEBUG - printk(KERN_INFO "%s: hal->z430_regspace.mmio_phys_base = 0x%p\n", __func__, (void *)hal->z430_regspace.mmio_phys_base); - printk(KERN_INFO "%s: hal->z430_regspace.mmio_virt_base = 0x%p\n", __func__, (void *)hal->z430_regspace.mmio_virt_base); - printk(KERN_INFO "%s: hal->z430_regspace.sizebytes = 0x%08x\n", __func__, hal->z430_regspace.sizebytes); + pr_info("%s: hal->z430_regspace.mmio_phys_base = 0x%p\n", DRVNAME, (void *)hal->z430_regspace.mmio_phys_base); + pr_info("%s: hal->z430_regspace.mmio_virt_base = 0x%p\n", DRVNAME, (void *)hal->z430_regspace.mmio_virt_base); + pr_info("%s: hal->z430_regspace.sizebytes = 0x%08x\n", DRVNAME, hal->z430_regspace.sizebytes); #endif } @@ -152,25 +155,30 @@ kgsl_hal_init(void) } #ifdef GSL_HAL_DEBUG - printk(KERN_INFO "%s: hal->z160_regspace.mmio_phys_base = 0x%p\n", __func__, (void *)hal->z160_regspace.mmio_phys_base); - printk(KERN_INFO "%s: hal->z160_regspace.mmio_virt_base = 0x%p\n", __func__, (void *)hal->z160_regspace.mmio_virt_base); - printk(KERN_INFO "%s: hal->z160_regspace.sizebytes = 0x%08x\n", __func__, hal->z160_regspace.sizebytes); + pr_info("%s: hal->z160_regspace.mmio_phys_base = 0x%p\n", DRVNAME, (void *)hal->z160_regspace.mmio_phys_base); + pr_info("%s: hal->z160_regspace.mmio_virt_base = 0x%p\n", DRVNAME, (void *)hal->z160_regspace.mmio_virt_base); + pr_info("%s: hal->z160_regspace.sizebytes = 0x%08x\n", DRVNAME, hal->z160_regspace.sizebytes); #endif } if (gsl_driver.enable_mmu) { - printk(KERN_INFO "GPU MMU enabled\n"); + pr_info("%s: GPU MMU enabled\n", DRVNAME); pa = gpu_reserved_mem; - va = (unsigned int)ioremap(gpu_reserved_mem, gpu_reserved_mem_size); + va = (unsigned int)ioremap_wc(gpu_reserved_mem, gpu_reserved_mem_size); + if (!va) + pr_err("%s: ioremap failed!\n", DRVNAME); res_size = gpu_reserved_mem_size; } else { - printk(KERN_INFO "GPU MMU disabled\n"); + pr_info("%s: GPU MMU disabled\n", DRVNAME); pa = gpu_reserved_mem; va = (unsigned int)ioremap(gpu_reserved_mem, gpu_reserved_mem_size); + if (!va) + pr_err("%s: ioremap failed!\n", DRVNAME); res_size = gpu_reserved_mem_size - GSL_HAL_SHMEM_SIZE_EMEM_NOMMU; } if (va) { + /* it would be awesome if we didn't have to do this on module init.. */ memset((void *)va, 0, res_size); /* set up a "memchunk" so we know what we can iounmap on exit */ @@ -179,7 +187,7 @@ kgsl_hal_init(void) hal->memchunk.sizebytes = gpu_reserved_mem_size; #ifdef GSL_HAL_DEBUG - printk(KERN_INFO "Reserved memory: pa = 0x%p va = 0x%p size = 0x%08x\n", + pr_info("%s: Reserved memory: pa = 0x%p va = 0x%p size = 0x%08x\n", DRVNAME, (void *)hal->memchunk.mmio_phys_base, (void *)hal->memchunk.mmio_virt_base, hal->memchunk.sizebytes); @@ -192,11 +200,10 @@ kgsl_hal_init(void) pa += res_size; #ifdef GSL_HAL_DEBUG - printk(KERN_INFO "GSL_HAL_MEM2 aperture (PHYS) pa = 0x%p va = 0x%p size = 0x%08x\n", - (void *)hal->memspace[GSL_HAL_MEM2].gpu_base, - (void *)hal->memspace[GSL_HAL_MEM2].mmio_virt_base, - hal->memspace[GSL_HAL_MEM2].sizebytes - ); + pr_info("%s: GSL_HAL_MEM2 aperture (PHYS) pa = 0x%p va = 0x%p size = 0x%08x\n", DRVNAME, + (void *)hal->memspace[GSL_HAL_MEM2].gpu_base, + (void *)hal->memspace[GSL_HAL_MEM2].mmio_virt_base, + hal->memspace[GSL_HAL_MEM2].sizebytes); #endif if (gsl_driver.enable_mmu) { @@ -211,12 +218,11 @@ kgsl_hal_init(void) } #ifdef GSL_HAL_DEBUG - printk(KERN_INFO "GSL_HAL_MEM1 aperture (%s) pa = 0x%p va = 0x%p size = 0x%08x\n", - gsl_driver.enable_mmu ? "MMU" : "EMEM", - (void *)hal->memspace[GSL_HAL_MEM1].gpu_base, - (void *)hal->memspace[GSL_HAL_MEM1].mmio_virt_base, - hal->memspace[GSL_HAL_MEM1].sizebytes - ); + pr_info("%s: GSL_HAL_MEM1 aperture (%s) pa = 0x%p va = 0x%p size = 0x%08x\n", DRVNAME, + gsl_driver.enable_mmu ? "MMU" : "EMEM", + (void *)hal->memspace[GSL_HAL_MEM1].gpu_base, + (void *)hal->memspace[GSL_HAL_MEM1].mmio_virt_base, + hal->memspace[GSL_HAL_MEM1].sizebytes); #endif } else { return GSL_FAILURE_SYSTEMERROR; @@ -433,7 +439,7 @@ kgsl_hal_getchipid(gsl_deviceid_t device_id) chipid = ((coreid << 24) | (majorid << 16) | (minorid << 8) | (patchid << 0)); #ifdef GSL_HAL_DEBUG - printk(KERN_INFO "Z430 found: core %u major %u minor %u patch %u (chipid 0x%08x)\n", coreid, majorid, minorid, patchid, chipid); + pr_info("Z430 found: core %u major %u minor %u patch %u (chipid 0x%08x)\n", coreid, majorid, minorid, patchid, chipid); #endif } @@ -526,7 +532,7 @@ KGSLHAL_API int kgsl_clock(gsl_deviceid_t dev, int enable) } if (IS_ERR(gpu_clk)) { - printk(KERN_ERR "%s: GPU clock get failed!\n", __func__); + printk(KERN_ERR "%s: GPU clock get failed!\n", DRVNAME); return GSL_FAILURE_DEVICEERROR; } diff --git a/drivers/mxc/amd-gpu/gsl_kmod.c b/drivers/mxc/amd-gpu/gsl_kmod.c index 8c20712314e..b58842331bc 100644 --- a/drivers/mxc/amd-gpu/gsl_kmod.c +++ b/drivers/mxc/amd-gpu/gsl_kmod.c @@ -451,7 +451,10 @@ static int gsl_kmod_ioctl(struct inode *inode, struct file *fd, unsigned int cmd { add_memblock_to_allocated_list(fd, &tmp); } - } + } else { + pr_err("amd-gpu: kgsl_sharedmem_alloc ioctl failed!\n"); + } + break; } case IOCTL_KGSL_SHAREDMEM_FREE: diff --git a/drivers/mxc/amd-gpu/include/gsl_hwaccess.h b/drivers/mxc/amd-gpu/include/gsl_hwaccess.h index 88e8a39a2e0..7884ddb9acf 100644 --- a/drivers/mxc/amd-gpu/include/gsl_hwaccess.h +++ b/drivers/mxc/amd-gpu/include/gsl_hwaccess.h @@ -41,8 +41,6 @@ kgsl_hwaccess_memread(void *dst, unsigned int gpubase, unsigned int gpuoffset, u if (gsl_driver.enable_mmu && (gpubase >= GSL_LINUX_MAP_RANGE_START) && (gpubase < GSL_LINUX_MAP_RANGE_END)) { gsl_linux_map_read(dst, gpubase+gpuoffset, sizebytes, touserspace); } else { - mb(); - dsb(); if (touserspace) { if (copy_to_user(dst, (void *)(gpubase + gpuoffset), sizebytes)) @@ -54,8 +52,6 @@ kgsl_hwaccess_memread(void *dst, unsigned int gpubase, unsigned int gpuoffset, u { memcpy(dst, (void *) (gpubase + gpuoffset), sizebytes); } - mb(); - dsb(); } } @@ -67,8 +63,6 @@ kgsl_hwaccess_memwrite(unsigned int gpubase, unsigned int gpuoffset, void *src, if (gsl_driver.enable_mmu && (gpubase >= GSL_LINUX_MAP_RANGE_START) && (gpubase < GSL_LINUX_MAP_RANGE_END)) { gsl_linux_map_write(src, gpubase+gpuoffset, sizebytes, fromuserspace); } else { - mb(); - dsb(); if (fromuserspace) { if (copy_from_user((void *)(gpubase + gpuoffset), src, sizebytes)) @@ -80,8 +74,6 @@ kgsl_hwaccess_memwrite(unsigned int gpubase, unsigned int gpuoffset, void *src, { memcpy((void *)(gpubase + gpuoffset), src, sizebytes); } - mb(); - dsb(); } } @@ -93,11 +85,7 @@ kgsl_hwaccess_memset(unsigned int gpubase, unsigned int gpuoffset, unsigned int if (gsl_driver.enable_mmu && (gpubase >= GSL_LINUX_MAP_RANGE_START) && (gpubase < GSL_LINUX_MAP_RANGE_END)) { gsl_linux_map_set(gpuoffset+gpubase, value, sizebytes); } else { - mb(); - dsb(); memset((void *)(gpubase + gpuoffset), value, sizebytes); - mb(); - dsb(); } } @@ -112,12 +100,8 @@ kgsl_hwaccess_regread(gsl_deviceid_t device_id, unsigned int gpubase, unsigned i (void) device_id; reg = (unsigned int *)(gpubase + (offsetwords << 2)); - - mb(); - dsb(); - *data = __raw_readl(reg); - mb(); - dsb(); + + *data = readl(reg); } //---------------------------------------------------------------------------- @@ -131,10 +115,6 @@ kgsl_hwaccess_regwrite(gsl_deviceid_t device_id, unsigned int gpubase, unsigned (void) device_id; reg = (unsigned int *)(gpubase + (offsetwords << 2)); - mb(); - dsb(); - __raw_writel(data, reg); - mb(); - dsb(); + writel(data, reg); } #endif // __GSL_HWACCESS_WINCE_MX51_H