* mutex, events, sleeps, process id unabstracted
* defines for function types (inline, extern) unabstracted
* defines for debug assert change name (KOS_ASSERT -> DEBUG_ASSERT) and left disabled
* driver now warns, if logging is enabled, that interruptible mutex locks are interrupted (which never happens in reality but it fixes a warning)
* remove fine grained locking "feature" since it's not enabled (and Qualcomm's public driver does not even implement it)
* refine mutex initialization where it's still present - don't try and allocate mutex structures where they're always used, just make them parts of the structure (struct mutex * -> struct mutex)
* whitespace police
apertures instead of PHYS and EMEM1/MMU and EMEM2. Modify setup to utilize all of reserved memory for PHYS
aperture instead of splitting. Now, a 32MB (in platform fixup, mx51_efikamx.c) reserved block is utilized as
the PHYS, or an 8MB chunk is carved out of coherent memory space (DMA allocation) if reservation is disabled.
Normal memory usage for a desktop with browser, office and media player is well over 64MB but the Xorg driver
will evict unused pixmaps where necessary to keep the current performance pixmaps in place.
With MMU enabled, there is no need to reserve memory for GPU
at boot time
Signed-off-by: Zhou, Jie <b30303@freescale.com>
(cherry picked from commit 326da1d885108399f4e22d10a8fe341a7a110ffc)
pending indicate the timer has been fired but clock not yet disabled.
This patch fixs the bug that sometimes in irq handle it tries to enable
clock and cause BUG.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
(cherry picked from commit 4b73c7a14fdebbd1240dbb1f5e4efa5b7a65f63c)
seperate interrupt handling and clk_enable for Z160 and Z430
Signed-off-by: Zhou, Jie <b30303@freescale.com>
(cherry picked from commit 7da21af984a50ffb166ab1a088cd2c5d4313537b)
For timer based power autogating, we have to move clk_enable/disable out of
timer handler, because they become may sleep.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
If enabled MMU, there is AXI read/write error on MX508 when run
OpenVG CTS.
Besides, change EMEM1 size to 10MB by default to make gpu driver
work on MX50_ARM2 board with 128MB memory installed.
Signed-off-by: Jie Zhou <b30303@freescale.com>
Remove GSL_MMU_TRANSLATION_ENABLED macro originally used for conditional
compile, and replace it with runtime check to support one mx5x image
Signed-off-by: Jie Zhou <b30303@freescale.com>
When X-accel is enabled, uio driver is used for X server to access
z160 device, so in gsl, we should not operate z160 to avoid conflicts
Signed-off-by: Jie Zhou <b30303@freescale.com>
Change pgprot_noncached to pgprot_writecombine in gsl_kmod_mmap to
improve performance
Signed-off-by: Thomas Peng <r80085@freescale.com>
Signed-off-by: Jie Zhou <b30303@freescale.com>
(cherry picked from commit 847baca41bceed49e397eaba8b1b3b00e86e20a3)
With latest VG/GL fix integration from RC16/EA, there will be some problems
as below, which can be solved by this patch:
- ENGR00124884 will happen again
- suspend/resume will not be supported in gpu driver
Signed-off-by: Jie Zhou <b30303@freescale.com>
