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85e33be8be
The MBM can only be accessed in word, removing the potential bit fields side effect intrudued by the different tool chain. Signed-off-by: William Lai <b04597@freescale.com>
223 lines
6.2 KiB
C
223 lines
6.2 KiB
C
/*
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* Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/*!
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* @file flexcan.h
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*
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* @brief FlexCan definitions.
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*
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* @ingroup can
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*/
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#ifndef __CAN_FLEXCAN_H__
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#define __CAN_FLEXCAN_H__
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#include <linux/list.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/clk.h>
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#include <linux/can.h>
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#include <linux/can/core.h>
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#include <linux/can/error.h>
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#define FLEXCAN_DEVICE_NAME "FlexCAN"
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#define CAN_MB_RX_INACTIVE 0x0
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#define CAN_MB_RX_EMPTY 0x4
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#define CAN_MB_RX_FULL 0x2
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#define CAN_MB_RX_OVERRUN 0x6
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#define CAN_MB_RX_BUSY 0x1
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#define CAN_MB_TX_INACTIVE 0x8
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#define CAN_MB_TX_ABORT 0x9
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#define CAN_MB_TX_ONCE 0xC
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#define CAN_MB_TX_REMOTE 0xA
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struct can_hw_mb {
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unsigned int mb_cs;
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unsigned int mb_id;
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unsigned char mb_data[8];
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};
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#define MB_CS_CODE_OFFSET 24
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#define MB_CS_CODE_MASK (0xF << MB_CS_CODE_OFFSET)
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#define MB_CS_SRR_OFFSET 22
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#define MB_CS_SRR_MASK (0x1 << MB_CS_SRR_OFFSET)
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#define MB_CS_IDE_OFFSET 21
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#define MB_CS_IDE_MASK (0x1 << MB_CS_IDE_OFFSET)
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#define MB_CS_RTR_OFFSET 20
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#define MB_CS_RTR_MASK (0x1 << MB_CS_RTR_OFFSET)
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#define MB_CS_LENGTH_OFFSET 16
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#define MB_CS_LENGTH_MASK (0xF << MB_CS_LENGTH_OFFSET)
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#define MB_CS_TIMESTAMP_OFFSET 0
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#define MB_CS_TIMESTAMP_MASK (0xFF << MB_CS_TIMESTAMP_OFFSET)
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#define CAN_HW_REG_MCR 0x00
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#define CAN_HW_REG_CTRL 0x04
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#define CAN_HW_REG_TIMER 0x08
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#define CAN_HW_REG_RXGMASK 0x10
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#define CAN_HW_REG_RX14MASK 0x14
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#define CAN_HW_REG_RX15MASK 0x18
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#define CAN_HW_REG_ECR 0x1C
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#define CAN_HW_REG_ESR 0x20
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#define CAN_HW_REG_IMASK2 0x24
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#define CAN_HW_REG_IMASK1 0x28
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#define CAN_HW_REG_IFLAG2 0x2C
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#define CAN_HW_REG_IFLAG1 0x30
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#define CAN_MB_BASE 0x0080
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#define CAN_RXMASK_BASE 0x0880
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#define CAN_FIFO_BASE 0xE0
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#define __MCR_MDIS (1 << 31)
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#define __MCR_FRZ (1 << 30)
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#define __MCR_FEN (1 << 29)
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#define __MCR_HALT (1 << 28)
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#define __MCR_NOTRDY (1 << 27)
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#define __MCR_WAK_MSK (1 << 26)
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#define __MCR_SOFT_RST (1 << 25)
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#define __MCR_FRZ_ACK (1 << 24)
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#define __MCR_SLF_WAK (1 << 22)
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#define __MCR_WRN_EN (1 << 21)
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#define __MCR_LPM_ACK (1 << 20)
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#define __MCR_WAK_SRC (1 << 19)
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#define __MCR_DOZE (1 << 18)
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#define __MCR_SRX_DIS (1 << 17)
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#define __MCR_BCC (1 << 16)
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#define __MCR_LPRIO_EN (1 << 13)
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#define __MCR_AEN (1 << 12)
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#define __MCR_MAX_IDAM_OFFSET 8
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#define __MCR_MAX_IDAM_MASK (0x3 << __MCR_MAX_IDAM_OFFSET)
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#define __MCR_MAX_IDAM_A (0x0 << __MCR_MAX_IDAM_OFFSET)
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#define __MCR_MAX_IDAM_B (0x1 << __MCR_MAX_IDAM_OFFSET)
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#define __MCR_MAX_IDAM_C (0x2 << __MCR_MAX_IDAM_OFFSET)
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#define __MCR_MAX_IDAM_D (0x3 << __MCR_MAX_IDAM_OFFSET)
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#define __MCR_MAX_MB_OFFSET 0
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#define __MCR_MAX_MB_MASK (0x3F)
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#define __CTRL_PRESDIV_OFFSET 24
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#define __CTRL_PRESDIV_MASK (0xFF << __CTRL_PRESDIV_OFFSET)
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#define __CTRL_RJW_OFFSET 22
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#define __CTRL_RJW_MASK (0x3 << __CTRL_RJW_OFFSET)
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#define __CTRL_PSEG1_OFFSET 19
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#define __CTRL_PSEG1_MASK (0x7 << __CTRL_PSEG1_OFFSET)
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#define __CTRL_PSEG2_OFFSET 16
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#define __CTRL_PSEG2_MASK (0x7 << __CTRL_PSEG2_OFFSET)
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#define __CTRL_BOFF_MSK (0x1 << 15)
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#define __CTRL_ERR_MSK (0x1 << 14)
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#define __CTRL_CLK_SRC (0x1 << 13)
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#define __CTRL_LPB (0x1 << 12)
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#define __CTRL_TWRN_MSK (0x1 << 11)
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#define __CTRL_RWRN_MSK (0x1 << 10)
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#define __CTRL_SMP (0x1 << 7)
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#define __CTRL_BOFF_REC (0x1 << 6)
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#define __CTRL_TSYN (0x1 << 5)
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#define __CTRL_LBUF (0x1 << 4)
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#define __CTRL_LOM (0x1 << 3)
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#define __CTRL_PROPSEG_OFFSET 0
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#define __CTRL_PROPSEG_MASK (0x7)
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#define __ECR_TX_ERR_COUNTER(x) ((x) & 0xFF)
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#define __ECR_RX_ERR_COUNTER(x) (((x) >> 8) & 0xFF)
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#define __ECR_PASSIVE_THRESHOLD 128
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#define __ECR_ACTIVE_THRESHOLD 96
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#define __ESR_TWRN_INT (0x1 << 17)
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#define __ESR_RWRN_INT (0x1 << 16)
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#define __ESR_BIT1_ERR (0x1 << 15)
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#define __ESR_BIT0_ERR (0x1 << 14)
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#define __ESR_ACK_ERR (0x1 << 13)
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#define __ESR_CRC_ERR (0x1 << 12)
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#define __ESR_FRM_ERR (0x1 << 11)
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#define __ESR_STF_ERR (0x1 << 10)
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#define __ESR_TX_WRN (0x1 << 9)
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#define __ESR_RX_WRN (0x1 << 8)
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#define __ESR_IDLE (0x1 << 7)
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#define __ESR_TXRX (0x1 << 6)
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#define __ESR_FLT_CONF_OFF 4
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#define __ESR_FLT_CONF_MASK (0x3 << __ESR_FLT_CONF_OFF)
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#define __ESR_BOFF_INT (0x1 << 2)
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#define __ESR_ERR_INT (0x1 << 1)
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#define __ESR_WAK_INT (0x1)
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#define __ESR_INTERRUPTS (__ESR_WAK_INT | __ESR_ERR_INT | \
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__ESR_BOFF_INT | __ESR_TWRN_INT | \
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__ESR_RWRN_INT)
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#define __FIFO_OV_INT 0x0080
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#define __FIFO_WARN_INT 0x0040
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#define __FIFO_RDY_INT 0x0020
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struct flexcan_device {
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struct mutex mutex;
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void *io_base;
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struct can_hw_mb *hwmb;
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unsigned int *rx_mask;
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unsigned int xmit_mb;
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unsigned int bitrate;
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/* word 1 */
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unsigned int br_presdiv:8;
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unsigned int br_rjw:2;
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unsigned int br_propseg:3;
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unsigned int br_pseg1:3;
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unsigned int br_pseg2:3;
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unsigned int maxmb:6;
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unsigned int xmit_maxmb:6;
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unsigned int wd1_resv:1;
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/* word 2 */
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unsigned int fifo:1;
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unsigned int wakeup:1;
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unsigned int srx_dis:1;
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unsigned int wak_src:1;
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unsigned int bcc:1;
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unsigned int lprio:1;
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unsigned int abort:1;
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unsigned int br_clksrc:1;
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unsigned int loopback:1;
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unsigned int smp:1;
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unsigned int boff_rec:1;
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unsigned int tsyn:1;
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unsigned int listen:1;
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unsigned int ext_msg:1;
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unsigned int std_msg:1;
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struct timer_list timer;
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struct platform_device *dev;
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struct regulator *core_reg;
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struct regulator *io_reg;
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struct clk *clk;
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int irq;
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};
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#define FLEXCAN_MAX_FIFO_MB 8
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#define FLEXCAN_MAX_MB 64
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#define FLEXCAN_MAX_PRESDIV 256
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#define FLEXCAN_MAX_RJW 4
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#define FLEXCAN_MAX_PSEG1 8
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#define FLEXCAN_MAX_PSEG2 8
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#define FLEXCAN_MAX_PROPSEG 8
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#define FLEXCAN_MAX_BITRATE 1000000
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extern struct net_device *flexcan_device_alloc(struct platform_device *pdev,
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void (*setup) (struct net_device
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*dev));
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extern void flexcan_device_free(struct platform_device *pdev);
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extern void flexcan_mbm_init(struct flexcan_device *flexcan);
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extern void flexcan_mbm_isr(struct net_device *dev);
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extern int flexcan_mbm_xmit(struct flexcan_device *flexcan,
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struct can_frame *frame);
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#endif /* __CAN_FLEXCAN_H__ */
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