[PATCH] ARM: 2752/1: disable ixp2000 PCI I/O software workaround on chips that don't need it

Patch from Lennert Buytenhek

The later ixp2000 models don't need the PCI I/O workaround that we
currently perform.  Add a config option to disable the workaround,
and panic on boot if a kernel without the workaround is booted on a
buggy chip.  As only pre-production ixp2000s need the workaround,
the default is for it not to be configured in.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek
2005-06-25 19:30:04 +01:00
committed by Russell King
parent 3cd9e19ebc
commit 321ab6a5fa
9 changed files with 41 additions and 7 deletions

View File

@@ -17,16 +17,21 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __mem_pci(a) (a)
#define ___io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))
/*
* The IXP2400 before revision B0 asserts byte lanes for PCI I/O
* The A? revisions of the IXP2000s assert byte lanes for PCI I/O
* transactions the other way round (MEM transactions don't have this
* issue), so we need to override the standard functions. B0 and later
* have a bit that can be set to 1 to get the 'proper' behavior, but
* since that isn't available on the A? revisions we just keep doing
* things manually.
* issue), so if we want to support those models, we need to override
* the standard I/O functions.
*
* B0 and later have a bit that can be set to 1 to get the proper
* behavior for I/O transactions, which then allows us to use the
* standard I/O functions. This is what we do if the user does not
* explicitly ask for support for pre-B0.
*/
#ifdef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO
#define ___io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))
#define alignb(addr) (void __iomem *)((unsigned long)(addr) ^ 3)
#define alignw(addr) (void __iomem *)((unsigned long)(addr) ^ 2)
@@ -119,6 +124,9 @@
#define ioport_map(port, nr) ___io(port)
#define ioport_unmap(addr)
#else
#define __io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))
#endif
#ifdef CONFIG_ARCH_IXDP2X01

View File

@@ -241,7 +241,7 @@
#define PCI_CONTROL_BE_DEI (1 << 21) /* Big Endian Data Enable In */
#define PCI_CONTROL_BE_BEO (1 << 20) /* Big Endian Byte Enable Out */
#define PCI_CONTROL_BE_BEI (1 << 19) /* Big Endian Byte Enable In */
#define PCI_CONTROL_PNR (1 << 17) /* PCI Not Reset bit */
#define PCI_CONTROL_IEE (1 << 17) /* I/O cycle Endian swap Enable */
#define IXP2000_PCI_RST_REL (1 << 2)
#define CFG_RST_DIR (*IXP2000_PCI_CONTROL & IXP2000_PCICNTL_PCF)