diff --git a/arch/arm/include/asm/mach/flash.h b/arch/arm/include/asm/mach/flash.h index 4ca69fe2c85..8b57c2ed6d7 100644 --- a/arch/arm/include/asm/mach/flash.h +++ b/arch/arm/include/asm/mach/flash.h @@ -34,6 +34,7 @@ struct flash_platform_data { void (*mmcontrol)(struct mtd_info *mtd, int sync_read); struct mtd_partition *parts; unsigned int nr_parts; + char *type; }; #endif diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c index 32f0f0eda01..a644ed1fc48 100644 --- a/arch/arm/mach-mx5/devices.c +++ b/arch/arm/mach-mx5/devices.c @@ -1426,6 +1426,12 @@ int __init mxc_init_devices(void) ipu_resources[0].end = MX53_IPU_CTRL_BASE_ADDR + SZ_128M - 1; mlb_resources[0].start -= MX53_OFFSET; mlb_resources[0].end -= MX53_OFFSET; + mxc_nandv2_mtd_device.resource[0].start = + MX53_NFC_BASE_ADDR_AXI; + mxc_nandv2_mtd_device.resource[0].end = + MX53_NFC_BASE_ADDR_AXI + SZ_8K - 1; + mxc_nandv2_mtd_device.resource[1].start -= MX53_OFFSET; + mxc_nandv2_mtd_device.resource[1].end -= MX53_OFFSET; } else if (cpu_is_mx51_rev(CHIP_REV_2_0) < 0) { scc_resources[1].start += 0x8000; scc_resources[1].end += 0x8000; diff --git a/arch/arm/mach-mx5/mx53_evk.c b/arch/arm/mach-mx5/mx53_evk.c index 4cc03aa5606..40244dc3122 100644 --- a/arch/arm/mach-mx5/mx53_evk.c +++ b/arch/arm/mach-mx5/mx53_evk.c @@ -36,7 +36,6 @@ #include #include #include -#include #include #include #include @@ -52,6 +51,7 @@ #include #include #include +#include #include #include #include @@ -550,6 +550,68 @@ static struct mxc_mlb_platform_data mlb_data = { .mlb_clk = "mlb_clk", }; +/* NAND Flash Partitions */ +#ifdef CONFIG_MTD_PARTITIONS +static struct mtd_partition nand_flash_partitions[] = { + { + .name = "bootloader", + .offset = 0, + .size = 3 * 1024 * 1024}, + { + .name = "nand.kernel", + .offset = MTDPART_OFS_APPEND, + .size = 5 * 1024 * 1024}, + { + .name = "nand.rootfs", + .offset = MTDPART_OFS_APPEND, + .size = 256 * 1024 * 1024}, + { + .name = "nand.userfs1", + .offset = MTDPART_OFS_APPEND, + .size = 256 * 1024 * 1024}, + { + .name = "nand.userfs2", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL}, +}; +#endif + +static int nand_init(void) +{ + u32 i, reg; + void __iomem *base; + + #define M4IF_GENP_WEIM_MM_MASK 0x00000001 + #define WEIM_GCR2_MUX16_BYP_GRANT_MASK 0x00001000 + + base = ioremap(MX53_BASE_ADDR(M4IF_BASE_ADDR), SZ_4K); + reg = __raw_readl(base + 0xc); + reg &= ~M4IF_GENP_WEIM_MM_MASK; + __raw_writel(reg, base + 0xc); + + iounmap(base); + + base = ioremap(MX53_BASE_ADDR(WEIM_BASE_ADDR), SZ_4K); + for (i = 0x4; i < 0x94; i += 0x18) { + reg = __raw_readl((u32)base + i); + reg &= ~WEIM_GCR2_MUX16_BYP_GRANT_MASK; + __raw_writel(reg, (u32)base + i); + } + + iounmap(base); + + return 0; +} + +static struct flash_platform_data mxc_nand_data = { +#ifdef CONFIG_MTD_PARTITIONS + .parts = nand_flash_partitions, + .nr_parts = ARRAY_SIZE(nand_flash_partitions), +#endif + .width = 1, + .init = nand_init, +}; + /*! * Board specific fixup function. It is called by \b setup_arch() in * setup.c file very early on during kernel starts. It allows the user to @@ -717,6 +779,7 @@ static void __init mxc_board_init(void) mxc_register_device(&mxc_mlb_device, &mlb_data); mx5_usb_dr_init(); mx5_usbh1_init(); + mxc_register_device(&mxc_nandv2_mtd_device, &mxc_nand_data); } static void __init mx53_evk_timer_init(void) diff --git a/arch/arm/mach-mx5/mx53_evk_gpio.c b/arch/arm/mach-mx5/mx53_evk_gpio.c index a8735180548..74f3c6049e8 100644 --- a/arch/arm/mach-mx5/mx53_evk_gpio.c +++ b/arch/arm/mach-mx5/mx53_evk_gpio.c @@ -87,12 +87,6 @@ static struct mxc_iomux_pin_cfg __initdata mxc_iomux_pins[] = { { MX53_PIN_EIM_D31, IOMUX_CONFIG_ALT4, }, - { - MX53_PIN_NANDF_CS2, IOMUX_CONFIG_ALT3, - }, - { - MX53_PIN_NANDF_CS3, IOMUX_CONFIG_ALT3, - }, { MX53_PIN_ATA_BUFFER_EN, IOMUX_CONFIG_ALT3, (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | @@ -703,6 +697,73 @@ static int __init w1_setup(char *__unused) __setup("w1", w1_setup); +static struct mxc_iomux_pin_cfg __initdata nand_iomux_pins[] = { + { + MX53_PIN_NANDF_CS0, IOMUX_CONFIG_ALT0, PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_NANDF_CS1, IOMUX_CONFIG_ALT0, PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_NANDF_CS2, IOMUX_CONFIG_ALT0, PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_NANDF_CS3, IOMUX_CONFIG_ALT0, PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_NANDF_RB0, IOMUX_CONFIG_ALT0, + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | PAD_CTL_100K_PU, + }, + { + MX53_PIN_NANDF_CLE, IOMUX_CONFIG_ALT0, PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_NANDF_ALE, IOMUX_CONFIG_ALT0, PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_NANDF_WP_B, IOMUX_CONFIG_ALT0, + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | PAD_CTL_100K_PU, + }, + { + MX53_PIN_NANDF_RE_B, IOMUX_CONFIG_ALT0, PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_NANDF_WE_B, IOMUX_CONFIG_ALT0, PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_EIM_DA0, IOMUX_CONFIG_ALT0, + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_EIM_DA1, IOMUX_CONFIG_ALT0, + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_EIM_DA2, IOMUX_CONFIG_ALT0, + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_EIM_DA3, IOMUX_CONFIG_ALT0, + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_EIM_DA4, IOMUX_CONFIG_ALT0, + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_EIM_DA5, IOMUX_CONFIG_ALT0, + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_EIM_DA6, IOMUX_CONFIG_ALT0, + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH, + }, + { + MX53_PIN_EIM_DA7, IOMUX_CONFIG_ALT0, + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH, + }, +}; + void __init mx53_evk_io_init(void) { int i; @@ -819,6 +880,16 @@ void __init mx53_evk_io_init(void) gpio_set_value(IOMUX_TO_GPIO(MX53_PIN_EIM_D28), 0); } + for (i = 0; i < ARRAY_SIZE(nand_iomux_pins); i++) { + mxc_request_iomux(nand_iomux_pins[i].pin, + nand_iomux_pins[i].mux_mode); + if (nand_iomux_pins[i].pad_cfg) + mxc_iomux_set_pad(nand_iomux_pins[i].pin, + nand_iomux_pins[i].pad_cfg); + if (nand_iomux_pins[i].in_select) + mxc_iomux_set_input(nand_iomux_pins[i].in_select, + nand_iomux_pins[i].in_mode); + } gpio_request(IOMUX_TO_GPIO(MX53_PIN_GPIO_16), "gpio7_11"); gpio_direction_input(IOMUX_TO_GPIO(MX53_PIN_GPIO_16)); /*PMIC_INT*/