This patch adds a new flags argument to bitbang_txrx_be_cpha0 and
bitbang_txrx_be_cpha1 transfer functions. This enables support for
SPI_MASTER_NO_{TX,RX} transfer modes. The change should have no impact
on speed of the existing drivers. bitbank_txrx_* functions are usually
inlined into the drivers. When the argument is equal to constant zero,
the optimizer would be able to eliminate the dead code (flags checks)
easily. Tested on ARM and GCC 4.4.x and in all cases the checks were
eliminated in the inlined function.
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
A number of files in drivers/spi fail checkincludes.pl due to the double
include of <linux/spi/spi_bitbang.h>.
The first include is needed to get the struct spi_bitbang definition and
the spi_bitbang_* function prototypes.
The second include happens after defining EXPAND_BITBANG_TXRX to get the
inlined bitbang_txrx_* utility functions.
The <linux/spi/spi_bitbang.h> header is also included by a number of other
spi drivers, as well as some arch/ code, in order to use struct spi_bitbang
and the associated functions.
To fix the double include, and remove any potential confusion about it, move
the inlined bitbang_txrx_* functions to a new private header in drivers/spi
and also remove the need to define EXPAND_BITBANG_TXRX.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch fixes the setup_transfer logic to account for the case where
multiple messages to different SPI devices are in the queue simultaneously.
With the current logic, the second message in the queue will end up
using the transfer parameters for the previous message in the queue.
The fix is to reinitialize the transfer parameters for each message
rather than only once on the first message.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The i2c_imx_trx_complete() function is using
wait_event_interruptible_timeout() to wait for the I2C controller to
signal that it has completed an I2C bus operation. If the process that
causes the I2C operation receives a signal, the wait will be
interrupted, returning an error. It is better to let the I2C operation
finished before handling the signal (i.e. returning into userspace).
It is safe to use wait_event_timeout() instead, because the timeout
will allow the process to exit if the I2C bus hangs. It's also better
to allow the I2C operation to finish, because unacknowledged I2C
operations can cause the I2C bus to hang.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* Remove VGA support
* Remove HDMI customization (was for the old driver)
* Consolidate DI clock setting (view is to remove it eventually since
the bug it was meant to work around is fixed)
* Remove mxc_ipuv3_fb.c dependency on EfikaMX includes
This is a new implementation of the sii9022 driver that is clearer to follow.
The missing functionality does not seem to be causing any loss of existing
functionality and helps development, so replacing it even though it is
incomplete.
* usb abi changes broke it
* FSL never added use_iram to urb struct ever so it never compiled in the first place
* cleanup memcpy usage so it's more readable (breaks 80 column limit but..)
Not enabled in any config. PROBABLY DOESN'T WORK. But at least it can be built and tested now.
If the returned value is outside of the range of the array, we could get
potential errors (#PF, #GF, etc), which are nasty to track down. Instead,
report a bug, and report the value as unknown in those cases.
Thanks to Saleem Abdulrasool
If enabled MMU, there is AXI read/write error on MX508 when run
OpenVG CTS.
Besides, change EMEM1 size to 10MB by default to make gpu driver
work on MX50_ARM2 board with 128MB memory installed.
Signed-off-by: Jie Zhou <b30303@freescale.com>
Remove GSL_MMU_TRANSLATION_ENABLED macro originally used for conditional
compile, and replace it with runtime check to support one mx5x image
Signed-off-by: Jie Zhou <b30303@freescale.com>
When X-accel is enabled, uio driver is used for X server to access
z160 device, so in gsl, we should not operate z160 to avoid conflicts
Signed-off-by: Jie Zhou <b30303@freescale.com>
If dual display enabled, the second one may not be able to set
correct clock rate if it's from ext clk.
Signed-off-by: Jason Chen <b02280@freescale.com>
The uioinfo should be cleaned up when uninstall, otherwise re-install
failure of uio_pdrv_genirq.ko will happen.
Signed-off-by: Jie Zhou <b30303@freescale.com>
It seems that for USB IP on Freescale MX5x processors, it needs >750
usec for the reset to complete. This change should not hurt any other
EHCI hardware.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
