From 44fbcff3572a3c2ad87f358a8e911716b7cf355a Mon Sep 17 00:00:00 2001 From: meepingsnesroms Date: Fri, 31 Aug 2018 16:38:43 -0700 Subject: [PATCH] Clean ups, mark unverified claims better, remove more invalid assumptions about m68k having 32 data lines --- src/hardwareRegisters.c | 10 +++++++++- src/memoryAccess.c | 42 +++++++++++++++++---------------------- src/memoryAccess.h | 5 +---- src/pdiUsbD12.c | 23 ++++++++++++++++++--- src/pdiUsbD12.h | 4 ++-- src/sed1376.c | 16 +++++++++------ unimplementedHardware.txt | 1 + 7 files changed, 61 insertions(+), 40 deletions(-) diff --git a/src/hardwareRegisters.c b/src/hardwareRegisters.c index 7c0b91c..4d708e9 100644 --- a/src/hardwareRegisters.c +++ b/src/hardwareRegisters.c @@ -502,6 +502,10 @@ uint16_t getHwRegister16(uint32_t address){ case PWMC1: return getPwmc1(); + case SPIINTCS: + debugLog("SPIINTCS read not implented yet\n"); + return 0x0000; + case SPIRXD:{ uint16_t rxFifoValue; @@ -957,6 +961,10 @@ void setHwRegister16(uint32_t address, uint16_t value){ setSpiCont1(value); break; + case SPIINTCS: + debugLog("SPIINTCS write not implented yet\n"); + break; + case SPITXD: if(spi1TxPosition < 8){ spi1TxFifo[spi1TxPosition] = value; @@ -1079,7 +1087,7 @@ void resetHwRegisters(){ //masks for reading and writing chips[CHIP_A0_ROM].mask = 0x003FFFFF;//4mb chips[CHIP_A1_USB].mask = 0x00000002;//A1 is used as USB chip A0 - chips[CHIP_B0_SED].mask = 0x0003FFFF; + chips[CHIP_B0_SED].mask = 0x0001FFFF; chips[CHIP_DX_RAM].mask = 0x00000000;//16mb, no RAM enabled until the DRAM module is initialized //system control diff --git a/src/memoryAccess.c b/src/memoryAccess.c index 5df4462..9dd2c95 100644 --- a/src/memoryAccess.c +++ b/src/memoryAccess.c @@ -29,50 +29,44 @@ static inline uint32_t romRead32(uint32_t address){return BUFFER_READ_32(palmRom static inline uint8_t sed1376Read8(uint32_t address){ if(sed1376PowerSaveEnabled()) return 0x00; - address &= chips[CHIP_B0_SED].mask; - if(address < SED1376_FB_OFFSET) - return sed1376GetRegister(address & 0xFF); + if(address & SED1376_MR_BIT) + return BUFFER_READ_8(sed1376Framebuffer, address, chips[CHIP_B0_SED].mask); else - return BUFFER_READ_8(sed1376Framebuffer, address - SED1376_FB_OFFSET, 0xFFFFFFFF); + return sed1376GetRegister(address & chips[CHIP_B0_SED].mask); } static inline uint16_t sed1376Read16(uint32_t address){ if(sed1376PowerSaveEnabled()) return 0x0000; - address &= chips[CHIP_B0_SED].mask; - if(address < SED1376_FB_OFFSET) - return sed1376GetRegister(address & 0xFF); + if(address & SED1376_MR_BIT) + return BUFFER_READ_16(sed1376Framebuffer, address, chips[CHIP_B0_SED].mask); else - return BUFFER_READ_16(sed1376Framebuffer, address - SED1376_FB_OFFSET, 0xFFFFFFFF); + return sed1376GetRegister(address & chips[CHIP_B0_SED].mask); } static inline uint32_t sed1376Read32(uint32_t address){ if(sed1376PowerSaveEnabled()) return 0x00000000; - address &= chips[CHIP_B0_SED].mask; - if(address < SED1376_FB_OFFSET) - return sed1376GetRegister(address & 0xFF); + if(address & SED1376_MR_BIT) + return BUFFER_READ_32(sed1376Framebuffer, address, chips[CHIP_B0_SED].mask); else - return BUFFER_READ_32(sed1376Framebuffer, address - SED1376_FB_OFFSET, 0xFFFFFFFF); + return sed1376GetRegister(address & chips[CHIP_B0_SED].mask); } static inline void sed1376Write8(uint32_t address, uint8_t value){ - address &= chips[CHIP_B0_SED].mask; - if(address < SED1376_FB_OFFSET) - sed1376SetRegister(address & 0xFF, value); + if(address & SED1376_MR_BIT) + BUFFER_WRITE_8(sed1376Framebuffer, address, chips[CHIP_B0_SED].mask, value); else - BUFFER_WRITE_8(sed1376Framebuffer, address - SED1376_FB_OFFSET, 0xFFFFFFFF, value); + sed1376SetRegister(address & chips[CHIP_B0_SED].mask, value); } static inline void sed1376Write16(uint32_t address, uint16_t value){ - address &= chips[CHIP_B0_SED].mask; - if(address < SED1376_FB_OFFSET) - sed1376SetRegister(address & 0xFF, value); + if(address & SED1376_MR_BIT) + BUFFER_WRITE_16(sed1376Framebuffer, address, chips[CHIP_B0_SED].mask, value); else - BUFFER_WRITE_16(sed1376Framebuffer, address - SED1376_FB_OFFSET, 0xFFFFFFFF, value); + sed1376SetRegister(address & chips[CHIP_B0_SED].mask, value); } static inline void sed1376Write32(uint32_t address, uint32_t value){ - address &= chips[CHIP_B0_SED].mask; - if(address < SED1376_FB_OFFSET) - sed1376SetRegister(address & 0xFF, value); + if(address & SED1376_MR_BIT) + BUFFER_WRITE_32(sed1376Framebuffer, address, chips[CHIP_B0_SED].mask, value); else - BUFFER_WRITE_32(sed1376Framebuffer, address - SED1376_FB_OFFSET, 0xFFFFFFFF, value); + sed1376SetRegister(address & chips[CHIP_B0_SED].mask, value); } static inline bool probeRead(uint8_t bank, uint32_t address){ diff --git a/src/memoryAccess.h b/src/memoryAccess.h index af6d3d5..adfdc81 100644 --- a/src/memoryAccess.h +++ b/src/memoryAccess.h @@ -22,10 +22,7 @@ #define ROM_SIZE (4 * 0x100000)//4mb ROM #define REG_SIZE 0x1000//is actually 0xE00 without bootloader #define BOOTLOADER_SIZE 0x200 -#define SED1376_REG_SIZE 0x100//it has 0x20000 used address space entrys but only 0xB4 registers -#define SED1376_LUT_SIZE 0x100 -#define SED1376_FB_SIZE 0x14000//0x14000 in size -#define SED1376_FB_OFFSET 0x20000//offset from SED1376 registers +#define SED1376_MR_BIT 0x20000 //the read/write stuff looks messy here but makes the memory access functions alot cleaner #define BUFFER_READ_8(segment, accessAddress, mask) segment[(accessAddress) & (mask)] diff --git a/src/pdiUsbD12.c b/src/pdiUsbD12.c index b584277..059cb19 100644 --- a/src/pdiUsbD12.c +++ b/src/pdiUsbD12.c @@ -1,25 +1,42 @@ #include #include +#include #include "emulator.h" +#include "portability.h" + + +#define PDIUSBD12_TRANSFER_BUFFER_SIZE 130 + + +static uint8_t pdiUsbD12TransferBuffer[PDIUSBD12_TRANSFER_BUFFER_SIZE]; +static uint8_t pdiUsbD12TransferIndex; void pdiUsbD12Reset(){ - + memset(pdiUsbD12TransferBuffer, 0x00, PDIUSBD12_TRANSFER_BUFFER_SIZE); + pdiUsbD12TransferIndex = 0; } uint64_t pdiUsbD12StateSize(){ uint64_t size = 0; + size += PDIUSBD12_TRANSFER_BUFFER_SIZE; + size += sizeof(uint8_t); + return size; } -void pdiUsbD12SaveState(){ +void pdiUsbD12SaveState(uint8_t* data){ uint64_t offset = 0; + memcpy(data + offset, pdiUsbD12TransferBuffer, PDIUSBD12_TRANSFER_BUFFER_SIZE); + offset += PDIUSBD12_TRANSFER_BUFFER_SIZE; + writeStateValueUint8(data + offset, pdiUsbD12TransferIndex); + offset += sizeof(uint8_t); } -void pdiUsbD12LoadState(){ +void pdiUsbD12LoadState(uint8_t* data){ uint64_t offset = 0; } diff --git a/src/pdiUsbD12.h b/src/pdiUsbD12.h index 0e20f77..627da1b 100644 --- a/src/pdiUsbD12.h +++ b/src/pdiUsbD12.h @@ -5,8 +5,8 @@ void pdiUsbD12Reset(); uint64_t pdiUsbD12StateSize(); -void pdiUsbD12SaveState(); -void pdiUsbD12LoadState(); +void pdiUsbD12SaveState(uint8_t* data); +void pdiUsbD12LoadState(uint8_t* data); uint8_t pdiUsbD12GetRegister(bool address); void pdiUsbD12SetRegister(bool address, uint8_t value); diff --git a/src/sed1376.c b/src/sed1376.c index e7fa9f7..5f44e5f 100644 --- a/src/sed1376.c +++ b/src/sed1376.c @@ -4,26 +4,30 @@ #include "emulator.h" #include "portability.h" #include "hardwareRegisters.h" -#include "memoryAccess.h" #include "specs/sed1376RegisterNames.h" #include "m68k/m68k.h" #include "debug/sandbox.h" -//the SED1376 has only 16 address lines(17 if you count the line that switches between registers and framebuffer) and 16 data lines, the most you can read is 16 bits, registers are 8 bits +//the SED1376 has only 16 address lines(17 if you count the line that switches between registers and framebuffer) and 16 data lines, the most you can read at once is 16 bits, registers are 8 bits //the actions described below are just my best guesses after reading the datasheet, I have not tested with actual hardware //you read and write the register on the address lines set //8 bit register access works normal -//16 bit register reads will result in you getting (0x00 << 8 | register). -//16 bit register writes will result in you writing the lower 8 bits. -//32 bit register reads will result in you getting (randomUint16 << 16 | 0x00 << 8 | register), upper 16 bits are floating because SED1376 only has 16 address lines. -//32 bit register writes will result in you writing the lower 8 bits. +//16 bit register reads will result in you getting (0x00 << 8 | register)(this is unverified) +//16 bit register writes will result in you writing the lower 8 bits(this is unverified) +//32 bit register reads will result in doing 2 16 bit reads +//32 bit register writes will result in doing 2 16 bit writes //The LCD power-on sequence is activated by programming the Power Save Mode Enable bit (REG[A0h] bit 0) to 0. //The LCD power-off sequence is activated by programming the Power Save Mode Enable bit (REG[A0h] bit 0) to 1. +#define SED1376_REG_SIZE 0xB4 +#define SED1376_LUT_SIZE 0x100 +#define SED1376_FB_SIZE 0x14000 + + static uint8_t sed1376Registers[SED1376_REG_SIZE]; static uint8_t sed1376RLut[SED1376_LUT_SIZE]; static uint8_t sed1376GLut[SED1376_LUT_SIZE]; diff --git a/unimplementedHardware.txt b/unimplementedHardware.txt index eef74a7..55e46e2 100644 --- a/unimplementedHardware.txt +++ b/unimplementedHardware.txt @@ -37,6 +37,7 @@ there is conflicting information on wether the DRAM bit effects CSC, needs a tes the unemulated chip selects(CSB1, CSC0/1) privilege violation interrupts will not be handled properly SED1376: +framebuffer accesses can cause a buffer overflow(this was always the case, its not a new bug) swivelview register ADS7846: