From 6b488b8817fcd0c54c7981b6e64b609300a69617 Mon Sep 17 00:00:00 2001 From: meepingsnesroms Date: Fri, 29 Mar 2019 17:19:03 -0700 Subject: [PATCH] Add armv5Cpu struct to savestate, remove blobs again now that the 32 bit alignment requirement is gone Also disabled more icache stuff since it had alignment restrictions and wasnt used anyway. --- src/armv5.c | 134 ++++++++++++++++++++++++- src/armv5/CPU.c | 6 +- src/armv5/CPU.h | 2 +- tools/palm/muExpansionDriver/globals.h | 4 - tools/palm/muExpansionDriver/make.sh | 5 - tools/palm/muExpansionDriver/patcher.c | 54 +--------- tools/palm/muExpansionDriver/traps.c | 7 +- 7 files changed, 139 insertions(+), 73 deletions(-) diff --git a/src/armv5.c b/src/armv5.c index dc0c21f..0c6d32d 100755 --- a/src/armv5.c +++ b/src/armv5.c @@ -83,24 +83,150 @@ void armv5Reset(void){ uint32_t armv5StateSize(void){ uint32_t size = 0; - //need to add armv5Cpu here - size += sizeof(uint8_t); + //armv5Cpu + size += sizeof(uint32_t) * 16;//armv5Cpu.regs + size += sizeof(uint32_t) * 2;//armv5Cpu.CPSR/SPSR + size += sizeof(uint32_t) * 3 * 6;//armv5Cpu.bank_usr/bank_svc/bank_abt/bank_und/bank_irq/bank_fiq + size += sizeof(uint32_t) * 5;//armv5Cpu.extra_regs + size += sizeof(uint16_t) * 3;//armv5Cpu.waitingIrqs/waitingFiqs/CPAR + size += sizeof(uint32_t);//armv5Cpu.vectorBase + + //variables + size += sizeof(uint8_t);//armv5ServiceRequest return size; } void armv5SaveState(uint8_t* data){ uint32_t offset = 0; + uint8_t index; - //need to add armv5Cpu here + //armv5Cpu + for(index = 0; index < 16; index++){ + writeStateValue32(data + offset, armv5Cpu.regs[index]); + offset += sizeof(uint32_t); + } + writeStateValue32(data + offset, armv5Cpu.CPSR); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.SPSR); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_usr.R13); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_usr.R14); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_usr.SPSR); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_svc.R13); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_svc.R14); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_svc.SPSR); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_abt.R13); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_abt.R14); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_abt.SPSR); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_und.R13); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_und.R14); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_und.SPSR); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_irq.R13); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_irq.R14); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_irq.SPSR); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_fiq.R13); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_fiq.R14); + offset += sizeof(uint32_t); + writeStateValue32(data + offset, armv5Cpu.bank_fiq.SPSR); + offset += sizeof(uint32_t); + for(index = 0; index < 5; index++){ + writeStateValue32(data + offset, armv5Cpu.extra_regs[index]); + offset += sizeof(uint32_t); + } + writeStateValue16(data + offset, armv5Cpu.waitingIrqs); + offset += sizeof(uint16_t); + writeStateValue16(data + offset, armv5Cpu.waitingFiqs); + offset += sizeof(uint16_t); + writeStateValue16(data + offset, armv5Cpu.CPAR); + offset += sizeof(uint16_t); + writeStateValue32(data + offset, armv5Cpu.vectorBase); + offset += sizeof(uint32_t); + + //variables writeStateValue8(data + offset, armv5ServiceRequest); offset += sizeof(uint8_t); } void armv5LoadState(uint8_t* data){ uint32_t offset = 0; + uint8_t index; - //need to add armv5Cpu here + //armv5Cpu + for(index = 0; index < 16; index++){ + armv5Cpu.regs[index] = readStateValue32(data + offset); + offset += sizeof(uint32_t); + } + armv5Cpu.CPSR = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.SPSR = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_usr.R13 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_usr.R14 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_usr.SPSR = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_svc.R13 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_svc.R14 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_svc.SPSR = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_abt.R13 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_abt.R14 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_abt.SPSR = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_und.R13 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_und.R14 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_und.SPSR = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_irq.R13 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_irq.R14 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_irq.SPSR = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_fiq.R13 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_fiq.R14 = readStateValue32(data + offset); + offset += sizeof(uint32_t); + armv5Cpu.bank_fiq.SPSR = readStateValue32(data + offset); + offset += sizeof(uint32_t); + for(index = 0; index < 5; index++){ + armv5Cpu.extra_regs[index] = readStateValue32(data + offset); + offset += sizeof(uint32_t); + } + armv5Cpu.waitingIrqs = readStateValue16(data + offset); + offset += sizeof(uint16_t); + armv5Cpu.waitingFiqs = readStateValue16(data + offset); + offset += sizeof(uint16_t); + armv5Cpu.CPAR = readStateValue16(data + offset); + offset += sizeof(uint16_t); + armv5Cpu.vectorBase = readStateValue32(data + offset); + offset += sizeof(uint32_t); + + //variables armv5ServiceRequest = readStateValue8(data + offset); offset += sizeof(uint8_t); } diff --git a/src/armv5/CPU.c b/src/armv5/CPU.c index 820053d..33be406 100755 --- a/src/armv5/CPU.c +++ b/src/armv5/CPU.c @@ -2608,7 +2608,7 @@ Err cpuInit(ArmCpu* cpu, UInt32 pc, ArmCpuMemF memF, ArmCpuEmulErr emulErrF, Arm cpu->hypercallF = hypercallF; cpu->setFaultAdrF = setFaultAdrF; - icacheInit(&cpu->ic, cpu, memF); + //icacheInit(&cpu->ic, cpu, memF); return errNone; } @@ -2695,12 +2695,12 @@ void cpuIrq(ArmCpu* cpu, Boolean fiq, Boolean raise){ //unraise when acknowledge void cpuIcacheInval(ArmCpu* cpu){ - icacheInval(&cpu->ic); + //icacheInval(&cpu->ic); } void cpuIcacheInvalAddr(ArmCpu* cpu, UInt32 addr){ - icacheInvalAddr(&cpu->ic, addr); + //icacheInvalAddr(&cpu->ic, addr); } diff --git a/src/armv5/CPU.h b/src/armv5/CPU.h index 9e58c87..b405918 100755 --- a/src/armv5/CPU.h +++ b/src/armv5/CPU.h @@ -137,7 +137,7 @@ typedef struct ArmCpu{ ArmCpuHypercall hypercallF; ArmSetFaultAdrF setFaultAdrF; - icache ic; + //icache ic; //not using icache for now void* userData; //shared by all callbacks }ArmCpu; diff --git a/tools/palm/muExpansionDriver/globals.h b/tools/palm/muExpansionDriver/globals.h index 6f8b4a1..7eb678b 100644 --- a/tools/palm/muExpansionDriver/globals.h +++ b/tools/palm/muExpansionDriver/globals.h @@ -5,10 +5,6 @@ enum{ ARM_STACK_START = 0, - ARM_EXIT_FUNC, - ARM_CALL_68K_FUNC, - M68K_CALL_WITH_BLOB_FUNC, - RESOURCE_GLOBALS_INITIALIZED, TUNGSTEN_W_DRIVERS_INSTALLED, CURRENT_RESOLUTION, ORIGINAL_FRAMEBUFFER diff --git a/tools/palm/muExpansionDriver/make.sh b/tools/palm/muExpansionDriver/make.sh index 99b7c73..55148b1 100755 --- a/tools/palm/muExpansionDriver/make.sh +++ b/tools/palm/muExpansionDriver/make.sh @@ -23,11 +23,6 @@ for I in "${FILES[@]}"; do done m68k-palmos-gcc -o $APP_NAME *.o -# copy ASM blobs -cp ./blobs/armExit.func ./func0000.bin # ARM code -cp ./blobs/armCall68k.func ./func0001.bin # ARM code -cp ./blobs/m68kCallWithBlob.func ./func0002.bin # 68k code - # if possible generate icon trees if type "MakePalmBitmap" &> /dev/null; then MakePalmBitmap icon ./appIcon.svg ./ diff --git a/tools/palm/muExpansionDriver/patcher.c b/tools/palm/muExpansionDriver/patcher.c index 7e2b31d..fe11f7a 100644 --- a/tools/palm/muExpansionDriver/patcher.c +++ b/tools/palm/muExpansionDriver/patcher.c @@ -28,58 +28,6 @@ static void lockCodeXXXX(void){ } } -static void installResourceGlobals(void){ - if(!getGlobalVar(RESOURCE_GLOBALS_INITIALIZED)){ - MemHandle funcBlob; - MemPtr funcBlobPtr; - - /*ARM_EXIT_FUNC*/ - funcBlob = DmGetResource(FUNCTION_BLOB_TYPE, ARM_EXIT_FUNC_ID); - if(!funcBlob) - debugLog("Cant open ARM_EXIT_FUNC!\n"); - - funcBlobPtr = MemHandleLock(funcBlob); - if(!funcBlobPtr) - debugLog("Cant lock ARM_EXIT_FUNC!\n"); - - if((uint32_t)funcBlobPtr & 0x00000003) - debugLog("ARM_EXIT_FUNC is unaligned!\n"); - - setGlobalVar(ARM_EXIT_FUNC, (uint32_t)funcBlobPtr); - - /*ARM_CALL_68K_FUNC*/ - funcBlob = DmGetResource(FUNCTION_BLOB_TYPE, ARM_CALL_68K_FUNC_ID); - if(!funcBlob) - debugLog("Cant open ARM_CALL_68K_FUNC!\n"); - - funcBlobPtr = MemHandleLock(funcBlob); - if(!funcBlobPtr) - debugLog("Cant lock ARM_CALL_68K_FUNC!\n"); - - if((uint32_t)funcBlobPtr & 0x00000003) - debugLog("ARM_CALL_68K_FUNC is unaligned!\n"); - - setGlobalVar(ARM_CALL_68K_FUNC, (uint32_t)funcBlobPtr); - - /*M68K_CALL_WITH_BLOB_FUNC*/ - funcBlob = DmGetResource(FUNCTION_BLOB_TYPE, M68K_CALL_WITH_BLOB_FUNC_ID); - if(!funcBlob) - debugLog("Cant open M68K_CALL_WITH_BLOB_FUNC!\n"); - - funcBlobPtr = MemHandleLock(funcBlob); - if(!funcBlobPtr) - debugLog("Cant lock M68K_CALL_WITH_BLOB_FUNC!\n"); - - if((uint32_t)funcBlobPtr & 0x00000001) - debugLog("M68K_CALL_WITH_BLOB_FUNC is unaligned!\n"); - - setGlobalVar(M68K_CALL_WITH_BLOB_FUNC, (uint32_t)funcBlobPtr); - - /*dont run this function again*/ - setGlobalVar(RESOURCE_GLOBALS_INITIALIZED, true); - } -} - static void install128mbRam(uint8_t mbDynamicHeap){ /*these functions are called by HwrInit, which can be called directly by apps*/ /*PrvGetRAMSize_10002C5E, small ROM*/ @@ -270,8 +218,8 @@ void initBoot(uint32_t* configFile){ if(!thisAppRef) debugLog("Cant open " APP_NAME "!\n"); + /*prevents the code being moved out from underneath its function pointers(in the API trap table), causing crashes*/ lockCodeXXXX(); - installResourceGlobals(); if(enabledFeatures & FEATURE_DEBUG) installDebugHandlers(); diff --git a/tools/palm/muExpansionDriver/traps.c b/tools/palm/muExpansionDriver/traps.c index b877199..506043a 100644 --- a/tools/palm/muExpansionDriver/traps.c +++ b/tools/palm/muExpansionDriver/traps.c @@ -14,9 +14,10 @@ UInt32 emuPceNativeCall(NativeFuncType* nativeFuncP, void* userDataP){ - uint8_t* armExitFunc = (uint8_t*)getGlobalVar(ARM_EXIT_FUNC); - uint8_t* armCall68kFunc = (uint8_t*)getGlobalVar(ARM_CALL_68K_FUNC); - uint8_t* m68kCallWithBlobFunc = (uint8_t*)getGlobalVar(M68K_CALL_WITH_BLOB_FUNC); + /*thes arnt set as "static" because the globals dont work here*/ + const ALIGN(2) uint32_t armExitFunc[] = {0x0000A0E3, 0xBBBBBBF7};/*ARM asm blob*/ + const ALIGN(2) uint32_t armCall68kFunc[] = {0x0100A0E3, 0xBBBBBBF7, 0x0EF0A0E1};/*ARM asm blob*/ + const ALIGN(2) uint8_t m68kCallWithBlobFunc[] = {0x4E, 0x56, 0x00, 0x00, 0x48, 0xE7, 0x60, 0x70, 0x26, 0x6E, 0x00, 0x08, 0x22, 0x6E, 0x00, 0x0C, 0x22, 0x2E, 0x00, 0x10, 0x34, 0x2E, 0x00, 0x14, 0x24, 0x4F, 0x95, 0xC1, 0xBF, 0xCA, 0x67, 0x00, 0x00, 0x0C, 0x34, 0x91, 0x54, 0x89, 0x54, 0x8A, 0x4E, 0xF8, 0x10, 0x4E, 0x9F, 0xC1, 0x4E, 0x93, 0xDF, 0xC1, 0x4A, 0x42, 0x67, 0x00, 0x00, 0x04, 0x20, 0x08, 0x4C, 0xDF, 0x0E, 0x06, 0x4E, 0x5E, 0x4E, 0x75};/*m68k asm blob*/ uint32_t oldArmRegisters[5]; uint32_t returnValue;