From 81f0521165e4b49a1b2eb44d1ae41126dc47c8b3 Mon Sep 17 00:00:00 2001 From: meepingsnesroms Date: Mon, 8 Apr 2019 18:11:41 -0700 Subject: [PATCH] Revert "Attempt to block 32 bit alignment requirement" This reverts commit 79af40b61f43e15525c6691fa70cdeba1fa7e62b. --- src/armv5/CPU.c | 27 +++++---------------------- 1 file changed, 5 insertions(+), 22 deletions(-) diff --git a/src/armv5/CPU.c b/src/armv5/CPU.c index 585506f..055b00d 100755 --- a/src/armv5/CPU.c +++ b/src/armv5/CPU.c @@ -100,7 +100,7 @@ static _INLINE_ void cpuPrvSetPC(ArmCpu* cpu, UInt32 pc){ cpu->regs[15] = pc &~ 1UL; cpu->CPSR &=~ ARM_SR_T; if(pc & 1) cpu->CPSR |= ARM_SR_T; - //else if(pc & 2) cpu->emulErrF(cpu, "Attempt to branch to non-word-aligned ARM address");//with 32 bit alignment restrictions + //else if(pc & 2) cpu->emulErrF(cpu, "Attempt to branch to non-word-aligned ARM address"); } static _INLINE_ UInt32 cpuPrvGetReg(ArmCpu* cpu, UInt8 reg, Boolean wasT, Boolean specialPC){ @@ -109,8 +109,7 @@ static _INLINE_ UInt32 cpuPrvGetReg(ArmCpu* cpu, UInt8 reg, Boolean wasT, Boolea ret = cpu->regs[reg]; if(reg == 15) ret += (wasT) ? 2 : 4; - //if(wasT && specialPC) ret &=~ 3UL;//with 32 bit alignment restrictions - if(wasT && specialPC) ret &=~ 1UL;//without 32 bit alignment restrictions + if(wasT && specialPC) ret &=~ 3UL; return ret; } @@ -2354,15 +2353,8 @@ static Err cpuPrvCycleThumb(ArmCpu* cpu){ case 3: // BX if(instrT == 0x4778){ //special handing for thumb's "BX PC" as aparently docs are wrong on it - //with 32 bit alignment restrictions - //cpuPrvSetPC(cpu, (cpu->regs[15] + 2) &~ 3UL); - - //without 32 bit alignment restrictions - { - UInt32 oldA1 = cpu->regs[15] & 2UL; - cpuPrvSetPC(cpu, ((cpu->regs[15] + 2) &~ 3UL) | oldA1); - } - + + cpuPrvSetPC(cpu, (cpu->regs[15] + 2) &~ 3UL); goto instr_done; } @@ -2566,16 +2558,7 @@ static Err cpuPrvCycleThumb(ArmCpu* cpu){ case 1: //BLX(1)_suffix instr = cpu->regs[15]; - - //with 32 bit alignment restrictions - //cpu->regs[15] = (cpu->regs[14] + 2 + (((UInt32)v16) << 1)) &~ 3UL; - - //without 32 bit alignment restrictions - { - UInt32 oldA1 = cpu->regs[15] & 2UL; - cpu->regs[15] = ((cpu->regs[14] + 2 + (((UInt32)v16) << 1)) &~ 3UL) | oldA1; - } - + cpu->regs[15] = (cpu->regs[14] + 2 + (((UInt32)v16) << 1)) &~ 3UL; cpu->regs[14] = instr | 1UL; cpu->CPSR &=~ ARM_SR_T; goto instr_done;