diff --git a/qtBuildSystem/Mu/Mu.pro.user b/qtBuildSystem/Mu/Mu.pro.user index a6d6cbd..1fb7690 100644 --- a/qtBuildSystem/Mu/Mu.pro.user +++ b/qtBuildSystem/Mu/Mu.pro.user @@ -1,6 +1,6 @@ - + EnvironmentId diff --git a/src/hardwareRegisters.c b/src/hardwareRegisters.c index a22da89..85b9129 100644 --- a/src/hardwareRegisters.c +++ b/src/hardwareRegisters.c @@ -62,7 +62,7 @@ static inline void pllWakeCpuIfOff(){ } static inline bool pllOn(){ - return (registerArrayRead16(PLLCR) & 0x0008) == 0; + return !CAST_TO_BOOL(registerArrayRead16(PLLCR) & 0x0008); } static inline void setCsa(uint16_t value){ @@ -135,9 +135,9 @@ static inline void setCsgba(uint16_t value){ //add extra address bits if enabled if(csugba & 0x8000) - chips[CHIP_A_ROM].start = ((csugba >> 12) & 0x0007) << 29 | (value >> 1) << 13; + chips[CHIP_A_ROM].start = ((csugba >> 12) & 0x0007) << 29 | (value >> 1) << 14; else - chips[CHIP_A_ROM].start = (value >> 1) << 13; + chips[CHIP_A_ROM].start = (value >> 1) << 14; registerArrayWrite16(CSGBA, value & 0xFFFE); } @@ -147,9 +147,9 @@ static inline void setCsgbb(uint16_t value){ //add extra address bits if enabled if(csugba & 0x8000) - chips[CHIP_B_SED].start = ((csugba >> 8) & 0x0007) << 29 | (value >> 1) << 13; + chips[CHIP_B_SED].start = ((csugba >> 8) & 0x0007) << 29 | (value >> 1) << 14; else - chips[CHIP_B_SED].start = (value >> 1) << 13; + chips[CHIP_B_SED].start = (value >> 1) << 14; registerArrayWrite16(CSGBB, value & 0xFFFE); } @@ -159,9 +159,9 @@ static inline void setCsgbc(uint16_t value){ //add extra address bits if enabled if(csugba & 0x8000) - chips[CHIP_C_USB].start = ((csugba >> 4) & 0x0007) << 29 | (value >> 1) << 13; + chips[CHIP_C_USB].start = ((csugba >> 4) & 0x0007) << 29 | (value >> 1) << 14; else - chips[CHIP_C_USB].start = (value >> 1) << 13; + chips[CHIP_C_USB].start = (value >> 1) << 14; registerArrayWrite16(CSGBC, value & 0xFFFE); } @@ -171,9 +171,9 @@ static inline void setCsgbd(uint16_t value){ //add extra address bits if enabled if(csugba & 0x8000) - chips[CHIP_D_RAM].start = (csugba & 0x0007) << 29 | (value >> 1) << 13; + chips[CHIP_D_RAM].start = (csugba & 0x0007) << 29 | (value >> 1) << 14; else - chips[CHIP_D_RAM].start = (value >> 1) << 13; + chips[CHIP_D_RAM].start = (value >> 1) << 14; registerArrayWrite16(CSGBD, value & 0xFFFE); } diff --git a/src/memoryAccess.c b/src/memoryAccess.c index b883c5e..56173c0 100644 --- a/src/memoryAccess.c +++ b/src/memoryAccess.c @@ -96,6 +96,9 @@ unsigned int m68k_read_memory_8(unsigned int address){ case CHIP_B_SED: return sed1376Read8(address); + case CHIP_C_USB: + return 0x00; + case CHIP_D_RAM: return ramRead8(address); @@ -129,6 +132,9 @@ unsigned int m68k_read_memory_16(unsigned int address){ case CHIP_B_SED: return sed1376Read16(address); + case CHIP_C_USB: + return 0x0000; + case CHIP_D_RAM: return ramRead16(address); @@ -162,6 +168,9 @@ unsigned int m68k_read_memory_32(unsigned int address){ case CHIP_B_SED: return sed1376Read32(address); + case CHIP_C_USB: + return 0x00000000; + case CHIP_D_RAM: return ramRead32(address); @@ -197,6 +206,9 @@ void m68k_write_memory_8(unsigned int address, unsigned int value){ sed1376Write8(address, value); break; + case CHIP_C_USB: + break; + case CHIP_D_RAM: ramWrite8(address, value); break; @@ -233,6 +245,9 @@ void m68k_write_memory_16(unsigned int address, unsigned int value){ sed1376Write16(address, value); break; + case CHIP_C_USB: + break; + case CHIP_D_RAM: ramWrite16(address, value); break; @@ -255,7 +270,6 @@ void m68k_write_memory_16(unsigned int address, unsigned int value){ } void m68k_write_memory_32(unsigned int address, unsigned int value){ - uint8_t addressType = bankType[START_BANK(address)]; if(!probeWrite(addressType, address)) @@ -270,6 +284,9 @@ void m68k_write_memory_32(unsigned int address, unsigned int value){ sed1376Write32(address, value); break; + case CHIP_C_USB: + break; + case CHIP_D_RAM: ramWrite32(address, value); break; @@ -318,13 +335,16 @@ static uint8_t getProperBankType(uint32_t bank){ else if(chips[CHIP_A_ROM].enable && BANK_IN_RANGE(bank, chips[CHIP_A_ROM].start, chips[CHIP_A_ROM].size)){ return CHIP_A_ROM; } - else if(chips[CHIP_D_RAM].enable && BANK_IN_RANGE(bank, chips[CHIP_D_RAM].start, chips[CHIP_D_RAM].size)){ - return CHIP_D_RAM; - } else if(chips[CHIP_B_SED].enable && BANK_IN_RANGE(bank, chips[CHIP_B_SED].start, chips[CHIP_B_SED].size) && sed1376ClockConnected()){ return CHIP_B_SED; } - + else if(chips[CHIP_C_USB].enable && BANK_IN_RANGE(bank, chips[CHIP_C_USB].start, chips[CHIP_C_USB].size)){ + return CHIP_C_USB; + } + else if(chips[CHIP_D_RAM].enable && BANK_IN_RANGE(bank, chips[CHIP_D_RAM].start, chips[CHIP_D_RAM].size)){ + return CHIP_D_RAM; + } + return CHIP_NONE; } diff --git a/src/memoryAccess.h b/src/memoryAccess.h index c981b3e..b4b8edf 100644 --- a/src/memoryAccess.h +++ b/src/memoryAccess.h @@ -4,12 +4,13 @@ //address space //new bank size (0x4000) -#define NUM_BANKS(areaSize) ((areaSize) & 0x00003FFF ? ((areaSize) >> 14) + 1 : (areaSize) >> 14) -#define START_BANK(address) ((address) >> 14) +#define BANK_SCOOT 14 +#define NUM_BANKS(areaSize) ((areaSize) & 0x00003FFF ? ((areaSize) >> BANK_SCOOT) + 1 : (areaSize) >> BANK_SCOOT) +#define START_BANK(address) ((address) >> BANK_SCOOT) #define END_BANK(address, size) (START_BANK(address) + NUM_BANKS(size) - 1) #define BANK_IN_RANGE(bank, address, size) ((bank) >= START_BANK(address) && (bank) <= END_BANK(address, size)) -#define BANK_ADDRESS(bank) ((bank) << 14) -#define TOTAL_MEMORY_BANKS 0x40000 +#define BANK_ADDRESS(bank) ((bank) << BANK_SCOOT) +#define TOTAL_MEMORY_BANKS (1 << (32 - BANK_SCOOT))//0x40000 banks for BANK_SCOOT = 14 //chip addresses and sizes #define REG_START_ADDRESS 0xFFFFF000