From c89da487397ef2ebc4e70c82f3cbae9089db3078 Mon Sep 17 00:00:00 2001 From: meepingsnesroms Date: Fri, 17 May 2019 21:46:23 -0700 Subject: [PATCH] Fix crashing with ARMv5 core --- src/armv5te/mem.c | 2 +- src/armv5te/mem.h | 2 +- src/pxa255/pxa255.c | 11 ++--------- 3 files changed, 4 insertions(+), 11 deletions(-) diff --git a/src/armv5te/mem.c b/src/armv5te/mem.c index 8adc325..9a73146 100644 --- a/src/armv5te/mem.c +++ b/src/armv5te/mem.c @@ -24,7 +24,7 @@ void bad_write_half(uint32_t addr, uint16_t value) { warn("Bad write_half: %08x void bad_write_word(uint32_t addr, uint32_t value) { warn("Bad write_word: %08x %08x", addr, value); } uint8_t *mem_and_flags = NULL; -struct mem_area_desc mem_areas[4]; +struct mem_area_desc mem_areas[2]; void *phys_mem_ptr(uint32_t addr, uint32_t size) { unsigned int i; diff --git a/src/armv5te/mem.h b/src/armv5te/mem.h index b7bdf56..25a5213 100644 --- a/src/armv5te/mem.h +++ b/src/armv5te/mem.h @@ -26,7 +26,7 @@ struct mem_area_desc { uint32_t base, size; uint8_t *ptr; }; -extern struct mem_area_desc mem_areas[4]; +extern struct mem_area_desc mem_areas[2]; void *phys_mem_ptr(uint32_t addr, uint32_t size); uint32_t phys_mem_addr(void *ptr); diff --git a/src/pxa255/pxa255.c b/src/pxa255/pxa255.c index 5c4e052..e1092ab 100644 --- a/src/pxa255/pxa255.c +++ b/src/pxa255/pxa255.c @@ -60,15 +60,8 @@ bool pxa255Init(uint8_t** returnRom, uint8_t** returnRam){ mem_areas[1].ptr = mem_and_flags + mem_offset; mem_offset += TUNGSTEN_C_RAM_SIZE; - //PCMCIA0/1 - mem_areas[2].base = PXA255_PCMCIA0_START_ADDRESS; - mem_areas[2].size = PXA255_PCMCIA0_SIZE + PXA255_PCMCIA1_SIZE; - mem_areas[2].ptr = NULL; - - //CPU registers - mem_areas[3].base = PXA255_REG_START_ADDRESS; - mem_areas[3].size = PXA255_REG_SIZE;//size of address space, not all of it is mapped - mem_areas[3].ptr = NULL; + //memory regions that are not directly mapped to a buffer are not added to mem_areas + //adding them will cause SIGSEGVs //accessors //default