Files
Mu/disassemblyNotes.txt
meepingsnesroms a275c8eca0 Allow IMR to mask interrupts after they are created
This can be used to acknowledge level triggered interrupts which cant be cleared.
2018-07-18 12:03:06 -07:00

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PFPUEN has both pull up and pull down on it, the 4 address lines are the pull downs
cmp.* seems like it can only set the Carry flag if the result or one of the parameters is negative
The first argument to a function is the last pushed on the stack(proof below, the 16 bit int is the last argument and its pushed first)
ROM:1003026C move.w d0,-(sp) ; Move Data from Source to Destination
ROM:1003026E move.l a4,-(sp) ; Move Data from Source to Destination
ROM:10030270 move.l d7,-(sp) ; Move Data from Source to Destination
ROM:10030272 trap #$F ; Trap sysTrapStrNCopy
ROM:10030272 dc.w $A2CE
Char * StrNCopy(Char *dst, const Char *src, Int16 n)SYS_TRAP(sysTrapStrNCopy);
HwrIRQ4Handler Interrupt Level 4 Priority(top of the list is checked first):
UART 1 and 2(they have the same priority)
RTC
All Buttons
IVR = 0x18
interrupt vector start = 0x60
vectors starting at level 0(no interrupt) to level 7
0x00000060:0x00000000 (no interrupt, never called)
0x00000064:0x101904BE
0x00000068:0x101904EC
0x0000006C:0x1019051A
0x00000070:0x10190548 (level 4, hardware buttons)
0x00000074:0x10190576 (level 5, seems to be touchscreen)
0x00000078:0x101905A4
0x0000007C:0x10015F34 (level 7, debugging IRQ, not used)
SPI Routine Location:
PrvSetBB7846ChanRef or PrvReadnBB7846PwrDn
0x10081518
SPI Start Chunk(sent once on boot):
12 4 bit delay, 8 bit check battery command, 0x0AE0
5 5 bit receive, continued from last command, 0x0014
Palm OS reads from the touchscreen SPI in 5 accesses:
SPI2 transfer, ENABLE:true, XCH:true, IRQ:false, IRQEN:false, BITCOUNT:16(printed 1 times)
SPI2 transfer, before:0xE01B, after:0x00FF(printed 1 times)
SPI2 transfer, ENABLE:true, XCH:true, IRQ:false, IRQEN:false, BITCOUNT:3(printed 1 times)
SPI2 transfer, before:0x0004, after:0x0026(printed 1 times)
SPI2 transfer, ENABLE:true, XCH:true, IRQ:false, IRQEN:false, BITCOUNT:5(printed 1 times)
SPI2 transfer, before:0x001D, after:0x03BF(printed 1 times)
SPI2 transfer, ENABLE:true, XCH:true, IRQ:false, IRQEN:false, BITCOUNT:12(printed 1 times)
SPI2 transfer, before:0x0E1C, after:0xCE00(printed 1 times)
SPI2 transfer, ENABLE:true, XCH:true, IRQ:false, IRQEN:false, BITCOUNT:16(printed 1 times)
SPI2 transfer, before:0xE01C, after:0xFEFF(printed 1 times)
resync event?{
16 0xE01B
3 only sends 0s, delay or receive, 0x0004
5 only sends 0s, delay or receive, 0x001D
}
12 4 bit delay, 8 bit send command, 0x0E1C
16 0xE01C
TouchScreen Read Order:
//check x
Accessed ADS7846 Ch:5, Normal Mode, Power Save:0, PC:0x1008119E.(printed 1 times)
//don't know why
Accessed ADS7846 Ch:0, Normal Mode, Power Save:3, PC:0x10081208.(printed 1 times)
//don't know why
Accessed ADS7846 Ch:6, Normal Mode, Power Save:3, PC:0x10081208.(printed 1 times)
//...repeat until released
//check battery before returning
Accessed ADS7846 Ch:2, Normal Mode, Power Save:3, PC:0x10081208.(printed 1 times)