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54 lines
1.8 KiB
Plaintext
54 lines
1.8 KiB
Plaintext
//stuck on timer wait, inside interrupt level 6 handler
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PCR
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TYPE RESET
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Peripheral Control Register 0x(FF)FFF003
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PCR T field could be set to use timer chaining
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CPU wrote 16 bits of 0x00000000 to register 0x60A, PC 0x10083BF0.
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#define kChannelSet1 \
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kChannelTemp0, \
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kChannelPenY, \
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kChannelBattery7846, \
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kChannelUnused, \
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kChannelUnused, \
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kChannelPenX, \
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kChannelDockTwister, \
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kChannelTemp1
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CPU read 8 bits from register 0x0431, PC 0x100815B2.
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CPU read 8 bits from register 0x0420, PC 0x100815B8.
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CPU read 8 bits from register 0x0421, PC 0x100815BE.
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SPI2 transfer, ENABLE:true, XCH:false, IRQ:false, IRQEN:false, BITCOUNT:12 //XCH false, does nothing
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SPI2 transfer, ENABLE:true, XCH:true, IRQ:false, IRQEN:false, BITCOUNT:12
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SPI2 transfer, ENABLE:true, XCH:false, IRQ:false, IRQEN:false, BITCOUNT:5 //XCH false, does nothing
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SPI2 transfer, ENABLE:true, XCH:true, IRQ:false, IRQEN:false, BITCOUNT:5
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SPI2 transfer, ENABLE:true, XCH:false, IRQ:false, IRQEN:false, BITCOUNT:16 //XCH false, does nothing
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SPI2 transfer, ENABLE:true, XCH:true, IRQ:false, IRQEN:false, BITCOUNT:16
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SPI2 transfer, ENABLE:true, XCH:true, IRQ:false, IRQEN:false, BITCOUNT:3
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SPI2 transfer, ENABLE:false, XCH:false, IRQ:false, IRQEN:false, BITCOUNT:1 //XCH false, does nothing
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CPU read 8 bits from register 0x0431, PC 0x10081A04.
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CPU read 8 bits from register 0x0431, PC 0x100815B2.
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CPU read 8 bits from register 0x0420, PC 0x100815B8.
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CPU read 8 bits from register 0x0421, PC 0x100815BE.
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//copilots SPI touch code
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case SPIMCONT:
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db_SPIMCONT.x = value;
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if (db_SPIMCONT.anon.XCH && db_SPIMCONT.anon.IRQEN) {
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db_SPIMCONT.anon.SPIMIRQ = 1;
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db_SPIMCONT.anon.XCH = 0;
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switch (db_PFDATA.x & 0x0f) {
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case 0x6:
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db_SPIMDATA.x = (0xff - CustShptr->penx) * 2;
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break;
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case 0x9:
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db_SPIMDATA.x = (0xff - CustShptr->peny) * 2;
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break;
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}
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}
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break; |