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CPU: Add cop0 breakpoint checks for coprocessor loadstores
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@@ -1974,6 +1974,12 @@ restart_instruction:
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}
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const VirtualMemoryAddress addr = ReadReg(inst.i.rs) + inst.i.imm_sext32();
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if constexpr (debug)
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{
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Cop0DataBreakpointCheck<MemoryAccessType::Read>(addr);
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MemoryBreakpointCheck<MemoryAccessType::Read>(addr);
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}
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u32 value;
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if (!ReadMemoryWord(addr, &value))
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return;
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@@ -1997,6 +2003,12 @@ restart_instruction:
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StallUntilGTEComplete();
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const VirtualMemoryAddress addr = ReadReg(inst.i.rs) + inst.i.imm_sext32();
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if constexpr (debug)
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{
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Cop0DataBreakpointCheck<MemoryAccessType::Write>(addr);
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MemoryBreakpointCheck<MemoryAccessType::Write>(addr);
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}
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const u32 value = GTE::ReadRegister(ZeroExtend32(static_cast<u8>(inst.i.rt.GetValue())));
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WriteMemoryWord(addr, value);
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@@ -2005,16 +2017,46 @@ restart_instruction:
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}
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break;
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// swc0/lwc0/cop1/cop3 are essentially no-ops
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// cop1/cop3 are essentially no-ops
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case InstructionOp::cop1:
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case InstructionOp::cop3:
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{
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}
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break;
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case InstructionOp::lwc0:
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case InstructionOp::lwc1:
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case InstructionOp::lwc3:
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{
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// todo: check enable
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// lwc0/1/3 should still perform the memory read, but discard the result
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const VirtualMemoryAddress addr = ReadReg(inst.i.rs) + inst.i.imm_sext32();
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if constexpr (debug)
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{
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Cop0DataBreakpointCheck<MemoryAccessType::Read>(addr);
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MemoryBreakpointCheck<MemoryAccessType::Read>(addr);
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}
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u32 value;
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ReadMemoryWord(addr, &value);
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}
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break;
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break;
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case InstructionOp::swc0:
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case InstructionOp::swc1:
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case InstructionOp::swc3:
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{
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// todo: check enable
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// lwc0/1/3 should still perform the memory read, but discard the result
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const VirtualMemoryAddress addr = ReadReg(inst.i.rs) + inst.i.imm_sext32();
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if constexpr (debug)
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{
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Cop0DataBreakpointCheck<MemoryAccessType::Write>(addr);
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MemoryBreakpointCheck<MemoryAccessType::Write>(addr);
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}
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WriteMemoryWord(addr, 0);
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}
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break;
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