[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 8

The attached patches provides part 8 of an architecture implementation
for the Tensilica Xtensa CPU series.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Chris Zankel
2005-06-23 22:01:33 -07:00
committed by Linus Torvalds
parent e344b63eee
commit 7282bee787
8 changed files with 1967 additions and 0 deletions

View File

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/*
* include/asm-xtensa/platform-iss/hardware.h
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2001 Tensilica Inc.
*/
/*
* This file contains the default configuration of ISS.
*/
#ifndef __ASM_XTENSA_ISS_HARDWARE
#define __ASM_XTENSA_ISS_HARDWARE
/*
* Memory configuration.
*/
#define PLATFORM_DEFAULT_MEM_START XSHAL_RAM_PADDR
#define PLATFORM_DEFAULT_MEM_SIZE XSHAL_RAM_VSIZE
/*
* Interrupt configuration.
*/
#endif /* __ASM_XTENSA_ISS_HARDWARE */