Commit Graph

12 Commits

Author SHA1 Message Date
Zhou, Jie
e26d3e911c ENGR00143019-2 GPU: enable MMU
With MMU enabled, there is no need to reserve memory for GPU
at boot time

Signed-off-by: Zhou, Jie <b30303@freescale.com>
(cherry picked from commit 326da1d885108399f4e22d10a8fe341a7a110ffc)
2011-06-28 12:47:06 -05:00
Zhou, Jie
99f16398f4 ENGR00141400 GPU: Improve GPU clock gating
seperate interrupt handling and clk_enable for Z160 and Z430

Signed-off-by: Zhou, Jie <b30303@freescale.com>
(cherry picked from commit 7da21af984a50ffb166ab1a088cd2c5d4313537b)
2011-06-28 12:42:22 -05:00
Matt Sealey
5898cfa2ad amd-gpu: enable limiting of in-flight AXI transactions for Z160 GPU 2011-03-06 16:52:35 -06:00
Jie Zhou
95ee853082 ENGR00134150 GPU: destroy device in workqueue for error interrupts
If GPU error interrupt detected, related device will be destroyed.
In the destory function, device_idle and mutex_lock may cause sleep,
which may cause kernel crash, so delay the device destroy to the
workqueue to avoid this.

Signed-off-by: Jie Zhou <b30303@freescale.com>
2011-01-18 09:37:34 -06:00
Matt Sealey
26a3feaa56 AMD GPU update 2010-11-13 10:32:27 -06:00
Jie Zhou
73685d49b8 ENGR00126565-2 GPU: Provide z160 precision info to user space libraries
MX50 Z160 has higher gradient/texture precision than MX51/53.

Signed-off-by: Jie Zhou <b30303@freescale.com>
2010-11-13 10:10:00 -06:00
Jie Zhou
ef5ea51ba2 ENGR00126064 GPU: disable mmu to pass OpenVG CTS
If enabled MMU, there is AXI read/write error on MX508 when run
OpenVG CTS.

Besides, change EMEM1 size to 10MB by default to make gpu driver
work on MX50_ARM2 board with 128MB memory installed.

Signed-off-by: Jie Zhou <b30303@freescale.com>
2010-11-13 10:09:43 -06:00
Jie Zhou
90875b3f6c ENGR00125984 GPU: enable MMU for MX508 and MX35
Remove GSL_MMU_TRANSLATION_ENABLED macro originally used for conditional
compile, and replace it with runtime check to support one mx5x image

Signed-off-by: Jie Zhou <b30303@freescale.com>
2010-11-13 10:09:41 -06:00
Jie Zhou
dd4baeffab ENGR00125615 GPU: disable z160 in gsl when X-Accel enabled
When X-accel is enabled, uio driver is used for X server to access
z160 device, so in gsl, we should not operate z160 to avoid conflicts

Signed-off-by: Jie Zhou <b30303@freescale.com>
2010-11-13 10:08:00 -06:00
Jie Zhou
373272e191 ENGR00125729-2 GPU: merge hal for MX35/MX50 and MX51/MX53
Add MX508 support, and adapt the gpu driver to one image

Signed-off-by: Jie Zhou <b30303@freescale.com>
2010-11-13 10:07:57 -06:00
r80085
b8ed88ab15 ENGR00125256 Integrate AMD Rc16/EA VG/GL fix to GPU kernel module
Fix the VG/GL issue in GPU kernel module when running VG/GL at the same time

Signed-off-by: Gene Chouiniere <Gene.Chouiniere@amd.com>
Signed-off-by: r80085 <thomas.peng@freescale.com>
Acked-by: Rob Herring <r.herring@freescale.com>
2010-08-10 11:51:57 -05:00
Gene Chouiniere
da25d30bfa ENGR00125010-1 gpu: add gpu driver support
Migrate from RC14 with freescale changes.

Signed-off-by: Gene Chouiniere <Gene.Chouiniere@amd.com>
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Rob Herring <r.herring@freescale.com>
2010-08-10 11:51:46 -05:00