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2811c4a4ef
Everything still works. Includes a Wild mashup of Freescale ENGR00143019 which concludes GPU MMU support for the platform.
166 lines
5.0 KiB
C
166 lines
5.0 KiB
C
/*
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* Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#ifndef _FSL_DEVICE_H_
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#define _FSL_DEVICE_H_
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#include <linux/types.h>
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/*
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* Some conventions on how we handle peripherals on Freescale chips
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*
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* unique device: a platform_device entry in fsl_plat_devs[] plus
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* associated device information in its platform_data structure.
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*
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* A chip is described by a set of unique devices.
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*
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* Each sub-arch has its own master list of unique devices and
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* enumerates them by enum fsl_devices in a sub-arch specific header
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*
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* The platform data structure is broken into two parts. The
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* first is device specific information that help identify any
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* unique features of a peripheral. The second is any
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* information that may be defined by the board or how the device
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* is connected externally of the chip.
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*
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* naming conventions:
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* - platform data structures: <driver>_platform_data
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* - platform data device flags: FSL_<driver>_DEV_<FLAG>
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* - platform data board flags: FSL_<driver>_BRD_<FLAG>
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*
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*/
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enum fsl_usb2_operating_modes {
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FSL_USB2_MPH_HOST,
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FSL_USB2_DR_HOST,
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FSL_USB2_DR_DEVICE,
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FSL_USB2_DR_OTG,
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};
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/* this used for usb port type */
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enum fsl_usb2_modes {
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FSL_USB_DR_HOST,
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FSL_USB_DR_DEVICE,
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FSL_USB_MPH_HOST1,
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FSL_USB_MPH_HOST2,
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FSL_USB_UNKNOWN, /* unkonwn status */
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};
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enum fsl_usb2_phy_modes {
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FSL_USB2_PHY_NONE,
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FSL_USB2_PHY_ULPI,
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FSL_USB2_PHY_UTMI,
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FSL_USB2_PHY_UTMI_WIDE,
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FSL_USB2_PHY_SERIAL,
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};
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struct platform_device;
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struct fsl_usb2_platform_data {
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/* board specific information */
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enum fsl_usb2_operating_modes operating_mode;
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enum fsl_usb2_phy_modes phy_mode;
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unsigned int port_enables;
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char *name; /* pretty print */
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int (*platform_init) (struct platform_device *);
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void (*platform_uninit) (struct fsl_usb2_platform_data *);
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void __iomem *regs; /* ioremap'd register base */
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u32 phy_regs; /* usb phy register base */
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u32 xcvr_type; /* PORTSC_PTS_* */
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char *transceiver; /* transceiver name */
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unsigned power_budget; /* for hcd->power_budget */
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struct platform_device *pdev;
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struct fsl_xcvr_ops *xcvr_ops;
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struct fsl_xcvr_power *xcvr_pwr;
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int (*gpio_usb_active) (void);
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void (*gpio_usb_inactive) (void);
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void (*usb_clock_for_pm) (bool);
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void (*platform_suspend)(struct fsl_usb2_platform_data *);
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void (*platform_resume)(struct fsl_usb2_platform_data *);
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void (*wake_up_enable)(struct fsl_usb2_platform_data *pdata, bool on);
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void (*platform_driver_vbus)(bool on); /* platform special function for vbus shutdown/open */
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unsigned big_endian_mmio : 1;
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unsigned big_endian_desc : 1;
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unsigned es : 1; /* need USBMODE:ES */
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unsigned have_sysif_regs : 1;
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unsigned le_setup_buf : 1;
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unsigned change_ahb_burst:1;
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unsigned ahb_burst_mode:3;
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unsigned suspended : 1;
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unsigned already_suspended : 1;
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u32 id_gpio;
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/* register save area for suspend/resume */
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u32 pm_command;
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u32 pm_status;
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u32 pm_intr_enable;
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u32 pm_frame_index;
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u32 pm_segment;
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u32 pm_frame_list;
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u32 pm_async_next;
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u32 pm_configured_flag;
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u32 pm_portsc;
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};
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/* Flags in fsl_usb2_mph_platform_data */
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#define FSL_USB2_PORT0_ENABLED 0x00000001
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#define FSL_USB2_PORT1_ENABLED 0x00000002
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struct spi_device;
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struct fsl_spi_platform_data {
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u32 initial_spmode; /* initial SPMODE value */
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s16 bus_num;
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bool qe_mode;
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/* board specific information */
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u16 max_chipselect;
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void (*cs_control)(struct spi_device *spi, bool on);
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u32 sysclk;
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};
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struct fsl_ata_platform_data {
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int adma_flag; /* AMDA mode is used or not, 1:used.*/
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int udma_mask; /* UDMA modes h/w can handle */
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int mwdma_mask; /* MDMA modes h/w can handle */
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int pio_mask; /* PIO modes h/w can handle */
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int fifo_alarm; /* value for fifo_alarm reg */
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int max_sg; /* longest sglist h/w can handle */
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int (*init)(struct platform_device *pdev);
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void (*exit)(void);
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char *io_reg;
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char *core_reg;
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};
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struct mxc_gpu_platform_data {
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int z160_revision;
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int enable_mmu;
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};
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struct mpc8xx_pcmcia_ops {
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void(*hw_ctrl)(int slot, int enable);
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int(*voltage_set)(int slot, int vcc, int vpp);
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};
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/* Returns non-zero if the current suspend operation would
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* lead to a deep sleep (i.e. power removed from the core,
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* instead of just the clock).
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*/
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int fsl_deep_sleep(void);
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#endif /* _FSL_DEVICE_H_ */
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