/*
 *  qemu user cpu loop
 *
 *  Copyright (c) 2003-2008 Fabrice Bellard
 *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, see <http://www.gnu.org/licenses/>.
 */

#include "qemu/osdep.h"
#include "qemu.h"
#include "user-internals.h"
#include "user/cpu_loop.h"
#include "target/hexagon/internal.h"
#include "signal-common.h"
#include "internal.h"

void cpu_loop(CPUHexagonState *env)
{
    CPUState *cs = env_cpu(env);
    int trapnr;
    target_ulong syscallnum;
    target_ulong ret;

    for (;;) {
        cpu_exec_start(cs);
        trapnr = cpu_exec(cs);
        cpu_exec_end(cs);
        qemu_process_cpu_events(cs);

        switch (trapnr) {
        case EXCP_INTERRUPT:
            /* just indicate that signals should be handled asap */
            break;
        case HEX_EVENT_TRAP0:
            syscallnum = env->gpr[6];
            env->gpr[HEX_REG_PC] += 4;
            ret = do_syscall(env,
                             syscallnum,
                             env->gpr[0],
                             env->gpr[1],
                             env->gpr[2],
                             env->gpr[3],
                             env->gpr[4],
                             env->gpr[5],
                             0, 0);
            if (ret == -QEMU_ERESTARTSYS) {
                env->gpr[HEX_REG_PC] -= 4;
            } else if (ret != -QEMU_ESIGRETURN && ret != -QEMU_ESETPC) {
                env->gpr[0] = ret;
            }
            break;
        case HEX_EVENT_PRECISE:
            switch (env->cause_code) {
            case HEX_CAUSE_FETCH_NO_UPAGE:
            case HEX_CAUSE_PRIV_NO_UREAD:
            case HEX_CAUSE_PRIV_NO_UWRITE:
            force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_MAPERR,
                    env->gpr[HEX_REG_PC]);

            break;
            case HEX_CAUSE_PRIV_USER_NO_GINSN:
            case HEX_CAUSE_PRIV_USER_NO_SINSN:
            case HEX_CAUSE_INVALID_PACKET:
            force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC,
                    env->gpr[HEX_REG_PC]);
            break;
            default:
                EXCP_DUMP(env, "\nqemu: unhandled CPU precise exception "
                    "cause code 0x%x - aborting\n",
                    env->cause_code);
                exit(EXIT_FAILURE);
            }
            break;
        case HEX_CAUSE_PC_NOT_ALIGNED:
            force_sig_fault(TARGET_SIGBUS, TARGET_BUS_ADRALN,
                            env->gpr[HEX_REG_R31]);
            break;
        case HEX_CAUSE_INVALID_PACKET:
        case HEX_CAUSE_REG_WRITE_CONFLICT:
            force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC,
                            env->gpr[HEX_REG_PC]);
            break;
        case EXCP_ATOMIC:
            cpu_exec_step_atomic(cs);
            break;
        case EXCP_DEBUG:
            force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, 0);
            break;
        default:
            EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
                     trapnr);
            exit(EXIT_FAILURE);
        }
        process_pending_signals(env);
    }
}

void init_main_thread(CPUState *cs, struct image_info *info)
{
    CPUArchState *env = cpu_env(cs);

    env->gpr[HEX_REG_PC] = info->entry;
    env->gpr[HEX_REG_SP] = info->start_stack;
    env->gpr[HEX_REG_USR] = 0x56000;
}
