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https://github.com/qemu/qemu.git
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Merge tag 'accel-20260706' of https://github.com/philmd/qemu into staging
Accelerators patches queue - Various cleanups around debugging APIs - Correctly check singlestep flag enabled in CPUState - Fix possible memory corruption with MSHV (CID 1660876) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmpLsRwACgkQ4+MsLN6t # wN7TRRAAhTnAG0VuUat9MYUCuWWSiTrNKm6m2vVcO+Zec/bBbU1+twBSBzVQ/rwm # kGzImAWip6nYorU5BxTKePlpCy6Rm+t0evYaA5ixF0aXtmm3n6IGIMSsi5yEJxF5 # YHDXxvpD56Z1p8kRvkp4ynABiiF5gfBFqbSuI7/gxSI2tcJ2uSx8MC+HEO/X4vJc # +Clich5n4eyN7YL7vqGrVl84cqHOwe40bXAm1OOa5S83/y2hc//SHgFqTB8BL1P7 # 9SafbFIFiqbfy4kWV86mSu3LDsSYLoIU7bgpRb9mX9WVrvfuoQeVUf7XH+fjmqIo # s/2uHN6ha/h12jS1q0nCYu585EzXCuPRF3upSslPaoEd16sFEO6ZiODmaMIsomA2 # SlCM3jGYUUw+vkfS/+SJUF17QEHtv0R8Dp5IfseE9Tp+huYvJuwn3Qh4UwbVRg0P # YHoRa2KiXvBPntY/GkyhCL9Y5oWC5RaRHyKxMs83tdUouOeBy2t/ftnVtDqeRn3p # 04W+pilUEodSnzcNfAGxQhkqDeGIOveRubaeNICgmxO0Bp9dMUZIOju84hY77KEw # hClBI87cOc1REC7YNXkoouWcr8moNSZlKAyIbTf/Ag5cAheYOSvO5UDDVVepudSl # kER+S1iuPkeb0uVvnvk5Kh4UBCMwdfYKe9bNu/SB0ab6N3IpY4s= # =knBq # -----END PGP SIGNATURE----- # gpg: Signature made Mon 06 Jul 2026 15:43:56 CEST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'accel-20260706' of https://github.com/philmd/qemu: (32 commits) cpu: Only check SSTEP_ENABLE flag in cpu_single_stepping() cpu: Rename CPUState @singlestep_enabled -> @singlestep_flags cpu: Introduce cpu_single_stepping() helper cpu: Better name cpu_single_step() trace event accel/tcg: Improve docstrings around TCGCPUOps::*watchpoint* handlers target/ppc: Ensure TCG is used in ppc_update_daw() target/arm: Inline check_watchpoints() in arm_debug_check_watchpoint() accel: Use GdbBreakpointType enum gdbstub: Introduce GdbBreakpointType enumerator gdbstub: Reduce @type variable scope gdbstub/user: Directly call gdb_breakpoint_remove_all() in user mode accel: Remove unnecessary 'inline' qualifier in remove_all_breakpoints cpu: Move BREAKPOINT definitions to 'exec/breakpoint.h' cpu: Move cpu_breakpoint_test out of line accel: Remove AccelOpsClass::supports_guest_debug accel: Hold @can_reverse information in AccelGdbConfig gdbstub: Make default replay_mode value explicit in stubs accel: Have each implementation return their AccelGdbConfig gdbstub: Move supported_sstep_flags in AccelGdbConfig structure gdbstub: Reduce gdb_supports_guest_debug() scope ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
@@ -13,6 +13,7 @@
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#include "qemu/accel.h"
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#include "exec/vaddr.h"
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#include "qom/object.h"
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#include "gdbstub/enums.h"
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#define ACCEL_OPS_SUFFIX "-ops"
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#define TYPE_ACCEL_OPS "accel" ACCEL_OPS_SUFFIX
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@@ -84,11 +85,12 @@ struct AccelOpsClass {
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int64_t (*get_elapsed_ticks)(void);
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/* gdbstub hooks */
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bool (*supports_guest_debug)(void);
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int (*update_guest_debug)(CPUState *cpu);
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int (*insert_breakpoint)(CPUState *cpu, int type, vaddr addr, vaddr len);
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int (*remove_breakpoint)(CPUState *cpu, int type, vaddr addr, vaddr len);
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void (*remove_all_breakpoints)(CPUState *cpu);
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int (*insert_gdbstub_breakpoint)(CPUState *cpu, GdbBreakpointType type,
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vaddr addr, vaddr len);
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int (*remove_gdbstub_breakpoint)(CPUState *cpu, GdbBreakpointType type,
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vaddr addr, vaddr len);
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void (*remove_all_gdbstub_breakpoints)(CPUState *cpu);
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};
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void generic_handle_interrupt(CPUState *cpu, int mask);
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@@ -13,6 +13,8 @@
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struct AccelState {
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Object parent_obj;
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AccelGdbConfig gdbstub;
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};
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struct AccelClass {
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@@ -36,9 +38,6 @@ struct AccelClass {
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bool (*has_memory)(AccelState *accel, AddressSpace *as,
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hwaddr start_addr, hwaddr size);
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/* gdbstub related hooks */
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int (*gdbstub_supported_sstep_flags)(AccelState *as);
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bool *allowed;
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/*
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* Array of global properties that would be applied when specific
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@@ -250,14 +250,13 @@ struct TCGCPUOps {
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int mmu_idx, uintptr_t retaddr);
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/**
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* @adjust_watchpoint_address: hack for cpu_check_watchpoint used by ARM
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* @adjust_watchpoint_address: hack for cpu_check_watchpoint (used by ARM)
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*/
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vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len);
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/**
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* @debug_check_watchpoint: return true if the architectural
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* watchpoint whose address has matched should really fire, used by ARM
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* and RISC-V
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* watchpoint whose address has matched should really fire.
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*/
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bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp);
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@@ -12,6 +12,20 @@
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#include "exec/vaddr.h"
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#include "exec/memattrs.h"
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/* Breakpoint/watchpoint flags */
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#define BP_MEM_READ 0x01
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#define BP_MEM_WRITE 0x02
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#define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
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#define BP_STOP_BEFORE_ACCESS 0x04
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/* 0x08 currently unused */
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#define BP_GDB 0x10
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#define BP_CPU 0x20
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#define BP_ANY (BP_GDB | BP_CPU)
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#define BP_HIT_SHIFT 6
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#define BP_WATCHPOINT_HIT_READ (BP_MEM_READ << BP_HIT_SHIFT)
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#define BP_WATCHPOINT_HIT_WRITE (BP_MEM_WRITE << BP_HIT_SHIFT)
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#define BP_WATCHPOINT_HIT (BP_MEM_ACCESS << BP_HIT_SHIFT)
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typedef struct CPUBreakpoint {
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vaddr pc;
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int flags; /* BP_* */
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@@ -24,14 +24,10 @@
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#include "exec/hwaddr.h"
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#include "exec/memattrs.h"
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#include "exec/vaddr.h"
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#include "system/ram_addr.h"
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#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
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void tlb_protect_code(ram_addr_t ram_addr);
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void tlb_unprotect_code(ram_addr_t ram_addr);
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#endif
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#ifndef CONFIG_USER_ONLY
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#include "system/ram_addr.h"
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void tlb_reset_dirty(CPUState *cpu, uintptr_t start, uintptr_t length);
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void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length);
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#endif
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@@ -12,10 +12,12 @@
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#define DEFAULT_GDBSTUB_PORT "1234"
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/* GDB breakpoint/watchpoint types */
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#define GDB_BREAKPOINT_SW 0
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#define GDB_BREAKPOINT_HW 1
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#define GDB_WATCHPOINT_WRITE 2
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#define GDB_WATCHPOINT_READ 3
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#define GDB_WATCHPOINT_ACCESS 4
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typedef enum GdbBreakpointType {
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GDB_BREAKPOINT_SW = 0,
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GDB_BREAKPOINT_HW = 1,
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GDB_WATCHPOINT_WRITE = 2,
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GDB_WATCHPOINT_READ = 3,
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GDB_WATCHPOINT_ACCESS = 4,
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} GdbBreakpointType;
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#endif /* GDBSTUB_ENUMS_H */
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@@ -440,7 +440,7 @@ struct qemu_work_item;
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* @stopped: Indicates the CPU has been artificially stopped.
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* @unplug: Indicates a pending CPU unplug request.
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* @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
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* @singlestep_enabled: Flags for single-stepping.
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* @singlestep_flags: Flags for single-stepping.
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* @icount_extra: Instructions until next timer event.
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* @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
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* AddressSpaces this CPU has)
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@@ -480,7 +480,7 @@ struct CPUState {
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/*< private >*/
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DeviceState parent_obj;
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/* cache to avoid expensive CPU_GET_CLASS */
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CPUClass *cc;
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const CPUClass *cc;
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/*< public >*/
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int nr_threads;
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@@ -505,7 +505,7 @@ struct CPUState {
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int exclusive_context_count;
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uint32_t cflags_next_tb;
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uint32_t interrupt_request;
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int singlestep_enabled;
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unsigned singlestep_flags;
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int64_t icount_budget;
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int64_t icount_extra;
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uint64_t random_seed;
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@@ -1132,46 +1132,29 @@ void qemu_init_vcpu(CPUState *cpu);
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/**
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* cpu_single_step:
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* @cpu: CPU to the flags for.
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* @enabled: Flags to enable.
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* @flags: Flags to enable.
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*
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* Enables or disables single-stepping for @cpu.
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*/
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void cpu_single_step(CPUState *cpu, int enabled);
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void cpu_single_step(CPUState *cpu, unsigned flags);
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/* Breakpoint/watchpoint flags */
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#define BP_MEM_READ 0x01
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#define BP_MEM_WRITE 0x02
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#define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
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#define BP_STOP_BEFORE_ACCESS 0x04
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/* 0x08 currently unused */
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#define BP_GDB 0x10
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#define BP_CPU 0x20
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#define BP_ANY (BP_GDB | BP_CPU)
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#define BP_HIT_SHIFT 6
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#define BP_WATCHPOINT_HIT_READ (BP_MEM_READ << BP_HIT_SHIFT)
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#define BP_WATCHPOINT_HIT_WRITE (BP_MEM_WRITE << BP_HIT_SHIFT)
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#define BP_WATCHPOINT_HIT (BP_MEM_ACCESS << BP_HIT_SHIFT)
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/**
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* cpu_single_stepping:
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* @cpu: The vCPU to check
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*
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* Returns whether the vCPU has single-stepping enabled.
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*/
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static inline bool cpu_single_stepping(const CPUState *cpu)
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{
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return cpu->singlestep_flags & SSTEP_ENABLE;
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}
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int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
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CPUBreakpoint **breakpoint);
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int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
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void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
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void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
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/* Return true if PC matches an installed breakpoint. */
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static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
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{
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CPUBreakpoint *bp;
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if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
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QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
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if (bp->pc == pc && (bp->flags & mask)) {
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return true;
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}
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}
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}
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return false;
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}
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bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask);
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/**
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* cpu_get_address_space:
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@@ -74,11 +74,16 @@ bool accel_cpu_common_realize(CPUState *cpu, Error **errp);
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void accel_cpu_common_unrealize(CPUState *cpu);
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/**
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* accel_supported_gdbstub_sstep_flags:
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* struct AccelGdbConfig - gdbstub configuration for an accelerator.
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*
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* Returns the supported single step modes for the configured
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* accelerator.
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* @sstep_flags: Set SSTEP_* flags that accelerator supports for guest debug.
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* @can_reverse: Whether reverse mode is supported.
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*/
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int accel_supported_gdbstub_sstep_flags(void);
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typedef struct AccelGdbConfig {
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unsigned sstep_flags;
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bool can_reverse;
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} AccelGdbConfig;
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bool accel_supports_guest_debug(AccelState *accel);
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#endif /* QEMU_ACCEL_H */
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@@ -13,6 +13,7 @@
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#include "qemu/queue.h"
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#include "exec/vaddr.h"
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#include "gdbstub/enums.h"
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#include "qom/object.h"
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#include "accel/accel-ops.h"
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@@ -91,9 +92,11 @@ int hvf_sw_breakpoints_active(CPUState *cpu);
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int hvf_arch_insert_sw_breakpoint(CPUState *cpu, struct hvf_sw_breakpoint *bp);
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int hvf_arch_remove_sw_breakpoint(CPUState *cpu, struct hvf_sw_breakpoint *bp);
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int hvf_arch_insert_hw_breakpoint(vaddr addr, vaddr len, int type);
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int hvf_arch_remove_hw_breakpoint(vaddr addr, vaddr len, int type);
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void hvf_arch_remove_all_hw_breakpoints(void);
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int hvf_arch_insert_gdbstub_hw_breakpoint(vaddr addr, vaddr len,
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GdbBreakpointType type);
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int hvf_arch_remove_gdbstub_hw_breakpoint(vaddr addr, vaddr len,
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GdbBreakpointType type);
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void hvf_arch_remove_all_gdbstub_hw_breakpoints(void);
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/*
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* hvf_update_guest_debug:
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@@ -104,11 +107,6 @@ void hvf_arch_remove_all_hw_breakpoints(void);
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*/
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int hvf_update_guest_debug(CPUState *cpu);
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/*
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* Return whether the guest supports debugging.
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*/
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bool hvf_arch_supports_guest_debug(void);
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bool hvf_arch_cpu_realize(CPUState *cpu, Error **errp);
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uint32_t hvf_arch_get_default_ipa_bit_size(void);
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uint32_t hvf_arch_get_max_ipa_bit_size(void);
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@@ -17,6 +17,7 @@
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#define QEMU_KVM_H
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#include "exec/memattrs.h"
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#include "gdbstub/enums.h"
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#include "qemu/accel.h"
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#include "accel/accel-route.h"
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#include "qom/object.h"
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@@ -412,9 +413,11 @@ int kvm_arch_insert_sw_breakpoint(CPUState *cpu,
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struct kvm_sw_breakpoint *bp);
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int kvm_arch_remove_sw_breakpoint(CPUState *cpu,
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struct kvm_sw_breakpoint *bp);
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int kvm_arch_insert_hw_breakpoint(vaddr addr, vaddr len, int type);
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int kvm_arch_remove_hw_breakpoint(vaddr addr, vaddr len, int type);
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void kvm_arch_remove_all_hw_breakpoints(void);
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int kvm_arch_insert_gdbstub_hw_breakpoint(vaddr addr, vaddr len,
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GdbBreakpointType type);
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int kvm_arch_remove_gdbstub_hw_breakpoint(vaddr addr, vaddr len,
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GdbBreakpointType type);
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void kvm_arch_remove_all_gdbstub_hw_breakpoints(void);
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void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg);
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@@ -43,7 +43,6 @@ typedef struct MshvHvCallArgs {
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struct AccelCPUState {
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int cpufd;
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bool dirty;
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MshvHvCallArgs hvcall_args;
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};
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@@ -22,7 +22,4 @@ void whpx_translate_cpu_breakpoints(
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void whpx_arch_destroy_vcpu(CPUState *cpu);
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void whpx_arch_accel_class_init(ObjectClass *oc);
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/* called by whpx-accel-ops */
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bool whpx_arch_supports_guest_debug(void);
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#endif
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