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tests/tcg/arm: Tests for new FPRCVT instructions
We autodetect the presence of FPRCVT in the test cross compiler, which is a recent feature in GCC and not supported by many distros yet. If this is in place, we compile the existing fcvt.c test with an extra compiler flag which uses the new SIMD instructions; the output from the test is unchanged. The existing [US]CVTF instructions do not have a test, so no new tests are added for the SIMD versions. They have been tested manually to check the new SIMD versions produce the same numerical results as the existing versions. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Jim MacArthur <jim.macarthur@linaro.org> Message-id: 20260630-jmac-fprcvt-v3-6-f4840d5e0a7f@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
committed by
Peter Maydell
parent
81555a662b
commit
97af096c69
@@ -28,9 +28,21 @@ config-cc.mak: Makefile
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$(call cc-option,-march=armv8.5-a, CROSS_CC_HAS_ARMV8_5); \
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$(call cc-option,-mbranch-protection=standard, CROSS_CC_HAS_ARMV8_BTI); \
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$(call cc-option,-march=armv8.5-a+memtag, CROSS_CC_HAS_ARMV8_MTE); \
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$(call cc-option,-Wa$(COMMA)-march=armv9-a+sme $$fnia, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak
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$(call cc-option,-Wa$(COMMA)-march=armv9-a+sme $$fnia, CROSS_AS_HAS_ARMV9_SME); \
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$(call cc-option,-march=armv9-a+fprcvt, CROSS_CC_HAS_ARMV9_FPRCVT)) 3> config-cc.mak
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-include config-cc.mak
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ifneq ($(CROSS_CC_HAS_ARMV9_FPRCVT),)
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AARCH64_TESTS += fcvt-fprcvt
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fcvt-fprcvt: LDFLAGS += -lm
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fcvt-fprcvt: CFLAGS += $(CROSS_CC_HAS_ARMV9_FPRCVT) -DFPRCVT
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fcvt-fprcvt: fcvt.c
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$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
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run-fcvt-fprcvt: fcvt-fprcvt
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$(call run-test,$<,$(QEMU) $<)
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$(call diff-out,$<,$(AARCH64_SRC)/fcvt.ref)
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endif
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ifneq ($(CROSS_CC_HAS_ARMV8_2),)
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AARCH64_TESTS += dcpop
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dcpop: CFLAGS += $(CROSS_CC_HAS_ARMV8_2)
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@@ -171,8 +171,14 @@ static void convert_single_to_integer(void)
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#if defined(__arm__)
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/* asm("vcvt.s32.f32 %s0, %s1" : "=t" (output) : "t" (input)); */
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output = input;
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#else
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#ifdef FPRCVT
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asm("fcvtzs d0, %s1\r\n"
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"fmov %0, d0" :
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"=r" (output) : "w" (input));
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#else
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asm("fcvtzs %0, %s1" : "=r" (output) : "w" (input));
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#endif
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#endif
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print_int64(i, output);
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}
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@@ -425,6 +431,7 @@ int main(int argc, char *argv[argc])
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convert_double_to_integer();
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convert_half_to_integer();
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/* And now with ARM alternative FP16 */
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#if defined(__arm__)
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asm("vmrs r1, fpscr\n\t"
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