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Call Logical Processor (CLP) Architecture is used for managing PCI functions on s390x. Define and include the structures and routines needed to interact with PCI devices during IPL. Reviewed-by: Eric Farman <farman@linux.ibm.com> Signed-off-by: Jared Rossi <jrossi@linux.ibm.com> Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com> Reviewed-by: Farhan Ali <alifm@linux.ibm.com> Message-ID: <20260309003601.242634-9-jrossi@linux.ibm.com> [thuth: fix a typo in one of the comments] Signed-off-by: Thomas Huth <thuth@redhat.com>
100 lines
2.5 KiB
C
100 lines
2.5 KiB
C
/*
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* Call Logical Processor (CLP) architecture
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*
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* Copyright 2025 IBM Corp.
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* Author(s): Jared Rossi <jrossi@linux.ibm.com>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "clp.h"
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#include <stdio.h>
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#include <string.h>
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int clp_pci(void *data)
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{
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struct { uint8_t _[CLP_BLK_SIZE]; } *req = data;
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int cc = 3;
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asm volatile (
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" .insn rrf,0xb9a00000,0,%[req],0,2\n"
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" ipm %[cc]\n"
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" srl %[cc],28\n"
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: [cc] "+d" (cc), "+m" (*req)
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: [req] "a" (req)
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: "cc");
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if (cc) {
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printf("CLP returned with non-zero condition code %d\n", cc);
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}
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return cc;
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}
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/*
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* Get the PCI function entry for a given function ID
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* Return 0 on success, 1 if the FID is not found, or a negative RC on error
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*/
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int find_pci_function(uint32_t fid, ClpFhListEntry *entry)
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{
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int count = 0;
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int limit = PCI_MAX_FUNCTIONS;
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ClpReqRspListPci rrb;
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rrb.request.hdr.len = sizeof(ClpReqListPci);
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rrb.request.hdr.cmd = 0x02;
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rrb.request.resume_token = 0;
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rrb.response.hdr.len = sizeof(ClpRspListPci);
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do {
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if (clp_pci(&rrb) || rrb.response.hdr.rsp != 0x0010) {
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puts("Failed to list PCI functions");
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return -1;
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}
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/* Resume token set when max entries are returned */
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if (rrb.response.resume_token) {
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count = CLP_FH_LIST_NR_ENTRIES;
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rrb.request.resume_token = rrb.response.resume_token;
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} else {
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count = (rrb.response.hdr.len - 32) / sizeof(ClpFhListEntry);
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}
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limit -= count;
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for (int i = 0; i < count; i++) {
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if (rrb.response.fh_list[i].fid == fid) {
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memcpy(entry, &rrb.response.fh_list[i], sizeof(ClpFhListEntry));
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return 0;
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}
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}
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} while (rrb.request.resume_token && limit > 0);
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puts("No function entry found for FID!");
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return 1;
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}
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/*
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* Enable the PCI function associated with a given handle
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* Return 0 on success or a negative RC on error
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*/
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int enable_pci_function(uint32_t *fhandle)
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{
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ClpReqRspSetPci rrb;
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rrb.request.hdr.len = sizeof(ClpReqSetPci);
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rrb.request.hdr.cmd = 0x05;
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rrb.request.fh = *fhandle;
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rrb.request.oc = 0;
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rrb.request.ndas = 1;
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rrb.response.hdr.len = sizeof(ClpRspSetPci);
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if (clp_pci(&rrb) || rrb.response.hdr.rsp != 0x0010) {
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puts("Failed to enable PCI function");
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return -1;
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}
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*fhandle = rrb.response.fh;
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return 0;
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}
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