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target-arm queue: * target/arm: Implement FEAT_CMPBR emulation * target/arm: Implement FEAT_RNG_TRAP emulation * target/arm: Don't assert if 64-bit EL2 AT insn sees a Domain fault * target/arm: SME BFCVT, BFCVTN have "Alternate BFloat16 behaviors" * target/arm: Enable REVD for SVE2.1 * zynq: Various minor bug fixes * hw/misc: Add dummy ZYNQ DDR controller * hw/block/m25p80: Add HAS_SR_TB flag for is25lp016d * hw/dma/omap_dma: Remove unused ifdeffed out code # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmoZfIwZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3hUiD/9lXml75H4e0JxPkpxjWAVV # ssgdTHavEl33IFk443gacfgm90xZ6IhLtuk/Ba5wQf2OrqmQQw0ttnGUaPuS9cYl # n2+TlOLWRbCU8ELymsrIamIW4B8WJteVajBKz2uDhARGHlZNq1UvrNv3w7rs6VdP # dwYUQ0WhPMyI2MhQ3dL1CY1Sva7K7BmzFZMMkPpsEiEOGVqIkyfgiOL3DhtFOZ3g # P2nTVtzxknpWAYPWsMicMtxH1apRWB8WU5BM31gfxNQ27qAmlbi1jPHKOmo76h6b # UL3BFIC8J29/44q6CrVhp7SoDG5l+aQYF/ndl7N7i6/cwxfTIgHl1av8VcGybMwk # N40xAw8laHqkReErRxghrdoNir3UBZwwO7thB0aOZhuHHisG4jvAFawspmwQBePV # FUEuOmYmK0HR90aurBPOnjgFmF/KA5FPNuC12MJsnFcyrPTDwfPP1FSkCls46KYl # Jt/HMCcqUwBO2ZkLjAQvmxjSMvnC2HFCh1MidXpV06SOl6zR0OjUACDfYcbnw+N0 # TKt86Uu61nabIaY4A79PV9Mju8Tm/RQEf6ZC5bTntIVZjNV9oaOQeXNASXZVEOty # eudivT3V5Zy1fwgwMekOMh3ary5J4pc0Bo4SUUaX+xdSklR4zmQ7oCxlyNaDheoA # F+GSTl6pshzoaka6k1hl1Q== # =PFSX # -----END PGP SIGNATURE----- # gpg: Signature made Fri 29 May 2026 07:46:20 EDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20260529' of https://gitlab.com/pm215/qemu: (21 commits) hw/dma/omap_dma: Fix indentation after ifdef removal hw/dma/omap_dma: Fix coding style in omap_dma_transfer_setup() hw/dma/omap_dma: Remove unused ifdeffed out code target/arm: advertise FEAT_RNG_TRAP on cortex-max target/arm: implement FEAT_RNG_TRAP for RNDR/RNDRRS target/arm: SME BFCVT, BFCVTN have "Alternate BFloat16 behaviors" target/arm: Don't assert if 64-bit EL2 AT insn sees a Domain fault target/arm: Enable FEAT_CMPBR for -cpu max target/arm: Implement CB (immediate) target/arm: Implement CB, CBB, CBH target/arm: Add feature predicate for FEAT_CMPBR hw/arm/xilinx_zynq: Split xilinx_zynq into header and implementation files hw/block/m25p80: Add HAS_SR_TB flag for is25lp016d hw/misc/zynq_slcr: Add logic for DCI configuration hw/misc: Add dummy ZYNQ DDR controller hw/dma/zynq-devcfg: Indicate power-up status of PL hw/dma/zynq-devcfg: Simulate dummy PL reset hw/dma/zynq: Ensure PCFG_DONE bit remains set to indicate PL is in user mode hw/arm/zynq-devcfg: Prevent unintended unlock during initialization hw/dma/zynq-devcfg: Handle bitstream loading via DMA to 0xffffffff ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>