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e32e36298e
Add explicit decodetree entries and translator bindings for Octeon DMFC2/DMTC2 selectors that are simple COP2 register transfers. Emit direct TCG loads and stores for register moves. Use signed 32-bit loads for 32-bit DMFC2 readback and mask narrow writable fields such as AESKEYLEN and CRCLEN on DMTC2. Keep operation selectors with side effects in later functional decode patches. Signed-off-by: James Hilliard <james.hilliard1@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260608-mips-octeon-missing-insns-v2-v16-14-daef7a0d8b04@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>