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gdbstub: Move gdb-xml/ within gdbstub/

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gdb-xml/ files are only consumed by gdbstub API.
No need for a top-level entry, move them to gdbstub/.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Link: https://lore.kernel.org/qemu-devel/20260310232045.58440-16-philmd@linaro.org
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé
2026-03-11 00:20:43 +01:00
committed by Pierrick Bouvier
parent 06531c79ee
commit 39fb349f74
63 changed files with 10 additions and 13 deletions
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94
gdbstub/gdb-xml/aarch64-core.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2009-2025 Free Software Foundation, Inc.
Contributed by ARM Ltd.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.aarch64.core">
<reg name="x0" bitsize="64"/>
<reg name="x1" bitsize="64"/>
<reg name="x2" bitsize="64"/>
<reg name="x3" bitsize="64"/>
<reg name="x4" bitsize="64"/>
<reg name="x5" bitsize="64"/>
<reg name="x6" bitsize="64"/>
<reg name="x7" bitsize="64"/>
<reg name="x8" bitsize="64"/>
<reg name="x9" bitsize="64"/>
<reg name="x10" bitsize="64"/>
<reg name="x11" bitsize="64"/>
<reg name="x12" bitsize="64"/>
<reg name="x13" bitsize="64"/>
<reg name="x14" bitsize="64"/>
<reg name="x15" bitsize="64"/>
<reg name="x16" bitsize="64"/>
<reg name="x17" bitsize="64"/>
<reg name="x18" bitsize="64"/>
<reg name="x19" bitsize="64"/>
<reg name="x20" bitsize="64"/>
<reg name="x21" bitsize="64"/>
<reg name="x22" bitsize="64"/>
<reg name="x23" bitsize="64"/>
<reg name="x24" bitsize="64"/>
<reg name="x25" bitsize="64"/>
<reg name="x26" bitsize="64"/>
<reg name="x27" bitsize="64"/>
<reg name="x28" bitsize="64"/>
<reg name="x29" bitsize="64"/>
<reg name="x30" bitsize="64"/>
<reg name="sp" bitsize="64" type="data_ptr"/>
<reg name="pc" bitsize="64" type="code_ptr"/>
<flags id="cpsr_flags" size="4">
<!-- Stack Pointer. -->
<field name="SP" start="0" end="0"/>
<!-- Exception Level. -->
<field name="EL" start="2" end="3"/>
<!-- Execution state. -->
<field name="nRW" start="4" end="4"/>
<!-- FIQ interrupt mask. -->
<field name="F" start="6" end="6"/>
<!-- IRQ interrupt mask. -->
<field name="I" start="7" end="7"/>
<!-- SError interrupt mask. -->
<field name="A" start="8" end="8"/>
<!-- Debug exception mask. -->
<field name="D" start="9" end="9"/>
<!-- ARMv8.5-A: Branch Target Identification BTYPE. -->
<field name="BTYPE" start="10" end="11"/>
<!-- ARMv8.0-A: Speculative Store Bypass. -->
<field name="SSBS" start="12" end="12"/>
<!-- Illegal Execution state. -->
<field name="IL" start="20" end="20"/>
<!-- Software Step. -->
<field name="SS" start="21" end="21"/>
<!-- ARMv8.1-A: Privileged Access Never. -->
<field name="PAN" start="22" end="22"/>
<!-- ARMv8.2-A: User Access Override. -->
<field name="UAO" start="23" end="23"/>
<!-- ARMv8.4-A: Data Independent Timing. -->
<field name="DIT" start="24" end="24"/>
<!-- ARMv8.5-A: Tag Check Override. -->
<field name="TCO" start="25" end="25"/>
<!-- Overflow Condition flag. -->
<field name="V" start="28" end="28"/>
<!-- Carry Condition flag. -->
<field name="C" start="29" end="29"/>
<!-- Zero Condition flag. -->
<field name="Z" start="30" end="30"/>
<!-- Negative Condition flag. -->
<field name="N" start="31" end="31"/>
</flags>
<reg name="cpsr" bitsize="32" type="cpsr_flags"/>
</feature>

86
gdbstub/gdb-xml/aarch64-fpu.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2009-2012 Free Software Foundation, Inc.
Contributed by ARM Ltd.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.aarch64.fpu">
<vector id="v2d" type="ieee_double" count="2"/>
<vector id="v2u" type="uint64" count="2"/>
<vector id="v2i" type="int64" count="2"/>
<vector id="v4f" type="ieee_single" count="4"/>
<vector id="v4u" type="uint32" count="4"/>
<vector id="v4i" type="int32" count="4"/>
<vector id="v8u" type="uint16" count="8"/>
<vector id="v8i" type="int16" count="8"/>
<vector id="v16u" type="uint8" count="16"/>
<vector id="v16i" type="int8" count="16"/>
<vector id="v1u" type="uint128" count="1"/>
<vector id="v1i" type="int128" count="1"/>
<union id="vnd">
<field name="f" type="v2d"/>
<field name="u" type="v2u"/>
<field name="s" type="v2i"/>
</union>
<union id="vns">
<field name="f" type="v4f"/>
<field name="u" type="v4u"/>
<field name="s" type="v4i"/>
</union>
<union id="vnh">
<field name="u" type="v8u"/>
<field name="s" type="v8i"/>
</union>
<union id="vnb">
<field name="u" type="v16u"/>
<field name="s" type="v16i"/>
</union>
<union id="vnq">
<field name="u" type="v1u"/>
<field name="s" type="v1i"/>
</union>
<union id="aarch64v">
<field name="d" type="vnd"/>
<field name="s" type="vns"/>
<field name="h" type="vnh"/>
<field name="b" type="vnb"/>
<field name="q" type="vnq"/>
</union>
<reg name="v0" bitsize="128" type="aarch64v" regnum="34"/>
<reg name="v1" bitsize="128" type="aarch64v" />
<reg name="v2" bitsize="128" type="aarch64v" />
<reg name="v3" bitsize="128" type="aarch64v" />
<reg name="v4" bitsize="128" type="aarch64v" />
<reg name="v5" bitsize="128" type="aarch64v" />
<reg name="v6" bitsize="128" type="aarch64v" />
<reg name="v7" bitsize="128" type="aarch64v" />
<reg name="v8" bitsize="128" type="aarch64v" />
<reg name="v9" bitsize="128" type="aarch64v" />
<reg name="v10" bitsize="128" type="aarch64v"/>
<reg name="v11" bitsize="128" type="aarch64v"/>
<reg name="v12" bitsize="128" type="aarch64v"/>
<reg name="v13" bitsize="128" type="aarch64v"/>
<reg name="v14" bitsize="128" type="aarch64v"/>
<reg name="v15" bitsize="128" type="aarch64v"/>
<reg name="v16" bitsize="128" type="aarch64v"/>
<reg name="v17" bitsize="128" type="aarch64v"/>
<reg name="v18" bitsize="128" type="aarch64v"/>
<reg name="v19" bitsize="128" type="aarch64v"/>
<reg name="v20" bitsize="128" type="aarch64v"/>
<reg name="v21" bitsize="128" type="aarch64v"/>
<reg name="v22" bitsize="128" type="aarch64v"/>
<reg name="v23" bitsize="128" type="aarch64v"/>
<reg name="v24" bitsize="128" type="aarch64v"/>
<reg name="v25" bitsize="128" type="aarch64v"/>
<reg name="v26" bitsize="128" type="aarch64v"/>
<reg name="v27" bitsize="128" type="aarch64v"/>
<reg name="v28" bitsize="128" type="aarch64v"/>
<reg name="v29" bitsize="128" type="aarch64v"/>
<reg name="v30" bitsize="128" type="aarch64v"/>
<reg name="v31" bitsize="128" type="aarch64v"/>
<reg name="fpsr" bitsize="32"/>
<reg name="fpcr" bitsize="32"/>
</feature>

11
gdbstub/gdb-xml/aarch64-mte.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2021-2023 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.aarch64.mte">
<reg name="tag_ctl" bitsize="64" type="uint64" group="system" save-restore="no"/>
</feature>

15
gdbstub/gdb-xml/aarch64-pauth.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2018-2022 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.aarch64.pauth_v2">
<reg name="pauth_dmask" bitsize="64"/>
<reg name="pauth_cmask" bitsize="64"/>
<reg name="pauth_dmask_high" bitsize="64"/>
<reg name="pauth_cmask_high" bitsize="64"/>
</feature>

14
gdbstub/gdb-xml/aarch64-sme2.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2025 Linaro Ltd.
SPDX-License-Identifier: GPL-2.0-or-later
This is the SME2 ZT0 register. Upstream GDB dynamically generates
the XML for this feature, but because the vector is always 64 bytes
in size we prefer to use static XML for it.
-->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.aarch64.sme2">
<vector id="sme2_bv" type="uint8" count="64"/>
<reg name="zt0" bitsize="512" type="sme2_bv"/>
</feature>

136
gdbstub/gdb-xml/alpha-core.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2025 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.alpha.core">
<!-- IEEE rounding mode values -->
<enum id="dyn_rm_enum" size="8">
<!-- Chopped rounding mode -->
<evalue name="chop" value="0"/>
<!-- Minus infinity -->
<evalue name="-inf" value="1"/>
<!-- Normal rounding -->
<evalue name="norm" value="2"/>
<!-- Plus infinity -->
<evalue name="+inf" value="3"/>
</enum>
<!-- Floating-Point Control Register Flags -->
<flags id="fpcr_flags" size="8">
<!-- Denormal Operand Exception Disable -->
<field name="DNOD" start="47" end="47"/>
<!-- Denormal Operands to Zero -->
<field name="DNZ" start="48" end="48"/>
<!-- Invalid Operation Disable -->
<field name="INVD" start="49" end="49"/>
<!-- Division by Zero Disable -->
<field name="DZED" start="50" end="50"/>
<!-- Overflow Disable -->
<field name="OVFD" start="51" end="51"/>
<!-- Invalid Operation -->
<field name="INV" start="52" end="52"/>
<!-- Division by Zero -->
<field name="DZE" start="53" end="53"/>
<!-- Overflow -->
<field name="OVF" start="54" end="54"/>
<!-- Underflow -->
<field name="UNF" start="55" end="55"/>
<!-- Inexact Result -->
<field name="INE" start="56" end="56"/>
<!-- Integer Overflow -->
<field name="IOV" start="57" end="57"/>
<!-- Dynamic Rounding Mode -->
<field name="DYN_RM" start="58" end="59" type="dyn_rm_enum"/>
<!-- Underflow to Zero -->
<field name="UNDZ" start="60" end="60"/>
<!-- Underflow Disable -->
<field name="UNFD" start="61" end="61"/>
<!-- Inexact Disable -->
<field name="INED" start="62" end="62"/>
<!-- Summary Bit -->
<field name="SUM" start="63" end="63"/>
</flags>
<!-- Integer Registers -->
<reg name="v0" bitsize="64" type="int64"/>
<reg name="t0" bitsize="64" type="int64"/>
<reg name="t1" bitsize="64" type="int64"/>
<reg name="t2" bitsize="64" type="int64"/>
<reg name="t3" bitsize="64" type="int64"/>
<reg name="t4" bitsize="64" type="int64"/>
<reg name="t5" bitsize="64" type="int64"/>
<reg name="t6" bitsize="64" type="int64"/>
<reg name="t7" bitsize="64" type="int64"/>
<reg name="s0" bitsize="64" type="int64"/>
<reg name="s1" bitsize="64" type="int64"/>
<reg name="s2" bitsize="64" type="int64"/>
<reg name="s3" bitsize="64" type="int64"/>
<reg name="s4" bitsize="64" type="int64"/>
<reg name="s5" bitsize="64" type="int64"/>
<reg name="fp" bitsize="64" type="int64"/>
<reg name="a0" bitsize="64" type="int64"/>
<reg name="a1" bitsize="64" type="int64"/>
<reg name="a2" bitsize="64" type="int64"/>
<reg name="a3" bitsize="64" type="int64"/>
<reg name="a4" bitsize="64" type="int64"/>
<reg name="a5" bitsize="64" type="int64"/>
<reg name="t8" bitsize="64" type="int64"/>
<reg name="t9" bitsize="64" type="int64"/>
<reg name="t10" bitsize="64" type="int64"/>
<reg name="t11" bitsize="64" type="int64"/>
<reg name="ra" bitsize="64" type="int64"/>
<reg name="t12" bitsize="64" type="int64"/>
<reg name="at" bitsize="64" type="int64"/>
<reg name="gp" bitsize="64" type="data_ptr"/>
<reg name="sp" bitsize="64" type="data_ptr"/>
<reg name="zero" bitsize="64" type="int64" save-restore="no"/>
<!-- Floating-Point Registers -->
<reg name="f0" bitsize="64" type="float" group="float"/>
<reg name="f1" bitsize="64" type="float" group="float"/>
<reg name="f2" bitsize="64" type="float" group="float"/>
<reg name="f3" bitsize="64" type="float" group="float"/>
<reg name="f4" bitsize="64" type="float" group="float"/>
<reg name="f5" bitsize="64" type="float" group="float"/>
<reg name="f6" bitsize="64" type="float" group="float"/>
<reg name="f7" bitsize="64" type="float" group="float"/>
<reg name="f8" bitsize="64" type="float" group="float"/>
<reg name="f9" bitsize="64" type="float" group="float"/>
<reg name="f10" bitsize="64" type="float" group="float"/>
<reg name="f11" bitsize="64" type="float" group="float"/>
<reg name="f12" bitsize="64" type="float" group="float"/>
<reg name="f13" bitsize="64" type="float" group="float"/>
<reg name="f14" bitsize="64" type="float" group="float"/>
<reg name="f15" bitsize="64" type="float" group="float"/>
<reg name="f16" bitsize="64" type="float" group="float"/>
<reg name="f17" bitsize="64" type="float" group="float"/>
<reg name="f18" bitsize="64" type="float" group="float"/>
<reg name="f19" bitsize="64" type="float" group="float"/>
<reg name="f20" bitsize="64" type="float" group="float"/>
<reg name="f21" bitsize="64" type="float" group="float"/>
<reg name="f22" bitsize="64" type="float" group="float"/>
<reg name="f23" bitsize="64" type="float" group="float"/>
<reg name="f24" bitsize="64" type="float" group="float"/>
<reg name="f25" bitsize="64" type="float" group="float"/>
<reg name="f26" bitsize="64" type="float" group="float"/>
<reg name="f27" bitsize="64" type="float" group="float"/>
<reg name="f28" bitsize="64" type="float" group="float"/>
<reg name="f29" bitsize="64" type="float" group="float"/>
<reg name="f30" bitsize="64" type="float" group="float"/>
<!-- Floating-Point Control Register -->
<reg name="fpcr" bitsize="64" type="fpcr_flags" group="float"/>
<!-- Program Counter -->
<reg name="pc" bitsize="64" type="code_ptr"/>
<!-- Reserved Index for Former Virtual Register -->
<reg name="" bitsize="64" type="int64" save-restore="no"/>
<!-- PALcode Memory Slot -->
<reg name="unique" bitsize="64" type="int64" group="system"/>
</feature>

31
gdbstub/gdb-xml/arm-core.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arm.core">
<reg name="r0" bitsize="32"/>
<reg name="r1" bitsize="32"/>
<reg name="r2" bitsize="32"/>
<reg name="r3" bitsize="32"/>
<reg name="r4" bitsize="32"/>
<reg name="r5" bitsize="32"/>
<reg name="r6" bitsize="32"/>
<reg name="r7" bitsize="32"/>
<reg name="r8" bitsize="32"/>
<reg name="r9" bitsize="32"/>
<reg name="r10" bitsize="32"/>
<reg name="r11" bitsize="32"/>
<reg name="r12" bitsize="32"/>
<reg name="sp" bitsize="32" type="data_ptr"/>
<reg name="lr" bitsize="32"/>
<reg name="pc" bitsize="32" type="code_ptr"/>
<!-- The CPSR is register 25, rather than register 16, because
the FPA registers historically were placed between the PC
and the CPSR in the "g" packet. -->
<reg name="cpsr" bitsize="32" regnum="25"/>
</feature>

19
gdbstub/gdb-xml/arm-m-profile-mve.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2021 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arm.m-profile-mve">
<flags id="vpr_reg" size="4">
<!-- ARMv8.1-M and MVE: Unprivileged and privileged Access. -->
<field name="P0" start="0" end="15"/>
<!-- ARMv8.1-M: Privileged Access only. -->
<field name="MASK01" start="16" end="19"/>
<!-- ARMv8.1-M: Privileged Access only. -->
<field name="MASK23" start="20" end="23"/>
</flags>
<reg name="vpr" bitsize="32" type="vpr_reg"/>
</feature>

27
gdbstub/gdb-xml/arm-m-profile.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2010-2020 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arm.m-profile">
<reg name="r0" bitsize="32"/>
<reg name="r1" bitsize="32"/>
<reg name="r2" bitsize="32"/>
<reg name="r3" bitsize="32"/>
<reg name="r4" bitsize="32"/>
<reg name="r5" bitsize="32"/>
<reg name="r6" bitsize="32"/>
<reg name="r7" bitsize="32"/>
<reg name="r8" bitsize="32"/>
<reg name="r9" bitsize="32"/>
<reg name="r10" bitsize="32"/>
<reg name="r11" bitsize="32"/>
<reg name="r12" bitsize="32"/>
<reg name="sp" bitsize="32" type="data_ptr"/>
<reg name="lr" bitsize="32"/>
<reg name="pc" bitsize="32" type="code_ptr"/>
<reg name="xpsr" bitsize="32" regnum="25"/>
</feature>

86
gdbstub/gdb-xml/arm-neon.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arm.vfp">
<vector id="neon_uint8x8" type="uint8" count="8"/>
<vector id="neon_uint16x4" type="uint16" count="4"/>
<vector id="neon_uint32x2" type="uint32" count="2"/>
<vector id="neon_float32x2" type="ieee_single" count="2"/>
<union id="neon_d">
<field name="u8" type="neon_uint8x8"/>
<field name="u16" type="neon_uint16x4"/>
<field name="u32" type="neon_uint32x2"/>
<field name="u64" type="uint64"/>
<field name="f32" type="neon_float32x2"/>
<field name="f64" type="ieee_double"/>
</union>
<vector id="neon_uint8x16" type="uint8" count="16"/>
<vector id="neon_uint16x8" type="uint16" count="8"/>
<vector id="neon_uint32x4" type="uint32" count="4"/>
<vector id="neon_uint64x2" type="uint64" count="2"/>
<vector id="neon_float32x4" type="ieee_single" count="4"/>
<vector id="neon_float64x2" type="ieee_double" count="2"/>
<union id="neon_q">
<field name="u8" type="neon_uint8x16"/>
<field name="u16" type="neon_uint16x8"/>
<field name="u32" type="neon_uint32x4"/>
<field name="u64" type="neon_uint64x2"/>
<field name="f32" type="neon_float32x4"/>
<field name="f64" type="neon_float64x2"/>
</union>
<reg name="d0" bitsize="64" type="neon_d"/>
<reg name="d1" bitsize="64" type="neon_d"/>
<reg name="d2" bitsize="64" type="neon_d"/>
<reg name="d3" bitsize="64" type="neon_d"/>
<reg name="d4" bitsize="64" type="neon_d"/>
<reg name="d5" bitsize="64" type="neon_d"/>
<reg name="d6" bitsize="64" type="neon_d"/>
<reg name="d7" bitsize="64" type="neon_d"/>
<reg name="d8" bitsize="64" type="neon_d"/>
<reg name="d9" bitsize="64" type="neon_d"/>
<reg name="d10" bitsize="64" type="neon_d"/>
<reg name="d11" bitsize="64" type="neon_d"/>
<reg name="d12" bitsize="64" type="neon_d"/>
<reg name="d13" bitsize="64" type="neon_d"/>
<reg name="d14" bitsize="64" type="neon_d"/>
<reg name="d15" bitsize="64" type="neon_d"/>
<reg name="d16" bitsize="64" type="neon_d"/>
<reg name="d17" bitsize="64" type="neon_d"/>
<reg name="d18" bitsize="64" type="neon_d"/>
<reg name="d19" bitsize="64" type="neon_d"/>
<reg name="d20" bitsize="64" type="neon_d"/>
<reg name="d21" bitsize="64" type="neon_d"/>
<reg name="d22" bitsize="64" type="neon_d"/>
<reg name="d23" bitsize="64" type="neon_d"/>
<reg name="d24" bitsize="64" type="neon_d"/>
<reg name="d25" bitsize="64" type="neon_d"/>
<reg name="d26" bitsize="64" type="neon_d"/>
<reg name="d27" bitsize="64" type="neon_d"/>
<reg name="d28" bitsize="64" type="neon_d"/>
<reg name="d29" bitsize="64" type="neon_d"/>
<reg name="d30" bitsize="64" type="neon_d"/>
<reg name="d31" bitsize="64" type="neon_d"/>
<reg name="q0" bitsize="128" type="neon_q"/>
<reg name="q1" bitsize="128" type="neon_q"/>
<reg name="q2" bitsize="128" type="neon_q"/>
<reg name="q3" bitsize="128" type="neon_q"/>
<reg name="q4" bitsize="128" type="neon_q"/>
<reg name="q5" bitsize="128" type="neon_q"/>
<reg name="q6" bitsize="128" type="neon_q"/>
<reg name="q7" bitsize="128" type="neon_q"/>
<reg name="q8" bitsize="128" type="neon_q"/>
<reg name="q9" bitsize="128" type="neon_q"/>
<reg name="q10" bitsize="128" type="neon_q"/>
<reg name="q11" bitsize="128" type="neon_q"/>
<reg name="q12" bitsize="128" type="neon_q"/>
<reg name="q13" bitsize="128" type="neon_q"/>
<reg name="q14" bitsize="128" type="neon_q"/>
<reg name="q15" bitsize="128" type="neon_q"/>
<reg name="fpscr" bitsize="32" type="int" group="float"/>
</feature>

17
gdbstub/gdb-xml/arm-vfp-sysregs.xml Normal file
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@@ -0,0 +1,17 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2021 Linaro Ltd.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.
These are A/R profile VFP system registers. Debugger users probably
don't really care about these, but because we used to (incorrectly)
provide them to gdb in the org.gnu.gdb.arm.vfp XML we continue
to do so via this separate XML.
-->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.qemu.gdb.arm.vfp-sysregs">
<reg name="fpsid" bitsize="32" type="int" group="float"/>
<reg name="fpexc" bitsize="32" type="int" group="float"/>
</feature>

27
gdbstub/gdb-xml/arm-vfp.xml Normal file
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@@ -0,0 +1,27 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arm.vfp">
<reg name="d0" bitsize="64" type="float"/>
<reg name="d1" bitsize="64" type="float"/>
<reg name="d2" bitsize="64" type="float"/>
<reg name="d3" bitsize="64" type="float"/>
<reg name="d4" bitsize="64" type="float"/>
<reg name="d5" bitsize="64" type="float"/>
<reg name="d6" bitsize="64" type="float"/>
<reg name="d7" bitsize="64" type="float"/>
<reg name="d8" bitsize="64" type="float"/>
<reg name="d9" bitsize="64" type="float"/>
<reg name="d10" bitsize="64" type="float"/>
<reg name="d11" bitsize="64" type="float"/>
<reg name="d12" bitsize="64" type="float"/>
<reg name="d13" bitsize="64" type="float"/>
<reg name="d14" bitsize="64" type="float"/>
<reg name="d15" bitsize="64" type="float"/>
<reg name="fpscr" bitsize="32" type="int" group="float"/>
</feature>

43
gdbstub/gdb-xml/arm-vfp3.xml Normal file
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@@ -0,0 +1,43 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arm.vfp">
<reg name="d0" bitsize="64" type="float"/>
<reg name="d1" bitsize="64" type="float"/>
<reg name="d2" bitsize="64" type="float"/>
<reg name="d3" bitsize="64" type="float"/>
<reg name="d4" bitsize="64" type="float"/>
<reg name="d5" bitsize="64" type="float"/>
<reg name="d6" bitsize="64" type="float"/>
<reg name="d7" bitsize="64" type="float"/>
<reg name="d8" bitsize="64" type="float"/>
<reg name="d9" bitsize="64" type="float"/>
<reg name="d10" bitsize="64" type="float"/>
<reg name="d11" bitsize="64" type="float"/>
<reg name="d12" bitsize="64" type="float"/>
<reg name="d13" bitsize="64" type="float"/>
<reg name="d14" bitsize="64" type="float"/>
<reg name="d15" bitsize="64" type="float"/>
<reg name="d16" bitsize="64" type="float"/>
<reg name="d17" bitsize="64" type="float"/>
<reg name="d18" bitsize="64" type="float"/>
<reg name="d19" bitsize="64" type="float"/>
<reg name="d20" bitsize="64" type="float"/>
<reg name="d21" bitsize="64" type="float"/>
<reg name="d22" bitsize="64" type="float"/>
<reg name="d23" bitsize="64" type="float"/>
<reg name="d24" bitsize="64" type="float"/>
<reg name="d25" bitsize="64" type="float"/>
<reg name="d26" bitsize="64" type="float"/>
<reg name="d27" bitsize="64" type="float"/>
<reg name="d28" bitsize="64" type="float"/>
<reg name="d29" bitsize="64" type="float"/>
<reg name="d30" bitsize="64" type="float"/>
<reg name="d31" bitsize="64" type="float"/>
<reg name="fpscr" bitsize="32" type="int" group="float"/>
</feature>

49
gdbstub/gdb-xml/avr-cpu.xml Normal file
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@@ -0,0 +1,49 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!-- Register numbers are hard-coded in order to maintain backward
compatibility with older versions of tools that didn't use xml
register descriptions. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.avr.cpu">
<reg name="r0" bitsize="8" type="int" regnum="0"/>
<reg name="r1" bitsize="8" type="int"/>
<reg name="r2" bitsize="8" type="int"/>
<reg name="r3" bitsize="8" type="int"/>
<reg name="r4" bitsize="8" type="int"/>
<reg name="r5" bitsize="8" type="int"/>
<reg name="r6" bitsize="8" type="int"/>
<reg name="r7" bitsize="8" type="int"/>
<reg name="r8" bitsize="8" type="int"/>
<reg name="r9" bitsize="8" type="int"/>
<reg name="r10" bitsize="8" type="int"/>
<reg name="r11" bitsize="8" type="int"/>
<reg name="r12" bitsize="8" type="int"/>
<reg name="r13" bitsize="8" type="int"/>
<reg name="r14" bitsize="8" type="int"/>
<reg name="r15" bitsize="8" type="int"/>
<reg name="r16" bitsize="8" type="int"/>
<reg name="r17" bitsize="8" type="int"/>
<reg name="r18" bitsize="8" type="int"/>
<reg name="r19" bitsize="8" type="int"/>
<reg name="r20" bitsize="8" type="int"/>
<reg name="r21" bitsize="8" type="int"/>
<reg name="r22" bitsize="8" type="int"/>
<reg name="r23" bitsize="8" type="int"/>
<reg name="r24" bitsize="8" type="int"/>
<reg name="r25" bitsize="8" type="int"/>
<reg name="r26" bitsize="8" type="int"/>
<reg name="r27" bitsize="8" type="int"/>
<reg name="r28" bitsize="8" type="int"/>
<reg name="r29" bitsize="8" type="int"/>
<reg name="r30" bitsize="8" type="int"/>
<reg name="r31" bitsize="8" type="int"/>
<reg name="sreg" bitsize="8" type="int"/>
<reg name="sp" bitsize="8" type="int"/>
<reg name="pc" bitsize="8" type="int"/>
</feature>

29
gdbstub/gdb-xml/cf-core.xml Normal file
View File

@@ -0,0 +1,29 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.coldfire.core">
<reg name="d0" bitsize="32"/>
<reg name="d1" bitsize="32"/>
<reg name="d2" bitsize="32"/>
<reg name="d3" bitsize="32"/>
<reg name="d4" bitsize="32"/>
<reg name="d5" bitsize="32"/>
<reg name="d6" bitsize="32"/>
<reg name="d7" bitsize="32"/>
<reg name="a0" bitsize="32" type="data_ptr"/>
<reg name="a1" bitsize="32" type="data_ptr"/>
<reg name="a2" bitsize="32" type="data_ptr"/>
<reg name="a3" bitsize="32" type="data_ptr"/>
<reg name="a4" bitsize="32" type="data_ptr"/>
<reg name="a5" bitsize="32" type="data_ptr"/>
<reg name="fp" bitsize="32" type="data_ptr"/>
<reg name="sp" bitsize="32" type="data_ptr"/>
<reg name="ps" bitsize="32"/>
<reg name="pc" bitsize="32" type="code_ptr"/>
</feature>

22
gdbstub/gdb-xml/cf-fp.xml Normal file
View File

@@ -0,0 +1,22 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.coldfire.fp">
<reg name="fp0" bitsize="64" type="float" group="float" regnum="18"/>
<reg name="fp1" bitsize="64" type="float" group="float"/>
<reg name="fp2" bitsize="64" type="float" group="float"/>
<reg name="fp3" bitsize="64" type="float" group="float"/>
<reg name="fp4" bitsize="64" type="float" group="float"/>
<reg name="fp5" bitsize="64" type="float" group="float"/>
<reg name="fp6" bitsize="64" type="float" group="float"/>
<reg name="fp7" bitsize="64" type="float" group="float"/>
<reg name="fpcontrol" bitsize="32" group="float"/>
<reg name="fpstatus" bitsize="32" group="float"/>,
<reg name="fpiaddr" bitsize="32" type="code_ptr" group="float"/>
</feature>

88
gdbstub/gdb-xml/hexagon-core.xml Normal file
View File

@@ -0,0 +1,88 @@
<?xml version="1.0"?>
<!--
Copyright(c) 2023-2024 Qualcomm Innovation Center, Inc. All Rights Reserved.
This work is licensed under the terms of the GNU GPL, version 2 or
(at your option) any later version. See the COPYING file in the
top-level directory.
Note: this file is intended to be use with LLDB, so it contains fields
that may be unknown to GDB. For more information on such fields, please
see:
https://github.com/llvm/llvm-project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/docs/lldb-gdb-remote.txt#L738-L860
https://github.com/llvm/llvm-project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp#L4275-L4335
-->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.hexagon.core">
<reg name="r00" altname="r0" bitsize="32" offset="0" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="0" generic="r00"/>
<reg name="r01" altname="r1" bitsize="32" offset="4" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="1" generic="r01"/>
<reg name="r02" altname="r2" bitsize="32" offset="8" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="2" generic="r02"/>
<reg name="r03" altname="r3" bitsize="32" offset="12" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="3" generic="r03"/>
<reg name="r04" altname="r4" bitsize="32" offset="16" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="4" generic="r04"/>
<reg name="r05" altname="r5" bitsize="32" offset="20" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="5" generic="r05"/>
<reg name="r06" altname="r6" bitsize="32" offset="24" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="6" generic="r06"/>
<reg name="r07" altname="r7" bitsize="32" offset="28" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="7" generic="r07"/>
<reg name="r08" altname="r8" bitsize="32" offset="32" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="8" generic="r08"/>
<reg name="r09" altname="r9" bitsize="32" offset="36" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="9" generic="r09"/>
<reg name="r10" bitsize="32" offset="40" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="10"/>
<reg name="r11" bitsize="32" offset="44" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="11"/>
<reg name="r12" bitsize="32" offset="48" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="12"/>
<reg name="r13" bitsize="32" offset="52" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="13"/>
<reg name="r14" bitsize="32" offset="56" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="14"/>
<reg name="r15" bitsize="32" offset="60" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="15"/>
<reg name="r16" bitsize="32" offset="64" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="16"/>
<reg name="r17" bitsize="32" offset="68" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="17"/>
<reg name="r18" bitsize="32" offset="72" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="18"/>
<reg name="r19" bitsize="32" offset="76" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="19"/>
<reg name="r20" bitsize="32" offset="80" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="20"/>
<reg name="r21" bitsize="32" offset="84" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="21"/>
<reg name="r22" bitsize="32" offset="88" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="22"/>
<reg name="r23" bitsize="32" offset="92" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="23"/>
<reg name="r24" bitsize="32" offset="96" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="24"/>
<reg name="r25" bitsize="32" offset="100" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="25"/>
<reg name="r26" bitsize="32" offset="104" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="26"/>
<reg name="r27" bitsize="32" offset="108" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="27"/>
<reg name="r28" bitsize="32" offset="112" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="28"/>
<reg name="r29" altname="sp" bitsize="32" offset="116" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="29" generic="sp"/>
<reg name="r30" altname="fp" bitsize="32" offset="120" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="30" generic="fp"/>
<reg name="r31" altname="ra" bitsize="32" offset="124" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="31" generic="ra"/>
<reg name="sa0" bitsize="32" offset="128" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="32"/>
<reg name="lc0" bitsize="32" offset="132" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="33"/>
<reg name="sa1" bitsize="32" offset="136" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="34"/>
<reg name="lc1" bitsize="32" offset="140" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="35"/>
<reg name="p3_0" bitsize="32" offset="144" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="36"/>
<reg name="c5" bitsize="32" offset="148" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="37"/>
<reg name="m0" bitsize="32" offset="152" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="38"/>
<reg name="m1" bitsize="32" offset="156" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="39"/>
<reg name="usr" bitsize="32" offset="160" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="40"/>
<reg name="pc" bitsize="32" offset="164" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="41" generic="pc"/>
<reg name="ugp" bitsize="32" offset="168" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="42"/>
<reg name="gp" bitsize="32" offset="172" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="43"/>
<reg name="cs0" bitsize="32" offset="176" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="44"/>
<reg name="cs1" bitsize="32" offset="180" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="45"/>
<reg name="upcyclelo" bitsize="32" offset="184" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="46"/>
<reg name="upcyclehi" bitsize="32" offset="188" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="47"/>
<reg name="framelimit" bitsize="32" offset="192" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="48"/>
<reg name="framekey" bitsize="32" offset="196" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="49"/>
<reg name="pktcountlo" bitsize="32" offset="200" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="50"/>
<reg name="pktcounthi" bitsize="32" offset="204" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="51"/>
<reg name="pkt_cnt" bitsize="32" offset="208" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="52"/>
<reg name="insn_cnt" bitsize="32" offset="212" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="53"/>
<reg name="hvx_cnt" bitsize="32" offset="216" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="54"/>
<reg name="c23" bitsize="32" offset="220" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="55"/>
<reg name="c24" bitsize="32" offset="224" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="56"/>
<reg name="c25" bitsize="32" offset="228" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="57"/>
<reg name="c26" bitsize="32" offset="232" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="58"/>
<reg name="c27" bitsize="32" offset="236" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="59"/>
<reg name="c28" bitsize="32" offset="240" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="60"/>
<reg name="c29" bitsize="32" offset="244" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="61"/>
<reg name="utimerlo" bitsize="32" offset="248" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="62"/>
<reg name="utimerhi" bitsize="32" offset="252" encoding="uint" format="hex" group="Thread Registers" dwarf_regnum="63"/>
<reg name="p0" bitsize="8" offset="256" encoding="uint" format="hex" group="Predicate Registers" dwarf_regnum="64"/>
<reg name="p1" bitsize="8" offset="257" encoding="uint" format="hex" group="Predicate Registers" dwarf_regnum="65"/>
<reg name="p2" bitsize="8" offset="258" encoding="uint" format="hex" group="Predicate Registers" dwarf_regnum="66"/>
<reg name="p3" bitsize="8" offset="259" encoding="uint" format="hex" group="Predicate Registers" dwarf_regnum="67"/>
</feature>

96
gdbstub/gdb-xml/hexagon-hvx.xml Normal file
View File

@@ -0,0 +1,96 @@
<?xml version="1.0"?>
<!--
Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
This work is licensed under the terms of the GNU GPL, version 2 or
(at your option) any later version. See the COPYING file in the
top-level directory.
Note: this file is intended to be use with LLDB, so it contains fields
that may be unknown to GDB. For more information on such fields, please
see:
https://github.com/llvm/llvm-project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/docs/lldb-gdb-remote.txt#L738-L860
https://github.com/llvm/llvm-project/blob/287aa6c4536408413b860e61fca0318a27214cf3/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp#L4275-L4335
-->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.hexagon.hvx">
<vector id="vud" type="uint64" count="16"/>
<vector id="vd" type="int64" count="16"/>
<vector id="vuw" type="uint32" count="32"/>
<vector id="vw" type="int32" count="32"/>
<vector id="vuh" type="uint16" count="64"/>
<vector id="vh" type="int16" count="64"/>
<vector id="vub" type="uint8" count="128"/>
<vector id="vb" type="int8" count="128"/>
<union id="hex_vec">
<field name="ud" type="vud"/>
<field name="d" type="vd"/>
<field name="uw" type="vuw"/>
<field name="w" type="vw"/>
<field name="uh" type="vuh"/>
<field name="h" type="vh"/>
<field name="ub" type="vub"/>
<field name="b" type="vb"/>
</union>
<flags id="ui2" size="1">
<field name="0" start="0" end="0"/>
<field name="1" start="1" end="1"/>
</flags>
<flags id="ui4" size="1">
<field name="0" start="0" end="0"/>
<field name="1" start="1" end="1"/>
<field name="2" start="2" end="2"/>
<field name="3" start="3" end="3"/>
</flags>
<vector id="vpd" type="uint8" count="16"/>
<vector id="vpw" type="ui4" count="32"/>
<vector id="vph" type="ui2" count="64"/>
<vector id="vpb" type="bool" count="128"/>
<union id="hex_vec_pred">
<field name="d" type="vpd"/>
<field name="w" type="vpw"/>
<field name="h" type="vph"/>
<field name="b" type="vpb"/>
</union>
<reg name="v0" bitsize="1024" offset="256" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="88"/>
<reg name="v1" bitsize="1024" offset="384" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="89"/>
<reg name="v2" bitsize="1024" offset="512" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="90"/>
<reg name="v3" bitsize="1024" offset="640" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="91"/>
<reg name="v4" bitsize="1024" offset="768" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="92"/>
<reg name="v5" bitsize="1024" offset="896" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="93"/>
<reg name="v6" bitsize="1024" offset="1024" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="94"/>
<reg name="v7" bitsize="1024" offset="1152" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="95"/>
<reg name="v8" bitsize="1024" offset="1280" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="96"/>
<reg name="v9" bitsize="1024" offset="1408" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="97"/>
<reg name="v10" bitsize="1024" offset="1536" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="98"/>
<reg name="v11" bitsize="1024" offset="1664" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="99"/>
<reg name="v12" bitsize="1024" offset="1792" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="100"/>
<reg name="v13" bitsize="1024" offset="1920" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="101"/>
<reg name="v14" bitsize="1024" offset="2048" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="102"/>
<reg name="v15" bitsize="1024" offset="2176" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="103"/>
<reg name="v16" bitsize="1024" offset="2304" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="104"/>
<reg name="v17" bitsize="1024" offset="2432" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="105"/>
<reg name="v18" bitsize="1024" offset="2560" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="106"/>
<reg name="v19" bitsize="1024" offset="2688" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="107"/>
<reg name="v20" bitsize="1024" offset="2816" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="108"/>
<reg name="v21" bitsize="1024" offset="2944" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="109"/>
<reg name="v22" bitsize="1024" offset="3072" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="110"/>
<reg name="v23" bitsize="1024" offset="3200" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="111"/>
<reg name="v24" bitsize="1024" offset="3328" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="112"/>
<reg name="v25" bitsize="1024" offset="3456" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="113"/>
<reg name="v26" bitsize="1024" offset="3584" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="114"/>
<reg name="v27" bitsize="1024" offset="3712" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="115"/>
<reg name="v28" bitsize="1024" offset="3840" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="116"/>
<reg name="v29" bitsize="1024" offset="3968" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="117"/>
<reg name="v30" bitsize="1024" offset="4096" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="118"/>
<reg name="v31" bitsize="1024" offset="4224" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="119"/>
<reg name="q0" bitsize="128" offset="4352" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="120"/>
<reg name="q1" bitsize="128" offset="4368" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="121"/>
<reg name="q2" bitsize="128" offset="4384" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="122"/>
<reg name="q3" bitsize="128" offset="4400" encoding="vector" format="hex" group="HVX Vector Registers" dwarf_regnum="123"/>
</feature>

11
gdbstub/gdb-xml/i386-32bit-linux.xml Normal file
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@@ -0,0 +1,11 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2010-2024 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.i386.linux">
<reg name="orig_eax" bitsize="32" type="int"/>
</feature>

192
gdbstub/gdb-xml/i386-32bit.xml Normal file
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@@ -0,0 +1,192 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!-- I386 with SSE -->
<!DOCTYPE target SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.i386.core">
<flags id="i386_eflags" size="4">
<field name="" start="22" end="31"/>
<field name="ID" start="21" end="21"/>
<field name="VIP" start="20" end="20"/>
<field name="VIF" start="19" end="19"/>
<field name="AC" start="18" end="18"/>
<field name="VM" start="17" end="17"/>
<field name="RF" start="16" end="16"/>
<field name="" start="15" end="15"/>
<field name="NT" start="14" end="14"/>
<field name="IOPL" start="12" end="13"/>
<field name="OF" start="11" end="11"/>
<field name="DF" start="10" end="10"/>
<field name="IF" start="9" end="9"/>
<field name="TF" start="8" end="8"/>
<field name="SF" start="7" end="7"/>
<field name="ZF" start="6" end="6"/>
<field name="" start="5" end="5"/>
<field name="AF" start="4" end="4"/>
<field name="" start="3" end="3"/>
<field name="PF" start="2" end="2"/>
<field name="" start="1" end="1"/>
<field name="CF" start="0" end="0"/>
</flags>
<reg name="eax" bitsize="32" type="int32" regnum="0"/>
<reg name="ecx" bitsize="32" type="int32"/>
<reg name="edx" bitsize="32" type="int32"/>
<reg name="ebx" bitsize="32" type="int32"/>
<reg name="esp" bitsize="32" type="data_ptr"/>
<reg name="ebp" bitsize="32" type="data_ptr"/>
<reg name="esi" bitsize="32" type="int32"/>
<reg name="edi" bitsize="32" type="int32"/>
<reg name="eip" bitsize="32" type="code_ptr"/>
<reg name="eflags" bitsize="32" type="i386_eflags"/>
<reg name="cs" bitsize="32" type="int32"/>
<reg name="ss" bitsize="32" type="int32"/>
<reg name="ds" bitsize="32" type="int32"/>
<reg name="es" bitsize="32" type="int32"/>
<reg name="fs" bitsize="32" type="int32"/>
<reg name="gs" bitsize="32" type="int32"/>
<!-- Segment descriptor caches and TLS base MSRs -->
<!--reg name="cs_base" bitsize="32" type="int32"/>
<reg name="ss_base" bitsize="32" type="int32"/>
<reg name="ds_base" bitsize="32" type="int32"/>
<reg name="es_base" bitsize="32" type="int32"/-->
<reg name="fs_base" bitsize="32" type="int32"/>
<reg name="gs_base" bitsize="32" type="int32"/>
<reg name="k_gs_base" bitsize="32" type="int32"/>
<flags id="i386_cr0" size="4">
<field name="PG" start="31" end="31"/>
<field name="CD" start="30" end="30"/>
<field name="NW" start="29" end="29"/>
<field name="AM" start="18" end="18"/>
<field name="WP" start="16" end="16"/>
<field name="NE" start="5" end="5"/>
<field name="ET" start="4" end="4"/>
<field name="TS" start="3" end="3"/>
<field name="EM" start="2" end="2"/>
<field name="MP" start="1" end="1"/>
<field name="PE" start="0" end="0"/>
</flags>
<flags id="i386_cr3" size="4">
<field name="PDBR" start="12" end="31"/>
<!--field name="" start="3" end="11"/>
<field name="WT" start="2" end="2"/>
<field name="CD" start="1" end="1"/>
<field name="" start="0" end="0"/-->
<field name="PCID" start="0" end="11"/>
</flags>
<flags id="i386_cr4" size="4">
<field name="VME" start="0" end="0"/>
<field name="PVI" start="1" end="1"/>
<field name="TSD" start="2" end="2"/>
<field name="DE" start="3" end="3"/>
<field name="PSE" start="4" end="4"/>
<field name="PAE" start="5" end="5"/>
<field name="MCE" start="6" end="6"/>
<field name="PGE" start="7" end="7"/>
<field name="PCE" start="8" end="8"/>
<field name="OSFXSR" start="9" end="9"/>
<field name="OSXMMEXCPT" start="10" end="10"/>
<field name="UMIP" start="11" end="11"/>
<field name="LA57" start="12" end="12"/>
<field name="VMXE" start="13" end="13"/>
<field name="SMXE" start="14" end="14"/>
<field name="FSGSBASE" start="16" end="16"/>
<field name="PCIDE" start="17" end="17"/>
<field name="OSXSAVE" start="18" end="18"/>
<field name="SMEP" start="20" end="20"/>
<field name="SMAP" start="21" end="21"/>
<field name="PKE" start="22" end="22"/>
</flags>
<flags id="i386_efer" size="4">
<field name="TCE" start="15" end="15"/>
<field name="FFXSR" start="14" end="14"/>
<field name="LMSLE" start="13" end="13"/>
<field name="SVME" start="12" end="12"/>
<field name="NXE" start="11" end="11"/>
<field name="LMA" start="10" end="10"/>
<field name="LME" start="8" end="8"/>
<field name="SCE" start="0" end="0"/>
</flags>
<reg name="cr0" bitsize="32" type="i386_cr0"/>
<reg name="cr2" bitsize="32" type="int32"/>
<reg name="cr3" bitsize="32" type="i386_cr3"/>
<reg name="cr4" bitsize="32" type="i386_cr4"/>
<reg name="cr8" bitsize="32" type="int32"/>
<reg name="efer" bitsize="32" type="i386_efer"/>
<reg name="st0" bitsize="80" type="i387_ext"/>
<reg name="st1" bitsize="80" type="i387_ext"/>
<reg name="st2" bitsize="80" type="i387_ext"/>
<reg name="st3" bitsize="80" type="i387_ext"/>
<reg name="st4" bitsize="80" type="i387_ext"/>
<reg name="st5" bitsize="80" type="i387_ext"/>
<reg name="st6" bitsize="80" type="i387_ext"/>
<reg name="st7" bitsize="80" type="i387_ext"/>
<reg name="fctrl" bitsize="32" type="int" group="float"/>
<reg name="fstat" bitsize="32" type="int" group="float"/>
<reg name="ftag" bitsize="32" type="int" group="float"/>
<reg name="fiseg" bitsize="32" type="int" group="float"/>
<reg name="fioff" bitsize="32" type="int" group="float"/>
<reg name="foseg" bitsize="32" type="int" group="float"/>
<reg name="fooff" bitsize="32" type="int" group="float"/>
<reg name="fop" bitsize="32" type="int" group="float"/>
<!--/feature>
<feature name="org.gnu.gdb.i386.32bit.sse"-->
<vector id="v4f" type="ieee_single" count="4"/>
<vector id="v2d" type="ieee_double" count="2"/>
<vector id="v16i8" type="int8" count="16"/>
<vector id="v8i16" type="int16" count="8"/>
<vector id="v4i32" type="int32" count="4"/>
<vector id="v2i64" type="int64" count="2"/>
<union id="vec128">
<field name="v4_float" type="v4f"/>
<field name="v2_double" type="v2d"/>
<field name="v16_int8" type="v16i8"/>
<field name="v8_int16" type="v8i16"/>
<field name="v4_int32" type="v4i32"/>
<field name="v2_int64" type="v2i64"/>
<field name="uint128" type="uint128"/>
</union>
<flags id="i386_mxcsr" size="4">
<field name="IE" start="0" end="0"/>
<field name="DE" start="1" end="1"/>
<field name="ZE" start="2" end="2"/>
<field name="OE" start="3" end="3"/>
<field name="UE" start="4" end="4"/>
<field name="PE" start="5" end="5"/>
<field name="DAZ" start="6" end="6"/>
<field name="IM" start="7" end="7"/>
<field name="DM" start="8" end="8"/>
<field name="ZM" start="9" end="9"/>
<field name="OM" start="10" end="10"/>
<field name="UM" start="11" end="11"/>
<field name="PM" start="12" end="12"/>
<field name="FZ" start="15" end="15"/>
</flags>
<reg name="xmm0" bitsize="128" type="vec128"/>
<reg name="xmm1" bitsize="128" type="vec128"/>
<reg name="xmm2" bitsize="128" type="vec128"/>
<reg name="xmm3" bitsize="128" type="vec128"/>
<reg name="xmm4" bitsize="128" type="vec128"/>
<reg name="xmm5" bitsize="128" type="vec128"/>
<reg name="xmm6" bitsize="128" type="vec128"/>
<reg name="xmm7" bitsize="128" type="vec128"/>
<reg name="mxcsr" bitsize="32" type="i386_mxcsr" group="vector"/>
</feature>

26
gdbstub/gdb-xml/i386-64bit-apx.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2024 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.i386.apx">
<reg name="r16" bitsize="64" type="int64"/>
<reg name="r17" bitsize="64" type="int64"/>
<reg name="r18" bitsize="64" type="int64"/>
<reg name="r19" bitsize="64" type="int64"/>
<reg name="r20" bitsize="64" type="int64"/>
<reg name="r21" bitsize="64" type="int64"/>
<reg name="r22" bitsize="64" type="int64"/>
<reg name="r23" bitsize="64" type="int64"/>
<reg name="r24" bitsize="64" type="int64"/>
<reg name="r25" bitsize="64" type="int64"/>
<reg name="r26" bitsize="64" type="int64"/>
<reg name="r27" bitsize="64" type="int64"/>
<reg name="r28" bitsize="64" type="int64"/>
<reg name="r29" bitsize="64" type="int64"/>
<reg name="r30" bitsize="64" type="int64"/>
<reg name="r31" bitsize="64" type="int64"/>
</feature>

11
gdbstub/gdb-xml/i386-64bit-linux.xml Normal file
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@@ -0,0 +1,11 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2010-2024 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.i386.linux">
<reg name="orig_rax" bitsize="64" type="int"/>
</feature>

216
gdbstub/gdb-xml/i386-64bit.xml Normal file
View File

@@ -0,0 +1,216 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!-- x86_64 64bit -->
<!DOCTYPE target SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.i386.core">
<flags id="x64_eflags" size="4">
<field name="" start="22" end="31"/>
<field name="ID" start="21" end="21"/>
<field name="VIP" start="20" end="20"/>
<field name="VIF" start="19" end="19"/>
<field name="AC" start="18" end="18"/>
<field name="VM" start="17" end="17"/>
<field name="RF" start="16" end="16"/>
<field name="" start="15" end="15"/>
<field name="NT" start="14" end="14"/>
<field name="IOPL" start="12" end="13"/>
<field name="OF" start="11" end="11"/>
<field name="DF" start="10" end="10"/>
<field name="IF" start="9" end="9"/>
<field name="TF" start="8" end="8"/>
<field name="SF" start="7" end="7"/>
<field name="ZF" start="6" end="6"/>
<field name="" start="5" end="5"/>
<field name="AF" start="4" end="4"/>
<field name="" start="3" end="3"/>
<field name="PF" start="2" end="2"/>
<field name="" start="1" end="1"/>
<field name="CF" start="0" end="0"/>
</flags>
<!-- General registers -->
<reg name="rax" bitsize="64" type="int64" regnum="0"/>
<reg name="rbx" bitsize="64" type="int64"/>
<reg name="rcx" bitsize="64" type="int64"/>
<reg name="rdx" bitsize="64" type="int64"/>
<reg name="rsi" bitsize="64" type="int64"/>
<reg name="rdi" bitsize="64" type="int64"/>
<reg name="rbp" bitsize="64" type="data_ptr"/>
<reg name="rsp" bitsize="64" type="data_ptr"/>
<reg name="r8" bitsize="64" type="int64"/>
<reg name="r9" bitsize="64" type="int64"/>
<reg name="r10" bitsize="64" type="int64"/>
<reg name="r11" bitsize="64" type="int64"/>
<reg name="r12" bitsize="64" type="int64"/>
<reg name="r13" bitsize="64" type="int64"/>
<reg name="r14" bitsize="64" type="int64"/>
<reg name="r15" bitsize="64" type="int64"/>
<reg name="rip" bitsize="64" type="code_ptr"/>
<reg name="eflags" bitsize="32" type="x64_eflags"/>
<!-- Segment registers -->
<reg name="cs" bitsize="32" type="int32"/>
<reg name="ss" bitsize="32" type="int32"/>
<reg name="ds" bitsize="32" type="int32"/>
<reg name="es" bitsize="32" type="int32"/>
<reg name="fs" bitsize="32" type="int32"/>
<reg name="gs" bitsize="32" type="int32"/>
<!-- Segment descriptor caches and TLS base MSRs -->
<!--reg name="cs_base" bitsize="64" type="int64"/>
<reg name="ss_base" bitsize="64" type="int64"/>
<reg name="ds_base" bitsize="64" type="int64"/>
<reg name="es_base" bitsize="64" type="int64"/-->
<reg name="fs_base" bitsize="64" type="int64"/>
<reg name="gs_base" bitsize="64" type="int64"/>
<reg name="k_gs_base" bitsize="64" type="int64"/>
<!-- Control registers -->
<flags id="x64_cr0" size="8">
<field name="PG" start="31" end="31"/>
<field name="CD" start="30" end="30"/>
<field name="NW" start="29" end="29"/>
<field name="AM" start="18" end="18"/>
<field name="WP" start="16" end="16"/>
<field name="NE" start="5" end="5"/>
<field name="ET" start="4" end="4"/>
<field name="TS" start="3" end="3"/>
<field name="EM" start="2" end="2"/>
<field name="MP" start="1" end="1"/>
<field name="PE" start="0" end="0"/>
</flags>
<flags id="x64_cr3" size="8">
<field name="PDBR" start="12" end="63"/>
<!--field name="" start="3" end="11"/>
<field name="WT" start="2" end="2"/>
<field name="CD" start="1" end="1"/>
<field name="" start="0" end="0"/-->
<field name="PCID" start="0" end="11"/>
</flags>
<flags id="x64_cr4" size="8">
<field name="PKE" start="22" end="22"/>
<field name="SMAP" start="21" end="21"/>
<field name="SMEP" start="20" end="20"/>
<field name="OSXSAVE" start="18" end="18"/>
<field name="PCIDE" start="17" end="17"/>
<field name="FSGSBASE" start="16" end="16"/>
<field name="SMXE" start="14" end="14"/>
<field name="VMXE" start="13" end="13"/>
<field name="LA57" start="12" end="12"/>
<field name="UMIP" start="11" end="11"/>
<field name="OSXMMEXCPT" start="10" end="10"/>
<field name="OSFXSR" start="9" end="9"/>
<field name="PCE" start="8" end="8"/>
<field name="PGE" start="7" end="7"/>
<field name="MCE" start="6" end="6"/>
<field name="PAE" start="5" end="5"/>
<field name="PSE" start="4" end="4"/>
<field name="DE" start="3" end="3"/>
<field name="TSD" start="2" end="2"/>
<field name="PVI" start="1" end="1"/>
<field name="VME" start="0" end="0"/>
</flags>
<flags id="x64_efer" size="8">
<field name="TCE" start="15" end="15"/>
<field name="FFXSR" start="14" end="14"/>
<field name="LMSLE" start="13" end="13"/>
<field name="SVME" start="12" end="12"/>
<field name="NXE" start="11" end="11"/>
<field name="LMA" start="10" end="10"/>
<field name="LME" start="8" end="8"/>
<field name="SCE" start="0" end="0"/>
</flags>
<reg name="cr0" bitsize="64" type="x64_cr0"/>
<reg name="cr2" bitsize="64" type="int64"/>
<reg name="cr3" bitsize="64" type="x64_cr3"/>
<reg name="cr4" bitsize="64" type="x64_cr4"/>
<reg name="cr8" bitsize="64" type="int64"/>
<reg name="efer" bitsize="64" type="x64_efer"/>
<!-- x87 FPU -->
<reg name="st0" bitsize="80" type="i387_ext"/>
<reg name="st1" bitsize="80" type="i387_ext"/>
<reg name="st2" bitsize="80" type="i387_ext"/>
<reg name="st3" bitsize="80" type="i387_ext"/>
<reg name="st4" bitsize="80" type="i387_ext"/>
<reg name="st5" bitsize="80" type="i387_ext"/>
<reg name="st6" bitsize="80" type="i387_ext"/>
<reg name="st7" bitsize="80" type="i387_ext"/>
<reg name="fctrl" bitsize="32" type="int" group="float"/>
<reg name="fstat" bitsize="32" type="int" group="float"/>
<reg name="ftag" bitsize="32" type="int" group="float"/>
<reg name="fiseg" bitsize="32" type="int" group="float"/>
<reg name="fioff" bitsize="32" type="int" group="float"/>
<reg name="foseg" bitsize="32" type="int" group="float"/>
<reg name="fooff" bitsize="32" type="int" group="float"/>
<reg name="fop" bitsize="32" type="int" group="float"/>
<vector id="v4f" type="ieee_single" count="4"/>
<vector id="v2d" type="ieee_double" count="2"/>
<vector id="v16i8" type="int8" count="16"/>
<vector id="v8i16" type="int16" count="8"/>
<vector id="v4i32" type="int32" count="4"/>
<vector id="v2i64" type="int64" count="2"/>
<union id="vec128">
<field name="v4_float" type="v4f"/>
<field name="v2_double" type="v2d"/>
<field name="v16_int8" type="v16i8"/>
<field name="v8_int16" type="v8i16"/>
<field name="v4_int32" type="v4i32"/>
<field name="v2_int64" type="v2i64"/>
<field name="uint128" type="uint128"/>
</union>
<flags id="x64_mxcsr" size="4">
<field name="IE" start="0" end="0"/>
<field name="DE" start="1" end="1"/>
<field name="ZE" start="2" end="2"/>
<field name="OE" start="3" end="3"/>
<field name="UE" start="4" end="4"/>
<field name="PE" start="5" end="5"/>
<field name="DAZ" start="6" end="6"/>
<field name="IM" start="7" end="7"/>
<field name="DM" start="8" end="8"/>
<field name="ZM" start="9" end="9"/>
<field name="OM" start="10" end="10"/>
<field name="UM" start="11" end="11"/>
<field name="PM" start="12" end="12"/>
<field name="FZ" start="15" end="15"/>
</flags>
<reg name="xmm0" bitsize="128" type="vec128"/>
<reg name="xmm1" bitsize="128" type="vec128"/>
<reg name="xmm2" bitsize="128" type="vec128"/>
<reg name="xmm3" bitsize="128" type="vec128"/>
<reg name="xmm4" bitsize="128" type="vec128"/>
<reg name="xmm5" bitsize="128" type="vec128"/>
<reg name="xmm6" bitsize="128" type="vec128"/>
<reg name="xmm7" bitsize="128" type="vec128"/>
<reg name="xmm8" bitsize="128" type="vec128"/>
<reg name="xmm9" bitsize="128" type="vec128"/>
<reg name="xmm10" bitsize="128" type="vec128"/>
<reg name="xmm11" bitsize="128" type="vec128"/>
<reg name="xmm12" bitsize="128" type="vec128"/>
<reg name="xmm13" bitsize="128" type="vec128"/>
<reg name="xmm14" bitsize="128" type="vec128"/>
<reg name="xmm15" bitsize="128" type="vec128"/>
<reg name="mxcsr" bitsize="32" type="x64_mxcsr" group="vector"/>
</feature>

45
gdbstub/gdb-xml/loongarch-base32.xml Normal file
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@@ -0,0 +1,45 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2022 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.loongarch.base">
<reg name="r0" bitsize="32" type="uint32" group="general"/>
<reg name="r1" bitsize="32" type="code_ptr" group="general"/>
<reg name="r2" bitsize="32" type="data_ptr" group="general"/>
<reg name="r3" bitsize="32" type="data_ptr" group="general"/>
<reg name="r4" bitsize="32" type="uint32" group="general"/>
<reg name="r5" bitsize="32" type="uint32" group="general"/>
<reg name="r6" bitsize="32" type="uint32" group="general"/>
<reg name="r7" bitsize="32" type="uint32" group="general"/>
<reg name="r8" bitsize="32" type="uint32" group="general"/>
<reg name="r9" bitsize="32" type="uint32" group="general"/>
<reg name="r10" bitsize="32" type="uint32" group="general"/>
<reg name="r11" bitsize="32" type="uint32" group="general"/>
<reg name="r12" bitsize="32" type="uint32" group="general"/>
<reg name="r13" bitsize="32" type="uint32" group="general"/>
<reg name="r14" bitsize="32" type="uint32" group="general"/>
<reg name="r15" bitsize="32" type="uint32" group="general"/>
<reg name="r16" bitsize="32" type="uint32" group="general"/>
<reg name="r17" bitsize="32" type="uint32" group="general"/>
<reg name="r18" bitsize="32" type="uint32" group="general"/>
<reg name="r19" bitsize="32" type="uint32" group="general"/>
<reg name="r20" bitsize="32" type="uint32" group="general"/>
<reg name="r21" bitsize="32" type="uint32" group="general"/>
<reg name="r22" bitsize="32" type="data_ptr" group="general"/>
<reg name="r23" bitsize="32" type="uint32" group="general"/>
<reg name="r24" bitsize="32" type="uint32" group="general"/>
<reg name="r25" bitsize="32" type="uint32" group="general"/>
<reg name="r26" bitsize="32" type="uint32" group="general"/>
<reg name="r27" bitsize="32" type="uint32" group="general"/>
<reg name="r28" bitsize="32" type="uint32" group="general"/>
<reg name="r29" bitsize="32" type="uint32" group="general"/>
<reg name="r30" bitsize="32" type="uint32" group="general"/>
<reg name="r31" bitsize="32" type="uint32" group="general"/>
<reg name="orig_a0" bitsize="32" type="uint32" group="general"/>
<reg name="pc" bitsize="32" type="code_ptr" group="general"/>
<reg name="badv" bitsize="32" type="code_ptr" group="general"/>
</feature>

45
gdbstub/gdb-xml/loongarch-base64.xml Normal file
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@@ -0,0 +1,45 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2022 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.loongarch.base">
<reg name="r0" bitsize="64" type="uint64" group="general"/>
<reg name="r1" bitsize="64" type="code_ptr" group="general"/>
<reg name="r2" bitsize="64" type="data_ptr" group="general"/>
<reg name="r3" bitsize="64" type="data_ptr" group="general"/>
<reg name="r4" bitsize="64" type="uint64" group="general"/>
<reg name="r5" bitsize="64" type="uint64" group="general"/>
<reg name="r6" bitsize="64" type="uint64" group="general"/>
<reg name="r7" bitsize="64" type="uint64" group="general"/>
<reg name="r8" bitsize="64" type="uint64" group="general"/>
<reg name="r9" bitsize="64" type="uint64" group="general"/>
<reg name="r10" bitsize="64" type="uint64" group="general"/>
<reg name="r11" bitsize="64" type="uint64" group="general"/>
<reg name="r12" bitsize="64" type="uint64" group="general"/>
<reg name="r13" bitsize="64" type="uint64" group="general"/>
<reg name="r14" bitsize="64" type="uint64" group="general"/>
<reg name="r15" bitsize="64" type="uint64" group="general"/>
<reg name="r16" bitsize="64" type="uint64" group="general"/>
<reg name="r17" bitsize="64" type="uint64" group="general"/>
<reg name="r18" bitsize="64" type="uint64" group="general"/>
<reg name="r19" bitsize="64" type="uint64" group="general"/>
<reg name="r20" bitsize="64" type="uint64" group="general"/>
<reg name="r21" bitsize="64" type="uint64" group="general"/>
<reg name="r22" bitsize="64" type="data_ptr" group="general"/>
<reg name="r23" bitsize="64" type="uint64" group="general"/>
<reg name="r24" bitsize="64" type="uint64" group="general"/>
<reg name="r25" bitsize="64" type="uint64" group="general"/>
<reg name="r26" bitsize="64" type="uint64" group="general"/>
<reg name="r27" bitsize="64" type="uint64" group="general"/>
<reg name="r28" bitsize="64" type="uint64" group="general"/>
<reg name="r29" bitsize="64" type="uint64" group="general"/>
<reg name="r30" bitsize="64" type="uint64" group="general"/>
<reg name="r31" bitsize="64" type="uint64" group="general"/>
<reg name="orig_a0" bitsize="64" type="uint64" group="general"/>
<reg name="pc" bitsize="64" type="code_ptr" group="general"/>
<reg name="badv" bitsize="64" type="code_ptr" group="general"/>
</feature>

57
gdbstub/gdb-xml/loongarch-fpu.xml Normal file
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@@ -0,0 +1,57 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2021 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.loongarch.fpu">
<union id="fputype">
<field name="f" type="ieee_single"/>
<field name="d" type="ieee_double"/>
</union>
<reg name="f0" bitsize="64" type="fputype" group="float"/>
<reg name="f1" bitsize="64" type="fputype" group="float"/>
<reg name="f2" bitsize="64" type="fputype" group="float"/>
<reg name="f3" bitsize="64" type="fputype" group="float"/>
<reg name="f4" bitsize="64" type="fputype" group="float"/>
<reg name="f5" bitsize="64" type="fputype" group="float"/>
<reg name="f6" bitsize="64" type="fputype" group="float"/>
<reg name="f7" bitsize="64" type="fputype" group="float"/>
<reg name="f8" bitsize="64" type="fputype" group="float"/>
<reg name="f9" bitsize="64" type="fputype" group="float"/>
<reg name="f10" bitsize="64" type="fputype" group="float"/>
<reg name="f11" bitsize="64" type="fputype" group="float"/>
<reg name="f12" bitsize="64" type="fputype" group="float"/>
<reg name="f13" bitsize="64" type="fputype" group="float"/>
<reg name="f14" bitsize="64" type="fputype" group="float"/>
<reg name="f15" bitsize="64" type="fputype" group="float"/>
<reg name="f16" bitsize="64" type="fputype" group="float"/>
<reg name="f17" bitsize="64" type="fputype" group="float"/>
<reg name="f18" bitsize="64" type="fputype" group="float"/>
<reg name="f19" bitsize="64" type="fputype" group="float"/>
<reg name="f20" bitsize="64" type="fputype" group="float"/>
<reg name="f21" bitsize="64" type="fputype" group="float"/>
<reg name="f22" bitsize="64" type="fputype" group="float"/>
<reg name="f23" bitsize="64" type="fputype" group="float"/>
<reg name="f24" bitsize="64" type="fputype" group="float"/>
<reg name="f25" bitsize="64" type="fputype" group="float"/>
<reg name="f26" bitsize="64" type="fputype" group="float"/>
<reg name="f27" bitsize="64" type="fputype" group="float"/>
<reg name="f28" bitsize="64" type="fputype" group="float"/>
<reg name="f29" bitsize="64" type="fputype" group="float"/>
<reg name="f30" bitsize="64" type="fputype" group="float"/>
<reg name="f31" bitsize="64" type="fputype" group="float"/>
<reg name="fcc0" bitsize="8" type="uint8" group="float"/>
<reg name="fcc1" bitsize="8" type="uint8" group="float"/>
<reg name="fcc2" bitsize="8" type="uint8" group="float"/>
<reg name="fcc3" bitsize="8" type="uint8" group="float"/>
<reg name="fcc4" bitsize="8" type="uint8" group="float"/>
<reg name="fcc5" bitsize="8" type="uint8" group="float"/>
<reg name="fcc6" bitsize="8" type="uint8" group="float"/>
<reg name="fcc7" bitsize="8" type="uint8" group="float"/>
<reg name="fcsr" bitsize="32" type="uint32" group="float"/>
</feature>

60
gdbstub/gdb-xml/loongarch-lasx.xml Normal file
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@@ -0,0 +1,60 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2022-2024 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.loongarch.lasx">
<vector id="v8f32" type="ieee_single" count="8"/>
<vector id="v4f64" type="ieee_double" count="4"/>
<vector id="v32i8" type="int8" count="32"/>
<vector id="v16i16" type="int16" count="16"/>
<vector id="v8i32" type="int32" count="8"/>
<vector id="v4i64" type="int64" count="4"/>
<vector id="v2ui128" type="uint128" count="2"/>
<union id="lasxv">
<field name="v8_float" type="v8f32"/>
<field name="v4_double" type="v4f64"/>
<field name="v32_int8" type="v32i8"/>
<field name="v16_int16" type="v16i16"/>
<field name="v8_int32" type="v8i32"/>
<field name="v4_int64" type="v4i64"/>
<field name="v2_uint128" type="v2ui128"/>
</union>
<reg name="xr0" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr1" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr2" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr3" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr4" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr5" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr6" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr7" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr8" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr9" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr10" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr11" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr12" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr13" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr14" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr15" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr16" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr17" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr18" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr19" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr20" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr21" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr22" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr23" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr24" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr25" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr26" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr27" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr28" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr29" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr30" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr31" bitsize="256" type="lasxv" group="lasx"/>
</feature>

59
gdbstub/gdb-xml/loongarch-lsx.xml Normal file
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@@ -0,0 +1,59 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2022-2024 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.loongarch.lsx">
<vector id="v4f32" type="ieee_single" count="4"/>
<vector id="v2f64" type="ieee_double" count="2"/>
<vector id="v16i8" type="int8" count="16"/>
<vector id="v8i16" type="int16" count="8"/>
<vector id="v4i32" type="int32" count="4"/>
<vector id="v2i64" type="int64" count="2"/>
<union id="lsxv">
<field name="v4_float" type="v4f32"/>
<field name="v2_double" type="v2f64"/>
<field name="v16_int8" type="v16i8"/>
<field name="v8_int16" type="v8i16"/>
<field name="v4_int32" type="v4i32"/>
<field name="v2_int64" type="v2i64"/>
<field name="uint128" type="uint128"/>
</union>
<reg name="vr0" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr1" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr2" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr3" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr4" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr5" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr6" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr7" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr8" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr9" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr10" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr11" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr12" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr13" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr14" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr15" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr16" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr17" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr18" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr19" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr20" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr21" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr22" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr23" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr26" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr25" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr26" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr27" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr28" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr29" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr30" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr31" bitsize="128" type="lsxv" group="lsx"/>
</feature>

29
gdbstub/gdb-xml/m68k-core.xml Normal file
View File

@@ -0,0 +1,29 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.m68k.core">
<reg name="d0" bitsize="32"/>
<reg name="d1" bitsize="32"/>
<reg name="d2" bitsize="32"/>
<reg name="d3" bitsize="32"/>
<reg name="d4" bitsize="32"/>
<reg name="d5" bitsize="32"/>
<reg name="d6" bitsize="32"/>
<reg name="d7" bitsize="32"/>
<reg name="a0" bitsize="32" type="data_ptr"/>
<reg name="a1" bitsize="32" type="data_ptr"/>
<reg name="a2" bitsize="32" type="data_ptr"/>
<reg name="a3" bitsize="32" type="data_ptr"/>
<reg name="a4" bitsize="32" type="data_ptr"/>
<reg name="a5" bitsize="32" type="data_ptr"/>
<reg name="fp" bitsize="32" type="data_ptr"/>
<reg name="sp" bitsize="32" type="data_ptr"/>
<reg name="ps" bitsize="32"/>
<reg name="pc" bitsize="32" type="code_ptr"/>
</feature>

21
gdbstub/gdb-xml/m68k-fp.xml Normal file
View File

@@ -0,0 +1,21 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.coldfire.fp">
<reg name="fp0" bitsize="96" type="float" group="float" regnum="18"/>
<reg name="fp1" bitsize="96" type="float" group="float"/>
<reg name="fp2" bitsize="96" type="float" group="float"/>
<reg name="fp3" bitsize="96" type="float" group="float"/>
<reg name="fp4" bitsize="96" type="float" group="float"/>
<reg name="fp5" bitsize="96" type="float" group="float"/>
<reg name="fp6" bitsize="96" type="float" group="float"/>
<reg name="fp7" bitsize="96" type="float" group="float"/>
<reg name="fpcontrol" bitsize="32" group="float"/>
<reg name="fpstatus" bitsize="32" group="float"/>,
<reg name="fpiaddr" bitsize="32" type="code_ptr" group="float"/>
</feature>

67
gdbstub/gdb-xml/microblaze-core.xml Normal file
View File

@@ -0,0 +1,67 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.microblaze.core">
<reg name="r0" bitsize="32" regnum="0"/>
<reg name="r1" bitsize="32" type="data_ptr"/>
<reg name="r2" bitsize="32"/>
<reg name="r3" bitsize="32"/>
<reg name="r4" bitsize="32"/>
<reg name="r5" bitsize="32"/>
<reg name="r6" bitsize="32"/>
<reg name="r7" bitsize="32"/>
<reg name="r8" bitsize="32"/>
<reg name="r9" bitsize="32"/>
<reg name="r10" bitsize="32"/>
<reg name="r11" bitsize="32"/>
<reg name="r12" bitsize="32"/>
<reg name="r13" bitsize="32"/>
<reg name="r14" bitsize="32"/>
<reg name="r15" bitsize="32"/>
<reg name="r16" bitsize="32"/>
<reg name="r17" bitsize="32"/>
<reg name="r18" bitsize="32"/>
<reg name="r19" bitsize="32"/>
<reg name="r20" bitsize="32"/>
<reg name="r21" bitsize="32"/>
<reg name="r22" bitsize="32"/>
<reg name="r23" bitsize="32"/>
<reg name="r24" bitsize="32"/>
<reg name="r25" bitsize="32"/>
<reg name="r26" bitsize="32"/>
<reg name="r27" bitsize="32"/>
<reg name="r28" bitsize="32"/>
<reg name="r29" bitsize="32"/>
<reg name="r30" bitsize="32"/>
<reg name="r31" bitsize="32"/>
<reg name="rpc" bitsize="32" type="code_ptr"/>
<reg name="rmsr" bitsize="32"/>
<reg name="rear" bitsize="32"/>
<reg name="resr" bitsize="32"/>
<reg name="rfsr" bitsize="32"/>
<reg name="rbtr" bitsize="32"/>
<reg name="rpvr0" bitsize="32"/>
<reg name="rpvr1" bitsize="32"/>
<reg name="rpvr2" bitsize="32"/>
<reg name="rpvr3" bitsize="32"/>
<reg name="rpvr4" bitsize="32"/>
<reg name="rpvr5" bitsize="32"/>
<reg name="rpvr6" bitsize="32"/>
<reg name="rpvr7" bitsize="32"/>
<reg name="rpvr8" bitsize="32"/>
<reg name="rpvr9" bitsize="32"/>
<reg name="rpvr10" bitsize="32"/>
<reg name="rpvr11" bitsize="32"/>
<reg name="redr" bitsize="32"/>
<reg name="rpid" bitsize="32"/>
<reg name="rzpr" bitsize="32"/>
<reg name="rtlbx" bitsize="32"/>
<reg name="rtlbsx" bitsize="32"/>
<reg name="rtlblo" bitsize="32"/>
<reg name="rtlbhi" bitsize="32"/>
</feature>

12
gdbstub/gdb-xml/microblaze-stack-protect.xml Normal file
View File

@@ -0,0 +1,12 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.microblaze.stack-protect">
<reg name="rslr" bitsize="32"/>
<reg name="rshr" bitsize="32"/>
</feature>

65
gdbstub/gdb-xml/or1k-core.xml Normal file
View File

@@ -0,0 +1,65 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2017-2026 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.or1k.group0">
<reg name="r0" bitsize="32" type="int"/>
<reg name="r1" bitsize="32" type="data_ptr"/>
<reg name="r2" bitsize="32" type="data_ptr"/>
<reg name="r3" bitsize="32" type="int"/>
<reg name="r4" bitsize="32" type="int"/>
<reg name="r5" bitsize="32" type="int"/>
<reg name="r6" bitsize="32" type="int"/>
<reg name="r7" bitsize="32" type="int"/>
<reg name="r8" bitsize="32" type="int"/>
<reg name="r9" bitsize="32" type="code_ptr"/>
<reg name="r10" bitsize="32" type="int"/>
<reg name="r11" bitsize="32" type="int"/>
<reg name="r12" bitsize="32" type="int"/>
<reg name="r13" bitsize="32" type="int"/>
<reg name="r14" bitsize="32" type="int"/>
<reg name="r15" bitsize="32" type="int"/>
<reg name="r16" bitsize="32" type="int"/>
<reg name="r17" bitsize="32" type="int"/>
<reg name="r18" bitsize="32" type="int"/>
<reg name="r19" bitsize="32" type="int"/>
<reg name="r20" bitsize="32" type="int"/>
<reg name="r21" bitsize="32" type="int"/>
<reg name="r22" bitsize="32" type="int"/>
<reg name="r23" bitsize="32" type="int"/>
<reg name="r24" bitsize="32" type="int"/>
<reg name="r25" bitsize="32" type="int"/>
<reg name="r26" bitsize="32" type="int"/>
<reg name="r27" bitsize="32" type="int"/>
<reg name="r28" bitsize="32" type="int"/>
<reg name="r29" bitsize="32" type="int"/>
<reg name="r30" bitsize="32" type="int"/>
<reg name="r31" bitsize="32" type="int"/>
<reg name="ppc" bitsize="32" type="code_ptr"/>
<reg name="npc" bitsize="32" type="code_ptr"/>
<flags id="sr_flags" size="4">
<field name="SM" start="0" end="0"/>
<field name="TEE" start="1" end="1"/>
<field name="IEE" start="2" end="2"/>
<field name="DCE" start="3" end="3"/>
<field name="ICE" start="4" end="4"/>
<field name="DME" start="5" end="5"/>
<field name="IME" start="6" end="6"/>
<field name="LEE" start="7" end="7"/>
<field name="CE" start="8" end="8"/>
<field name="F" start="9" end="9"/>
<field name="CY" start="10" end="10"/>
<field name="OV" start="11" end="11"/>
<field name="OVE" start="12" end="12"/>
<field name="DSX" start="13" end="13"/>
<field name="EPH" start="14" end="14"/>
<field name="FO" start="15" end="15"/>
<field name="SUMRA" start="16" end="16"/>
<field name="CID" start="28" end="31"/>
</flags>
<reg name="sr" bitsize="32" type="sr_flags"/>
</feature>

57
gdbstub/gdb-xml/power-altivec.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.power.altivec">
<vector id="v4f" type="ieee_single" count="4"/>
<vector id="v4i32" type="int32" count="4"/>
<vector id="v8i16" type="int16" count="8"/>
<vector id="v16i8" type="int8" count="16"/>
<union id="vec128">
<field name="uint128" type="uint128"/>
<field name="v4_float" type="v4f"/>
<field name="v4_int32" type="v4i32"/>
<field name="v8_int16" type="v8i16"/>
<field name="v16_int8" type="v16i8"/>
</union>
<reg name="vr0" bitsize="128" type="vec128"/>
<reg name="vr1" bitsize="128" type="vec128"/>
<reg name="vr2" bitsize="128" type="vec128"/>
<reg name="vr3" bitsize="128" type="vec128"/>
<reg name="vr4" bitsize="128" type="vec128"/>
<reg name="vr5" bitsize="128" type="vec128"/>
<reg name="vr6" bitsize="128" type="vec128"/>
<reg name="vr7" bitsize="128" type="vec128"/>
<reg name="vr8" bitsize="128" type="vec128"/>
<reg name="vr9" bitsize="128" type="vec128"/>
<reg name="vr10" bitsize="128" type="vec128"/>
<reg name="vr11" bitsize="128" type="vec128"/>
<reg name="vr12" bitsize="128" type="vec128"/>
<reg name="vr13" bitsize="128" type="vec128"/>
<reg name="vr14" bitsize="128" type="vec128"/>
<reg name="vr15" bitsize="128" type="vec128"/>
<reg name="vr16" bitsize="128" type="vec128"/>
<reg name="vr17" bitsize="128" type="vec128"/>
<reg name="vr18" bitsize="128" type="vec128"/>
<reg name="vr19" bitsize="128" type="vec128"/>
<reg name="vr20" bitsize="128" type="vec128"/>
<reg name="vr21" bitsize="128" type="vec128"/>
<reg name="vr22" bitsize="128" type="vec128"/>
<reg name="vr23" bitsize="128" type="vec128"/>
<reg name="vr24" bitsize="128" type="vec128"/>
<reg name="vr25" bitsize="128" type="vec128"/>
<reg name="vr26" bitsize="128" type="vec128"/>
<reg name="vr27" bitsize="128" type="vec128"/>
<reg name="vr28" bitsize="128" type="vec128"/>
<reg name="vr29" bitsize="128" type="vec128"/>
<reg name="vr30" bitsize="128" type="vec128"/>
<reg name="vr31" bitsize="128" type="vec128"/>
<reg name="vscr" bitsize="32" group="vector"/>
<reg name="vrsave" bitsize="32" group="vector"/>
</feature>

49
gdbstub/gdb-xml/power-core.xml Normal file
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<?xml version="1.0"?>
<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.power.core">
<reg name="r0" bitsize="32" type="uint32"/>
<reg name="r1" bitsize="32" type="uint32"/>
<reg name="r2" bitsize="32" type="uint32"/>
<reg name="r3" bitsize="32" type="uint32"/>
<reg name="r4" bitsize="32" type="uint32"/>
<reg name="r5" bitsize="32" type="uint32"/>
<reg name="r6" bitsize="32" type="uint32"/>
<reg name="r7" bitsize="32" type="uint32"/>
<reg name="r8" bitsize="32" type="uint32"/>
<reg name="r9" bitsize="32" type="uint32"/>
<reg name="r10" bitsize="32" type="uint32"/>
<reg name="r11" bitsize="32" type="uint32"/>
<reg name="r12" bitsize="32" type="uint32"/>
<reg name="r13" bitsize="32" type="uint32"/>
<reg name="r14" bitsize="32" type="uint32"/>
<reg name="r15" bitsize="32" type="uint32"/>
<reg name="r16" bitsize="32" type="uint32"/>
<reg name="r17" bitsize="32" type="uint32"/>
<reg name="r18" bitsize="32" type="uint32"/>
<reg name="r19" bitsize="32" type="uint32"/>
<reg name="r20" bitsize="32" type="uint32"/>
<reg name="r21" bitsize="32" type="uint32"/>
<reg name="r22" bitsize="32" type="uint32"/>
<reg name="r23" bitsize="32" type="uint32"/>
<reg name="r24" bitsize="32" type="uint32"/>
<reg name="r25" bitsize="32" type="uint32"/>
<reg name="r26" bitsize="32" type="uint32"/>
<reg name="r27" bitsize="32" type="uint32"/>
<reg name="r28" bitsize="32" type="uint32"/>
<reg name="r29" bitsize="32" type="uint32"/>
<reg name="r30" bitsize="32" type="uint32"/>
<reg name="r31" bitsize="32" type="uint32"/>
<reg name="pc" bitsize="32" type="code_ptr" regnum="64"/>
<reg name="msr" bitsize="32" type="uint32"/>
<reg name="cr" bitsize="32" type="uint32"/>
<reg name="lr" bitsize="32" type="code_ptr"/>
<reg name="ctr" bitsize="32" type="uint32"/>
<reg name="xer" bitsize="32" type="uint32"/>
</feature>

44
gdbstub/gdb-xml/power-fpu.xml Normal file
View File

@@ -0,0 +1,44 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.power.fpu">
<reg name="f0" bitsize="64" type="ieee_double" regnum="71"/>
<reg name="f1" bitsize="64" type="ieee_double"/>
<reg name="f2" bitsize="64" type="ieee_double"/>
<reg name="f3" bitsize="64" type="ieee_double"/>
<reg name="f4" bitsize="64" type="ieee_double"/>
<reg name="f5" bitsize="64" type="ieee_double"/>
<reg name="f6" bitsize="64" type="ieee_double"/>
<reg name="f7" bitsize="64" type="ieee_double"/>
<reg name="f8" bitsize="64" type="ieee_double"/>
<reg name="f9" bitsize="64" type="ieee_double"/>
<reg name="f10" bitsize="64" type="ieee_double"/>
<reg name="f11" bitsize="64" type="ieee_double"/>
<reg name="f12" bitsize="64" type="ieee_double"/>
<reg name="f13" bitsize="64" type="ieee_double"/>
<reg name="f14" bitsize="64" type="ieee_double"/>
<reg name="f15" bitsize="64" type="ieee_double"/>
<reg name="f16" bitsize="64" type="ieee_double"/>
<reg name="f17" bitsize="64" type="ieee_double"/>
<reg name="f18" bitsize="64" type="ieee_double"/>
<reg name="f19" bitsize="64" type="ieee_double"/>
<reg name="f20" bitsize="64" type="ieee_double"/>
<reg name="f21" bitsize="64" type="ieee_double"/>
<reg name="f22" bitsize="64" type="ieee_double"/>
<reg name="f23" bitsize="64" type="ieee_double"/>
<reg name="f24" bitsize="64" type="ieee_double"/>
<reg name="f25" bitsize="64" type="ieee_double"/>
<reg name="f26" bitsize="64" type="ieee_double"/>
<reg name="f27" bitsize="64" type="ieee_double"/>
<reg name="f28" bitsize="64" type="ieee_double"/>
<reg name="f29" bitsize="64" type="ieee_double"/>
<reg name="f30" bitsize="64" type="ieee_double"/>
<reg name="f31" bitsize="64" type="ieee_double"/>
<reg name="fpscr" bitsize="32" group="float"/>
</feature>

45
gdbstub/gdb-xml/power-spe.xml Normal file
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@@ -0,0 +1,45 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.power.spe">
<reg name="ev0h" bitsize="32" regnum="71"/>
<reg name="ev1h" bitsize="32"/>
<reg name="ev2h" bitsize="32"/>
<reg name="ev3h" bitsize="32"/>
<reg name="ev4h" bitsize="32"/>
<reg name="ev5h" bitsize="32"/>
<reg name="ev6h" bitsize="32"/>
<reg name="ev7h" bitsize="32"/>
<reg name="ev8h" bitsize="32"/>
<reg name="ev9h" bitsize="32"/>
<reg name="ev10h" bitsize="32"/>
<reg name="ev11h" bitsize="32"/>
<reg name="ev12h" bitsize="32"/>
<reg name="ev13h" bitsize="32"/>
<reg name="ev14h" bitsize="32"/>
<reg name="ev15h" bitsize="32"/>
<reg name="ev16h" bitsize="32"/>
<reg name="ev17h" bitsize="32"/>
<reg name="ev18h" bitsize="32"/>
<reg name="ev19h" bitsize="32"/>
<reg name="ev20h" bitsize="32"/>
<reg name="ev21h" bitsize="32"/>
<reg name="ev22h" bitsize="32"/>
<reg name="ev23h" bitsize="32"/>
<reg name="ev24h" bitsize="32"/>
<reg name="ev25h" bitsize="32"/>
<reg name="ev26h" bitsize="32"/>
<reg name="ev27h" bitsize="32"/>
<reg name="ev28h" bitsize="32"/>
<reg name="ev29h" bitsize="32"/>
<reg name="ev30h" bitsize="32"/>
<reg name="ev31h" bitsize="32"/>
<reg name="acc" bitsize="64"/>
<reg name="spefscr" bitsize="32"/>
</feature>

44
gdbstub/gdb-xml/power-vsx.xml Normal file
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@@ -0,0 +1,44 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2008-2015 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!-- POWER7 VSX registers that do not overlap existing FP and VMX
registers. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.power.vsx">
<reg name="vs0h" bitsize="64" type="uint64"/>
<reg name="vs1h" bitsize="64" type="uint64"/>
<reg name="vs2h" bitsize="64" type="uint64"/>
<reg name="vs3h" bitsize="64" type="uint64"/>
<reg name="vs4h" bitsize="64" type="uint64"/>
<reg name="vs5h" bitsize="64" type="uint64"/>
<reg name="vs6h" bitsize="64" type="uint64"/>
<reg name="vs7h" bitsize="64" type="uint64"/>
<reg name="vs8h" bitsize="64" type="uint64"/>
<reg name="vs9h" bitsize="64" type="uint64"/>
<reg name="vs10h" bitsize="64" type="uint64"/>
<reg name="vs11h" bitsize="64" type="uint64"/>
<reg name="vs12h" bitsize="64" type="uint64"/>
<reg name="vs13h" bitsize="64" type="uint64"/>
<reg name="vs14h" bitsize="64" type="uint64"/>
<reg name="vs15h" bitsize="64" type="uint64"/>
<reg name="vs16h" bitsize="64" type="uint64"/>
<reg name="vs17h" bitsize="64" type="uint64"/>
<reg name="vs18h" bitsize="64" type="uint64"/>
<reg name="vs19h" bitsize="64" type="uint64"/>
<reg name="vs20h" bitsize="64" type="uint64"/>
<reg name="vs21h" bitsize="64" type="uint64"/>
<reg name="vs22h" bitsize="64" type="uint64"/>
<reg name="vs23h" bitsize="64" type="uint64"/>
<reg name="vs24h" bitsize="64" type="uint64"/>
<reg name="vs25h" bitsize="64" type="uint64"/>
<reg name="vs26h" bitsize="64" type="uint64"/>
<reg name="vs27h" bitsize="64" type="uint64"/>
<reg name="vs28h" bitsize="64" type="uint64"/>
<reg name="vs29h" bitsize="64" type="uint64"/>
<reg name="vs30h" bitsize="64" type="uint64"/>
<reg name="vs31h" bitsize="64" type="uint64"/>
</feature>

49
gdbstub/gdb-xml/power64-core.xml Normal file
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@@ -0,0 +1,49 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.power.core">
<reg name="r0" bitsize="64" type="uint64"/>
<reg name="r1" bitsize="64" type="uint64"/>
<reg name="r2" bitsize="64" type="uint64"/>
<reg name="r3" bitsize="64" type="uint64"/>
<reg name="r4" bitsize="64" type="uint64"/>
<reg name="r5" bitsize="64" type="uint64"/>
<reg name="r6" bitsize="64" type="uint64"/>
<reg name="r7" bitsize="64" type="uint64"/>
<reg name="r8" bitsize="64" type="uint64"/>
<reg name="r9" bitsize="64" type="uint64"/>
<reg name="r10" bitsize="64" type="uint64"/>
<reg name="r11" bitsize="64" type="uint64"/>
<reg name="r12" bitsize="64" type="uint64"/>
<reg name="r13" bitsize="64" type="uint64"/>
<reg name="r14" bitsize="64" type="uint64"/>
<reg name="r15" bitsize="64" type="uint64"/>
<reg name="r16" bitsize="64" type="uint64"/>
<reg name="r17" bitsize="64" type="uint64"/>
<reg name="r18" bitsize="64" type="uint64"/>
<reg name="r19" bitsize="64" type="uint64"/>
<reg name="r20" bitsize="64" type="uint64"/>
<reg name="r21" bitsize="64" type="uint64"/>
<reg name="r22" bitsize="64" type="uint64"/>
<reg name="r23" bitsize="64" type="uint64"/>
<reg name="r24" bitsize="64" type="uint64"/>
<reg name="r25" bitsize="64" type="uint64"/>
<reg name="r26" bitsize="64" type="uint64"/>
<reg name="r27" bitsize="64" type="uint64"/>
<reg name="r28" bitsize="64" type="uint64"/>
<reg name="r29" bitsize="64" type="uint64"/>
<reg name="r30" bitsize="64" type="uint64"/>
<reg name="r31" bitsize="64" type="uint64"/>
<reg name="pc" bitsize="64" type="code_ptr" regnum="64"/>
<reg name="msr" bitsize="64" type="uint64"/>
<reg name="cr" bitsize="32" type="uint32"/>
<reg name="lr" bitsize="64" type="code_ptr"/>
<reg name="ctr" bitsize="64" type="uint64"/>
<reg name="xer" bitsize="32" type="uint32"/>
</feature>

43
gdbstub/gdb-xml/riscv-32bit-cpu.xml Normal file
View File

@@ -0,0 +1,43 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.riscv.cpu">
<reg name="zero" bitsize="32" type="int"/>
<reg name="ra" bitsize="32" type="code_ptr"/>
<reg name="sp" bitsize="32" type="data_ptr"/>
<reg name="gp" bitsize="32" type="data_ptr"/>
<reg name="tp" bitsize="32" type="data_ptr"/>
<reg name="t0" bitsize="32" type="int"/>
<reg name="t1" bitsize="32" type="int"/>
<reg name="t2" bitsize="32" type="int"/>
<reg name="fp" bitsize="32" type="data_ptr"/>
<reg name="s1" bitsize="32" type="int"/>
<reg name="a0" bitsize="32" type="int"/>
<reg name="a1" bitsize="32" type="int"/>
<reg name="a2" bitsize="32" type="int"/>
<reg name="a3" bitsize="32" type="int"/>
<reg name="a4" bitsize="32" type="int"/>
<reg name="a5" bitsize="32" type="int"/>
<reg name="a6" bitsize="32" type="int"/>
<reg name="a7" bitsize="32" type="int"/>
<reg name="s2" bitsize="32" type="int"/>
<reg name="s3" bitsize="32" type="int"/>
<reg name="s4" bitsize="32" type="int"/>
<reg name="s5" bitsize="32" type="int"/>
<reg name="s6" bitsize="32" type="int"/>
<reg name="s7" bitsize="32" type="int"/>
<reg name="s8" bitsize="32" type="int"/>
<reg name="s9" bitsize="32" type="int"/>
<reg name="s10" bitsize="32" type="int"/>
<reg name="s11" bitsize="32" type="int"/>
<reg name="t3" bitsize="32" type="int"/>
<reg name="t4" bitsize="32" type="int"/>
<reg name="t5" bitsize="32" type="int"/>
<reg name="t6" bitsize="32" type="int"/>
<reg name="pc" bitsize="32" type="code_ptr"/>
</feature>

42
gdbstub/gdb-xml/riscv-32bit-fpu.xml Normal file
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@@ -0,0 +1,42 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.riscv.fpu">
<reg name="ft0" bitsize="32" type="ieee_single"/>
<reg name="ft1" bitsize="32" type="ieee_single"/>
<reg name="ft2" bitsize="32" type="ieee_single"/>
<reg name="ft3" bitsize="32" type="ieee_single"/>
<reg name="ft4" bitsize="32" type="ieee_single"/>
<reg name="ft5" bitsize="32" type="ieee_single"/>
<reg name="ft6" bitsize="32" type="ieee_single"/>
<reg name="ft7" bitsize="32" type="ieee_single"/>
<reg name="fs0" bitsize="32" type="ieee_single"/>
<reg name="fs1" bitsize="32" type="ieee_single"/>
<reg name="fa0" bitsize="32" type="ieee_single"/>
<reg name="fa1" bitsize="32" type="ieee_single"/>
<reg name="fa2" bitsize="32" type="ieee_single"/>
<reg name="fa3" bitsize="32" type="ieee_single"/>
<reg name="fa4" bitsize="32" type="ieee_single"/>
<reg name="fa5" bitsize="32" type="ieee_single"/>
<reg name="fa6" bitsize="32" type="ieee_single"/>
<reg name="fa7" bitsize="32" type="ieee_single"/>
<reg name="fs2" bitsize="32" type="ieee_single"/>
<reg name="fs3" bitsize="32" type="ieee_single"/>
<reg name="fs4" bitsize="32" type="ieee_single"/>
<reg name="fs5" bitsize="32" type="ieee_single"/>
<reg name="fs6" bitsize="32" type="ieee_single"/>
<reg name="fs7" bitsize="32" type="ieee_single"/>
<reg name="fs8" bitsize="32" type="ieee_single"/>
<reg name="fs9" bitsize="32" type="ieee_single"/>
<reg name="fs10" bitsize="32" type="ieee_single"/>
<reg name="fs11" bitsize="32" type="ieee_single"/>
<reg name="ft8" bitsize="32" type="ieee_single"/>
<reg name="ft9" bitsize="32" type="ieee_single"/>
<reg name="ft10" bitsize="32" type="ieee_single"/>
<reg name="ft11" bitsize="32" type="ieee_single"/>
</feature>

11
gdbstub/gdb-xml/riscv-32bit-virtual.xml Normal file
View File

@@ -0,0 +1,11 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.riscv.virtual">
<reg name="priv" bitsize="32"/>
</feature>

43
gdbstub/gdb-xml/riscv-64bit-cpu.xml Normal file
View File

@@ -0,0 +1,43 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.riscv.cpu">
<reg name="zero" bitsize="64" type="int"/>
<reg name="ra" bitsize="64" type="code_ptr"/>
<reg name="sp" bitsize="64" type="data_ptr"/>
<reg name="gp" bitsize="64" type="data_ptr"/>
<reg name="tp" bitsize="64" type="data_ptr"/>
<reg name="t0" bitsize="64" type="int"/>
<reg name="t1" bitsize="64" type="int"/>
<reg name="t2" bitsize="64" type="int"/>
<reg name="fp" bitsize="64" type="data_ptr"/>
<reg name="s1" bitsize="64" type="int"/>
<reg name="a0" bitsize="64" type="int"/>
<reg name="a1" bitsize="64" type="int"/>
<reg name="a2" bitsize="64" type="int"/>
<reg name="a3" bitsize="64" type="int"/>
<reg name="a4" bitsize="64" type="int"/>
<reg name="a5" bitsize="64" type="int"/>
<reg name="a6" bitsize="64" type="int"/>
<reg name="a7" bitsize="64" type="int"/>
<reg name="s2" bitsize="64" type="int"/>
<reg name="s3" bitsize="64" type="int"/>
<reg name="s4" bitsize="64" type="int"/>
<reg name="s5" bitsize="64" type="int"/>
<reg name="s6" bitsize="64" type="int"/>
<reg name="s7" bitsize="64" type="int"/>
<reg name="s8" bitsize="64" type="int"/>
<reg name="s9" bitsize="64" type="int"/>
<reg name="s10" bitsize="64" type="int"/>
<reg name="s11" bitsize="64" type="int"/>
<reg name="t3" bitsize="64" type="int"/>
<reg name="t4" bitsize="64" type="int"/>
<reg name="t5" bitsize="64" type="int"/>
<reg name="t6" bitsize="64" type="int"/>
<reg name="pc" bitsize="64" type="code_ptr"/>
</feature>

48
gdbstub/gdb-xml/riscv-64bit-fpu.xml Normal file
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@@ -0,0 +1,48 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.riscv.fpu">
<union id="riscv_double">
<field name="float" type="ieee_single"/>
<field name="double" type="ieee_double"/>
</union>
<reg name="ft0" bitsize="64" type="riscv_double"/>
<reg name="ft1" bitsize="64" type="riscv_double"/>
<reg name="ft2" bitsize="64" type="riscv_double"/>
<reg name="ft3" bitsize="64" type="riscv_double"/>
<reg name="ft4" bitsize="64" type="riscv_double"/>
<reg name="ft5" bitsize="64" type="riscv_double"/>
<reg name="ft6" bitsize="64" type="riscv_double"/>
<reg name="ft7" bitsize="64" type="riscv_double"/>
<reg name="fs0" bitsize="64" type="riscv_double"/>
<reg name="fs1" bitsize="64" type="riscv_double"/>
<reg name="fa0" bitsize="64" type="riscv_double"/>
<reg name="fa1" bitsize="64" type="riscv_double"/>
<reg name="fa2" bitsize="64" type="riscv_double"/>
<reg name="fa3" bitsize="64" type="riscv_double"/>
<reg name="fa4" bitsize="64" type="riscv_double"/>
<reg name="fa5" bitsize="64" type="riscv_double"/>
<reg name="fa6" bitsize="64" type="riscv_double"/>
<reg name="fa7" bitsize="64" type="riscv_double"/>
<reg name="fs2" bitsize="64" type="riscv_double"/>
<reg name="fs3" bitsize="64" type="riscv_double"/>
<reg name="fs4" bitsize="64" type="riscv_double"/>
<reg name="fs5" bitsize="64" type="riscv_double"/>
<reg name="fs6" bitsize="64" type="riscv_double"/>
<reg name="fs7" bitsize="64" type="riscv_double"/>
<reg name="fs8" bitsize="64" type="riscv_double"/>
<reg name="fs9" bitsize="64" type="riscv_double"/>
<reg name="fs10" bitsize="64" type="riscv_double"/>
<reg name="fs11" bitsize="64" type="riscv_double"/>
<reg name="ft8" bitsize="64" type="riscv_double"/>
<reg name="ft9" bitsize="64" type="riscv_double"/>
<reg name="ft10" bitsize="64" type="riscv_double"/>
<reg name="ft11" bitsize="64" type="riscv_double"/>
</feature>

11
gdbstub/gdb-xml/riscv-64bit-virtual.xml Normal file
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@@ -0,0 +1,11 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.riscv.virtual">
<reg name="priv" bitsize="64"/>
</feature>

70
gdbstub/gdb-xml/rx-core.xml Normal file
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@@ -0,0 +1,70 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2019 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.rx.core">
<reg name="r0" bitsize="32" type="data_ptr"/>
<reg name="r1" bitsize="32" type="uint32"/>
<reg name="r2" bitsize="32" type="uint32"/>
<reg name="r3" bitsize="32" type="uint32"/>
<reg name="r4" bitsize="32" type="uint32"/>
<reg name="r5" bitsize="32" type="uint32"/>
<reg name="r6" bitsize="32" type="uint32"/>
<reg name="r7" bitsize="32" type="uint32"/>
<reg name="r8" bitsize="32" type="uint32"/>
<reg name="r9" bitsize="32" type="uint32"/>
<reg name="r10" bitsize="32" type="uint32"/>
<reg name="r11" bitsize="32" type="uint32"/>
<reg name="r12" bitsize="32" type="uint32"/>
<reg name="r13" bitsize="32" type="uint32"/>
<reg name="r14" bitsize="32" type="uint32"/>
<reg name="r15" bitsize="32" type="uint32"/>
<flags id="psw_flags" size="4">
<field name="C" start="0" end="0"/>
<field name="Z" start="1" end="1"/>
<field name="S" start="2" end="2"/>
<field name="O" start="3" end="3"/>
<field name="I" start="16" end="16"/>
<field name="U" start="17" end="17"/>
<field name="PM" start="20" end="20"/>
<field name="IPL" start="24" end="27"/>
</flags>
<flags id="fpsw_flags" size="4">
<field name="RM" start="0" end="1"/>
<field name="CV" start="2" end="2"/>
<field name="CO" start="3" end="3"/>
<field name="CZ" start="4" end="4"/>
<field name="CU" start="5" end="5"/>
<field name="CX" start="6" end="6"/>
<field name="CE" start="7" end="7"/>
<field name="DN" start="8" end="8"/>
<field name="EV" start="10" end="10"/>
<field name="EO" start="11" end="11"/>
<field name="EZ" start="12" end="12"/>
<field name="EU" start="13" end="13"/>
<field name="EX" start="14" end="14"/>
<field name="FV" start="26" end="26"/>
<field name="FO" start="27" end="27"/>
<field name="FZ" start="28" end="28"/>
<field name="FU" start="29" end="29"/>
<field name="FX" start="30" end="30"/>
<field name="FS" start="31" end="31"/>
</flags>
<reg name="usp" bitsize="32" type="data_ptr"/>
<reg name="isp" bitsize="32" type="data_ptr"/>
<reg name="psw" bitsize="32" type="psw_flags"/>
<reg name="pc" bitsize="32" type="code_ptr"/>
<reg name="intb" bitsize="32" type="data_ptr"/>
<reg name="bpsw" bitsize="32" type="psw_flags"/>
<reg name="bpc" bitsize="32" type="code_ptr"/>
<reg name="fintv" bitsize="32" type="code_ptr"/>
<reg name="fpsw" bitsize="32" type="fpsw_flags"/>
<reg name="acc" bitsize="64" type="uint64"/>
</feature>

26
gdbstub/gdb-xml/s390-acr.xml Normal file
View File

@@ -0,0 +1,26 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2010-2014 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.s390.acr">
<reg name="acr0" bitsize="32" type="uint32" group="access"/>
<reg name="acr1" bitsize="32" type="uint32" group="access"/>
<reg name="acr2" bitsize="32" type="uint32" group="access"/>
<reg name="acr3" bitsize="32" type="uint32" group="access"/>
<reg name="acr4" bitsize="32" type="uint32" group="access"/>
<reg name="acr5" bitsize="32" type="uint32" group="access"/>
<reg name="acr6" bitsize="32" type="uint32" group="access"/>
<reg name="acr7" bitsize="32" type="uint32" group="access"/>
<reg name="acr8" bitsize="32" type="uint32" group="access"/>
<reg name="acr9" bitsize="32" type="uint32" group="access"/>
<reg name="acr10" bitsize="32" type="uint32" group="access"/>
<reg name="acr11" bitsize="32" type="uint32" group="access"/>
<reg name="acr12" bitsize="32" type="uint32" group="access"/>
<reg name="acr13" bitsize="32" type="uint32" group="access"/>
<reg name="acr14" bitsize="32" type="uint32" group="access"/>
<reg name="acr15" bitsize="32" type="uint32" group="access"/>
</feature>

26
gdbstub/gdb-xml/s390-cr.xml Normal file
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@@ -0,0 +1,26 @@
<?xml version="1.0"?>
<!-- Copyright 2015 IBM Corp.
This work is licensed under the terms of the GNU GPL, version 2 or
(at your option) any later version. See the COPYING file in the
top-level directory. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.s390.cr">
<reg name="cr0" bitsize="64" type="uint64" group="control"/>
<reg name="cr1" bitsize="64" type="uint64" group="control"/>
<reg name="cr2" bitsize="64" type="uint64" group="control"/>
<reg name="cr3" bitsize="64" type="uint64" group="control"/>
<reg name="cr4" bitsize="64" type="uint64" group="control"/>
<reg name="cr5" bitsize="64" type="uint64" group="control"/>
<reg name="cr6" bitsize="64" type="uint64" group="control"/>
<reg name="cr7" bitsize="64" type="uint64" group="control"/>
<reg name="cr8" bitsize="64" type="uint64" group="control"/>
<reg name="cr9" bitsize="64" type="uint64" group="control"/>
<reg name="cr10" bitsize="64" type="uint64" group="control"/>
<reg name="cr11" bitsize="64" type="uint64" group="control"/>
<reg name="cr12" bitsize="64" type="uint64" group="control"/>
<reg name="cr13" bitsize="64" type="uint64" group="control"/>
<reg name="cr14" bitsize="64" type="uint64" group="control"/>
<reg name="cr15" bitsize="64" type="uint64" group="control"/>
</feature>

27
gdbstub/gdb-xml/s390-fpr.xml Normal file
View File

@@ -0,0 +1,27 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2010-2014 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.s390.fpr">
<reg name="fpc" bitsize="32" type="uint32" group="float"/>
<reg name="f0" bitsize="64" type="ieee_double" group="float"/>
<reg name="f1" bitsize="64" type="ieee_double" group="float"/>
<reg name="f2" bitsize="64" type="ieee_double" group="float"/>
<reg name="f3" bitsize="64" type="ieee_double" group="float"/>
<reg name="f4" bitsize="64" type="ieee_double" group="float"/>
<reg name="f5" bitsize="64" type="ieee_double" group="float"/>
<reg name="f6" bitsize="64" type="ieee_double" group="float"/>
<reg name="f7" bitsize="64" type="ieee_double" group="float"/>
<reg name="f8" bitsize="64" type="ieee_double" group="float"/>
<reg name="f9" bitsize="64" type="ieee_double" group="float"/>
<reg name="f10" bitsize="64" type="ieee_double" group="float"/>
<reg name="f11" bitsize="64" type="ieee_double" group="float"/>
<reg name="f12" bitsize="64" type="ieee_double" group="float"/>
<reg name="f13" bitsize="64" type="ieee_double" group="float"/>
<reg name="f14" bitsize="64" type="ieee_double" group="float"/>
<reg name="f15" bitsize="64" type="ieee_double" group="float"/>
</feature>

14
gdbstub/gdb-xml/s390-gs.xml Normal file
View File

@@ -0,0 +1,14 @@
<?xml version="1.0"?>
<!-- Copyright 2017 IBM Corp.
This work is licensed under the terms of the GNU GPL, version 2 or
(at your option) any later version. See the COPYING file in the
top-level directory. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.s390.gs">
<reg name="gs_reserved" bitsize="64" type="uint64" group="system"/>
<reg name="gsd" bitsize="64" type="uint64" group="system"/>
<reg name="gssm" bitsize="64" type="uint64" group="system"/>
<reg name="gsepla" bitsize="64" type="data_ptr" group="system"/>
</feature>

14
gdbstub/gdb-xml/s390-virt-kvm.xml Normal file
View File

@@ -0,0 +1,14 @@
<?xml version="1.0"?>
<!-- Copyright 2023 IBM Corp.
This work is licensed under the terms of the GNU GPL, version 2 or
(at your option) any later version. See the COPYING file in the
top-level directory. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.s390.virt.kvm">
<reg name="pp" bitsize="64" type="uint64" group="system"/>
<reg name="pfault_token" bitsize="64" type="uint64" group="system"/>
<reg name="pfault_select" bitsize="64" type="uint64" group="system"/>
<reg name="pfault_compare" bitsize="64" type="uint64" group="system"/>
</feature>

14
gdbstub/gdb-xml/s390-virt.xml Normal file
View File

@@ -0,0 +1,14 @@
<?xml version="1.0"?>
<!-- Copyright 2015 IBM Corp.
This work is licensed under the terms of the GNU GPL, version 2 or
(at your option) any later version. See the COPYING file in the
top-level directory. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.s390.virt">
<reg name="ckc" bitsize="64" type="uint64" group="system"/>
<reg name="cputm" bitsize="64" type="uint64" group="system"/>
<reg name="last_break" bitsize="64" type="code_ptr" group="system"/>
<reg name="prefix" bitsize="64" type="data_ptr" group="system"/>
</feature>

59
gdbstub/gdb-xml/s390-vx.xml Normal file
View File

@@ -0,0 +1,59 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2010-2014 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.s390.vx">
<vector id="v4f" type="ieee_single" count="4"/>
<vector id="v2d" type="ieee_double" count="2"/>
<vector id="v16i8" type="int8" count="16"/>
<vector id="v8i16" type="int16" count="8"/>
<vector id="v4i32" type="int32" count="4"/>
<vector id="v2i64" type="int64" count="2"/>
<union id="vec128">
<field name="v4_float" type="v4f"/>
<field name="v2_double" type="v2d"/>
<field name="v16_int8" type="v16i8"/>
<field name="v8_int16" type="v8i16"/>
<field name="v4_int32" type="v4i32"/>
<field name="v2_int64" type="v2i64"/>
<field name="uint128" type="uint128"/>
</union>
<reg name="v0l" bitsize="64" type="uint64"/>
<reg name="v1l" bitsize="64" type="uint64"/>
<reg name="v2l" bitsize="64" type="uint64"/>
<reg name="v3l" bitsize="64" type="uint64"/>
<reg name="v4l" bitsize="64" type="uint64"/>
<reg name="v5l" bitsize="64" type="uint64"/>
<reg name="v6l" bitsize="64" type="uint64"/>
<reg name="v7l" bitsize="64" type="uint64"/>
<reg name="v8l" bitsize="64" type="uint64"/>
<reg name="v9l" bitsize="64" type="uint64"/>
<reg name="v10l" bitsize="64" type="uint64"/>
<reg name="v11l" bitsize="64" type="uint64"/>
<reg name="v12l" bitsize="64" type="uint64"/>
<reg name="v13l" bitsize="64" type="uint64"/>
<reg name="v14l" bitsize="64" type="uint64"/>
<reg name="v15l" bitsize="64" type="uint64"/>
<reg name="v16" bitsize="128" type="vec128"/>
<reg name="v17" bitsize="128" type="vec128"/>
<reg name="v18" bitsize="128" type="vec128"/>
<reg name="v19" bitsize="128" type="vec128"/>
<reg name="v20" bitsize="128" type="vec128"/>
<reg name="v21" bitsize="128" type="vec128"/>
<reg name="v22" bitsize="128" type="vec128"/>
<reg name="v23" bitsize="128" type="vec128"/>
<reg name="v24" bitsize="128" type="vec128"/>
<reg name="v25" bitsize="128" type="vec128"/>
<reg name="v26" bitsize="128" type="vec128"/>
<reg name="v27" bitsize="128" type="vec128"/>
<reg name="v28" bitsize="128" type="vec128"/>
<reg name="v29" bitsize="128" type="vec128"/>
<reg name="v30" bitsize="128" type="vec128"/>
<reg name="v31" bitsize="128" type="vec128"/>
</feature>

28
gdbstub/gdb-xml/s390x-core64.xml Normal file
View File

@@ -0,0 +1,28 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2010-2014 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.s390.core">
<reg name="pswm" bitsize="64" type="uint64" group="psw"/>
<reg name="pswa" bitsize="64" type="uint64" group="psw"/>
<reg name="r0" bitsize="64" type="uint64" group="general"/>
<reg name="r1" bitsize="64" type="uint64" group="general"/>
<reg name="r2" bitsize="64" type="uint64" group="general"/>
<reg name="r3" bitsize="64" type="uint64" group="general"/>
<reg name="r4" bitsize="64" type="uint64" group="general"/>
<reg name="r5" bitsize="64" type="uint64" group="general"/>
<reg name="r6" bitsize="64" type="uint64" group="general"/>
<reg name="r7" bitsize="64" type="uint64" group="general"/>
<reg name="r8" bitsize="64" type="uint64" group="general"/>
<reg name="r9" bitsize="64" type="uint64" group="general"/>
<reg name="r10" bitsize="64" type="uint64" group="general"/>
<reg name="r11" bitsize="64" type="uint64" group="general"/>
<reg name="r12" bitsize="64" type="uint64" group="general"/>
<reg name="r13" bitsize="64" type="uint64" group="general"/>
<reg name="r14" bitsize="64" type="uint64" group="general"/>
<reg name="r15" bitsize="64" type="uint64" group="general"/>
</feature>

18
gdbstub/gdb-xml/sparc32-cp0.xml Normal file
View File

@@ -0,0 +1,18 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.sparc.cp0">
<reg name="y" bitsize="32" type="uint32" regnum="64"/>
<reg name="psr" bitsize="32" type="uint32" regnum="65"/>
<reg name="wim" bitsize="32" type="uint32" regnum="66"/>
<reg name="tbr" bitsize="32" type="uint32" regnum="67"/>
<reg name="pc" bitsize="32" type="code_ptr" regnum="68"/>
<reg name="npc" bitsize="32" type="code_ptr" regnum="69"/>
<reg name="fsr" bitsize="32" type="uint32" regnum="70"/>
<reg name="csr" bitsize="32" type="uint32" regnum="71"/>
</feature>

42
gdbstub/gdb-xml/sparc32-cpu.xml Normal file
View File

@@ -0,0 +1,42 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.sparc.cpu">
<reg name="g0" bitsize="32" type="uint32" regnum="0"/>
<reg name="g1" bitsize="32" type="uint32" regnum="1"/>
<reg name="g2" bitsize="32" type="uint32" regnum="2"/>
<reg name="g3" bitsize="32" type="uint32" regnum="3"/>
<reg name="g4" bitsize="32" type="uint32" regnum="4"/>
<reg name="g5" bitsize="32" type="uint32" regnum="5"/>
<reg name="g6" bitsize="32" type="uint32" regnum="6"/>
<reg name="g7" bitsize="32" type="uint32" regnum="7"/>
<reg name="o0" bitsize="32" type="uint32" regnum="8"/>
<reg name="o1" bitsize="32" type="uint32" regnum="9"/>
<reg name="o2" bitsize="32" type="uint32" regnum="10"/>
<reg name="o3" bitsize="32" type="uint32" regnum="11"/>
<reg name="o4" bitsize="32" type="uint32" regnum="12"/>
<reg name="o5" bitsize="32" type="uint32" regnum="13"/>
<reg name="sp" bitsize="32" type="uint32" regnum="14"/>
<reg name="o7" bitsize="32" type="uint32" regnum="15"/>
<reg name="l0" bitsize="32" type="uint32" regnum="16"/>
<reg name="l1" bitsize="32" type="uint32" regnum="17"/>
<reg name="l2" bitsize="32" type="uint32" regnum="18"/>
<reg name="l3" bitsize="32" type="uint32" regnum="19"/>
<reg name="l4" bitsize="32" type="uint32" regnum="20"/>
<reg name="l5" bitsize="32" type="uint32" regnum="21"/>
<reg name="l6" bitsize="32" type="uint32" regnum="22"/>
<reg name="l7" bitsize="32" type="uint32" regnum="23"/>
<reg name="i0" bitsize="32" type="uint32" regnum="24"/>
<reg name="i1" bitsize="32" type="uint32" regnum="25"/>
<reg name="i2" bitsize="32" type="uint32" regnum="26"/>
<reg name="i3" bitsize="32" type="uint32" regnum="27"/>
<reg name="i4" bitsize="32" type="uint32" regnum="28"/>
<reg name="i5" bitsize="32" type="uint32" regnum="29"/>
<reg name="fp" bitsize="32" type="uint32" regnum="30"/>
<reg name="i7" bitsize="32" type="uint32" regnum="31"/>
</feature>

42
gdbstub/gdb-xml/sparc32-fpu.xml Normal file
View File

@@ -0,0 +1,42 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.sparc.fpu">
<reg name="f0" bitsize="32" type="ieee_single" regnum="32"/>
<reg name="f1" bitsize="32" type="ieee_single" regnum="33"/>
<reg name="f2" bitsize="32" type="ieee_single" regnum="34"/>
<reg name="f3" bitsize="32" type="ieee_single" regnum="35"/>
<reg name="f4" bitsize="32" type="ieee_single" regnum="36"/>
<reg name="f5" bitsize="32" type="ieee_single" regnum="37"/>
<reg name="f6" bitsize="32" type="ieee_single" regnum="38"/>
<reg name="f7" bitsize="32" type="ieee_single" regnum="39"/>
<reg name="f8" bitsize="32" type="ieee_single" regnum="40"/>
<reg name="f9" bitsize="32" type="ieee_single" regnum="41"/>
<reg name="f10" bitsize="32" type="ieee_single" regnum="42"/>
<reg name="f11" bitsize="32" type="ieee_single" regnum="43"/>
<reg name="f12" bitsize="32" type="ieee_single" regnum="44"/>
<reg name="f13" bitsize="32" type="ieee_single" regnum="45"/>
<reg name="f14" bitsize="32" type="ieee_single" regnum="46"/>
<reg name="f15" bitsize="32" type="ieee_single" regnum="47"/>
<reg name="f16" bitsize="32" type="ieee_single" regnum="48"/>
<reg name="f17" bitsize="32" type="ieee_single" regnum="49"/>
<reg name="f18" bitsize="32" type="ieee_single" regnum="50"/>
<reg name="f19" bitsize="32" type="ieee_single" regnum="51"/>
<reg name="f20" bitsize="32" type="ieee_single" regnum="52"/>
<reg name="f21" bitsize="32" type="ieee_single" regnum="53"/>
<reg name="f22" bitsize="32" type="ieee_single" regnum="54"/>
<reg name="f23" bitsize="32" type="ieee_single" regnum="55"/>
<reg name="f24" bitsize="32" type="ieee_single" regnum="56"/>
<reg name="f25" bitsize="32" type="ieee_single" regnum="57"/>
<reg name="f26" bitsize="32" type="ieee_single" regnum="58"/>
<reg name="f27" bitsize="32" type="ieee_single" regnum="59"/>
<reg name="f28" bitsize="32" type="ieee_single" regnum="60"/>
<reg name="f29" bitsize="32" type="ieee_single" regnum="61"/>
<reg name="f30" bitsize="32" type="ieee_single" regnum="62"/>
<reg name="f31" bitsize="32" type="ieee_single" regnum="63"/>
</feature>

16
gdbstub/gdb-xml/sparc64-cp0.xml Normal file
View File

@@ -0,0 +1,16 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.sparc.cp0">
<reg name="pc" bitsize="64" type="code_ptr" regnum="80"/>
<reg name="npc" bitsize="64" type="code_ptr" regnum="81"/>
<reg name="state" bitsize="64" type="uint64" regnum="82"/>
<reg name="fsr" bitsize="64" type="uint64" regnum="83"/>
<reg name="fprs" bitsize="64" type="uint64" regnum="84"/>
<reg name="y" bitsize="64" type="uint64" regnum="85"/>
</feature>

42
gdbstub/gdb-xml/sparc64-cpu.xml Normal file
View File

@@ -0,0 +1,42 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.sparc.cpu">
<reg name="g0" bitsize="64" type="uint64" regnum="0"/>
<reg name="g1" bitsize="64" type="uint64" regnum="1"/>
<reg name="g2" bitsize="64" type="uint64" regnum="2"/>
<reg name="g3" bitsize="64" type="uint64" regnum="3"/>
<reg name="g4" bitsize="64" type="uint64" regnum="4"/>
<reg name="g5" bitsize="64" type="uint64" regnum="5"/>
<reg name="g6" bitsize="64" type="uint64" regnum="6"/>
<reg name="g7" bitsize="64" type="uint64" regnum="7"/>
<reg name="o0" bitsize="64" type="uint64" regnum="8"/>
<reg name="o1" bitsize="64" type="uint64" regnum="9"/>
<reg name="o2" bitsize="64" type="uint64" regnum="10"/>
<reg name="o3" bitsize="64" type="uint64" regnum="11"/>
<reg name="o4" bitsize="64" type="uint64" regnum="12"/>
<reg name="o5" bitsize="64" type="uint64" regnum="13"/>
<reg name="sp" bitsize="64" type="uint64" regnum="14"/>
<reg name="o7" bitsize="64" type="uint64" regnum="15"/>
<reg name="l0" bitsize="64" type="uint64" regnum="16"/>
<reg name="l1" bitsize="64" type="uint64" regnum="17"/>
<reg name="l2" bitsize="64" type="uint64" regnum="18"/>
<reg name="l3" bitsize="64" type="uint64" regnum="19"/>
<reg name="l4" bitsize="64" type="uint64" regnum="20"/>
<reg name="l5" bitsize="64" type="uint64" regnum="21"/>
<reg name="l6" bitsize="64" type="uint64" regnum="22"/>
<reg name="l7" bitsize="64" type="uint64" regnum="23"/>
<reg name="i0" bitsize="64" type="uint64" regnum="24"/>
<reg name="i1" bitsize="64" type="uint64" regnum="25"/>
<reg name="i2" bitsize="64" type="uint64" regnum="26"/>
<reg name="i3" bitsize="64" type="uint64" regnum="27"/>
<reg name="i4" bitsize="64" type="uint64" regnum="28"/>
<reg name="i5" bitsize="64" type="uint64" regnum="29"/>
<reg name="fp" bitsize="64" type="uint64" regnum="30"/>
<reg name="i7" bitsize="64" type="uint64" regnum="31"/>
</feature>

59
gdbstub/gdb-xml/sparc64-fpu.xml Normal file
View File

@@ -0,0 +1,59 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.sparc.fpu">
<reg name="f0" bitsize="32" type="ieee_single" regnum="32"/>
<reg name="f1" bitsize="32" type="ieee_single" regnum="33"/>
<reg name="f2" bitsize="32" type="ieee_single" regnum="34"/>
<reg name="f3" bitsize="32" type="ieee_single" regnum="35"/>
<reg name="f4" bitsize="32" type="ieee_single" regnum="36"/>
<reg name="f5" bitsize="32" type="ieee_single" regnum="37"/>
<reg name="f6" bitsize="32" type="ieee_single" regnum="38"/>
<reg name="f7" bitsize="32" type="ieee_single" regnum="39"/>
<reg name="f8" bitsize="32" type="ieee_single" regnum="40"/>
<reg name="f9" bitsize="32" type="ieee_single" regnum="41"/>
<reg name="f10" bitsize="32" type="ieee_single" regnum="42"/>
<reg name="f11" bitsize="32" type="ieee_single" regnum="43"/>
<reg name="f12" bitsize="32" type="ieee_single" regnum="44"/>
<reg name="f13" bitsize="32" type="ieee_single" regnum="45"/>
<reg name="f14" bitsize="32" type="ieee_single" regnum="46"/>
<reg name="f15" bitsize="32" type="ieee_single" regnum="47"/>
<reg name="f16" bitsize="32" type="ieee_single" regnum="48"/>
<reg name="f17" bitsize="32" type="ieee_single" regnum="49"/>
<reg name="f18" bitsize="32" type="ieee_single" regnum="50"/>
<reg name="f19" bitsize="32" type="ieee_single" regnum="51"/>
<reg name="f20" bitsize="32" type="ieee_single" regnum="52"/>
<reg name="f21" bitsize="32" type="ieee_single" regnum="53"/>
<reg name="f22" bitsize="32" type="ieee_single" regnum="54"/>
<reg name="f23" bitsize="32" type="ieee_single" regnum="55"/>
<reg name="f24" bitsize="32" type="ieee_single" regnum="56"/>
<reg name="f25" bitsize="32" type="ieee_single" regnum="57"/>
<reg name="f26" bitsize="32" type="ieee_single" regnum="58"/>
<reg name="f27" bitsize="32" type="ieee_single" regnum="59"/>
<reg name="f28" bitsize="32" type="ieee_single" regnum="60"/>
<reg name="f29" bitsize="32" type="ieee_single" regnum="61"/>
<reg name="f30" bitsize="32" type="ieee_single" regnum="62"/>
<reg name="f31" bitsize="32" type="ieee_single" regnum="63"/>
<reg name="f32" bitsize="64" type="ieee_double" regnum="64"/>
<reg name="f34" bitsize="64" type="ieee_double" regnum="65"/>
<reg name="f36" bitsize="64" type="ieee_double" regnum="66"/>
<reg name="f38" bitsize="64" type="ieee_double" regnum="67"/>
<reg name="f40" bitsize="64" type="ieee_double" regnum="68"/>
<reg name="f42" bitsize="64" type="ieee_double" regnum="69"/>
<reg name="f44" bitsize="64" type="ieee_double" regnum="70"/>
<reg name="f46" bitsize="64" type="ieee_double" regnum="71"/>
<reg name="f48" bitsize="64" type="ieee_double" regnum="72"/>
<reg name="f50" bitsize="64" type="ieee_double" regnum="73"/>
<reg name="f52" bitsize="64" type="ieee_double" regnum="74"/>
<reg name="f54" bitsize="64" type="ieee_double" regnum="75"/>
<reg name="f56" bitsize="64" type="ieee_double" regnum="76"/>
<reg name="f58" bitsize="64" type="ieee_double" regnum="77"/>
<reg name="f60" bitsize="64" type="ieee_double" regnum="78"/>
<reg name="f62" bitsize="64" type="ieee_double" regnum="79"/>
</feature>