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c7093e3704
Just like aarch64's prepare_host_addr(), x86_64 should use MO_ATOM_WITHIN16 for the memop when it's capable. Unlike aarch64, which needs to check a CPU feature, x86 has been capable since P6 family processors and newer (see Intel SDM Vol. 3 §11.1.1). Since a 16-byte aligned region always fits within a 16-byte multiple sized cache line (x86_64 implementations always have cache lines of at least 64 bytes), then this enables riscv cpu models with Zama16b to use the fast path, just as cpu models without Zama16b do. Cc: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [rth: Update both atom_and_align_for_opc calls] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260707122819.114105-1-andrew.jones@oss.qualcomm.com>